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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 9 occurrences of 8 keywords
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Results
Found 9 publication records. Showing 9 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Abhishek A. Sinkar, Hao Wang, Nam Sung Kim |
Workload-aware voltage regulator optimization for power efficient multi-core processors.  |
DATE  |
2012 |
DBLP BibTeX RDF |
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| 1 | Abhishek A. Sinkar, Nam Sung Kim |
AVS-aware power-gate sizing for maximum performance and power efficiency of power-constrained processors. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Abhishek A. Sinkar, Nam Sung Kim |
Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Erika Gunadi, Abhishek A. Sinkar, Nam Sung Kim, Mikko H. Lipasti |
Combating Aging with the Colt Duty Cycle Equalizer. |
MICRO |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Abhishek A. Sinkar, Nam Sung Kim |
Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
adaptive voltage positioning, multicore processor |
| 1 | Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin |
Frequency and yield optimization using power gates in power-constrained designs. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
optimization, yield, power gate, frequency |
| 1 | Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim |
Statistical static timing analysis considering leakage variability in power gated designs. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
process variations, leakage, power gating, ssta |
| 1 | Lin Xie, Azadeh Davoodi, Kewal K. Saluja, Abhishek A. Sinkar |
False Path Aware Timing Yield Estimation under Variability. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Chunhua Yao, Kewal K. Saluja, Abhishek A. Sinkar |
WOR-BIST: A Complete Test Solution for Designs Meeting Power, Area and Performance Requirements. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #9 of 9 (100 per page; Change: )
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