| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Tayfun Gezgin, Christoph Etzien, Stefan Henkler, Achim Rettberg |
Towards a Rigorous Modeling Formalism for Systems of Systems.  |
ISORC Workshops  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Kay Klobedanz, Wolfgang Mueller, Achim Rettberg |
An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. |
ISORC Workshops |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Baumgart, Philipp Reinkemeier, Achim Rettberg, Ingo Stierand, Eike Thaden, Raphael Weber |
A Model-Based Design Methodology with Contracts to Enhance the Development Process of Safety-Critical Systems. |
SEUS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp A. Hartmann, Kim Grüttner, Achim Rettberg, Ina Podolski |
Distributed Resource-Aware Scheduling for Multi-core Architectures with SystemC. |
DIPES/BICC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kim Grüttner, Henning Kleen, Frank Oppenheimer, Achim Rettberg, Wolfgang Nebel |
Towards a synthesis semantics for systemC channels. |
CODES+ISSS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcelo Götz, Achim Rettberg, Carlos Eduardo Pereira, Franz J. Rammig |
Run-time reconfigurable RTOS for reconfigurable systems-on-chip. |
J. Embedded Computing |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ina Podolski, Achim Rettberg |
Overview of Multicore Requirements towards Real-Time Communication. |
SEUS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Raphael Weber, Achim Rettberg |
Implementation of the AES Algorithm for a Reconfigurable, Bit Serial, Fully Pipelined Architecture. |
ARC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Mauro Cesar Zanella, Michael Amann, Michael Keckeisen, Franz J. Rammig (eds.) |
Analysis, Architectures and Modelling of Embedded Systems, Third IFIP TC 10 International Embedded Systems Symposium, IESS 2009, Langenargen, Germany, September 14-16, 2009. Proceedings |
IESS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Raphael Weber, Achim Rettberg |
Low-Level Space Optimization of an AES Implementation for a Bit-Serial Fully Pipelined Architecture. |
IESS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ina Podolski, Achim Rettberg |
Towards an Irritable Bowel Syndrome Control System Based on Artificial Neural Networks. |
IESS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yara Khaluf, Achim Rettberg |
Towards a Load Balancing Middleware for Automotive Infotainment Systems. |
IESS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Philipp A. Hartmann, Philipp Reinkemeier, Achim Rettberg, Wolfgang Nebel |
Modelling control systems in SystemC AMS - Benefits and limitations. |
SoCC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Schallenberg, Achim Rettberg, Wolfgang Nebel, Franz-Josef Rammig |
Seamless design flow for reconfigurable systems. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Helene Schilke, Achim Rettberg, Florian Dittmann |
Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
Model-based Design Flow, FPGA, Petri-net, Dynamic Reconfiguration |
| 1 | Isabell Jahnich, Ina Podolski, Achim Rettberg |
Integrating Dynamic Load Balancing Strategies into the Car-Network. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
Load Balancing, Middleware, Automotive Systems, Task Distribution |
| 1 | Isabell Jahnich, Ina Podolski, Achim Rettberg |
Towards a Middleware Approach for a Self-configurable Automotive Embedded System. |
SEUS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg, Raphael Weber |
Latency Optimization for a Reconfigurable, Self-Timed, and Bit-Serial Architecture. |
ERSA |
2007 |
DBLP BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg, Raphael Weber |
Optimization techniques for a reconfigurable, self-timed, and bit-serial architecture. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
optimization, high-level synthesis, bit-serial architecture |
| 1 | Florian Dittmann, Marcelo Götz, Achim Rettberg |
Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig (eds.) |
Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA |
IESS |
2007 |
DBLP BibTeX RDF |
|
| 1 | Henning Zabel, Achim Rettberg, Alexander Krupp |
Approach for a Formal Verification of a Bit-serial Pipelined Architecture. |
IESS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Anthony, Achim Rettberg, De-Jiu Chen, Isabell Jahnich, Gerrit de Boer, Cecilia Ekelin |
Towards a Dynamically Reconfigurable Automotive Control System Architecture. |
IESS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Isabell Jahnich, Achim Rettberg |
Towards Dynamic Load Balancing for Distributed Embedded Automotive Systems. |
IESS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Franz J. Rammig |
A new Design Partitioning Approach for Low Power High-Level Synthesis. |
DELTA |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Heiner Giefers, Achim Rettberg |
Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture. |
SBCCI |
2006 |
DBLP DOI BibTeX RDF |
high-level synthesis, low power design, voltage scaling, bit-serial architecture |
| 1 | Henning Zabel, Achim Rettberg |
Prototyping an Ambient Light System - A Case Study. |
DIPES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcelo Götz, Achim Rettberg, Carlos Eduardo Pereira |
Communication-Aware Component Allocation Algorithm for a Hybrid Architecture. |
DIPES |
2006 |
DBLP DOI BibTeX RDF |
System-on-Chip, Reconfigurable Computing, Real Time Operating System |
| 1 | Achim Rettberg, Franz-Josef Rammig |
Integration of Energy Reduction into High-Level Synthesis by Partitioning. |
DIPES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg, Fabian Schulte |
A Y-Chart Based Tool for Reconfigurable System Design. |
ARCS Workshops |
2005 |
DBLP BibTeX RDF |
|
| 1 | Tim Schattkowsky, Wolfgang Müller 0003, Achim Rettberg |
A Model-Based Approach for Executable Specifications on Reconfigurable Hardware. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Bernd Kleinjohann, Franz J. Rammig |
Spezielle Aspekte der Verlustleistungsgetriebenen High-Level Synthese. |
GI Jahrestagung |
2005 |
DBLP BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg, Raphael Weber |
Path Concepts for a Reconfigurable Bit-Serial Synchronous Architecture. |
EUC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcelo Götz, Achim Rettberg, Carlos Eduardo Pereira |
A Run-Time Partitioning Algorithm for RTOS on Reconfigurable Hardware. |
EUC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg, Thomas Lehmann, Mauro Cesar Zanella |
Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial Architecture. |
DELTA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Natascha Petry Ligocki, Achim Rettberg, Mauro Cesar Zanella, Andreas Hennig, André Luiz de Freitas Francisco |
Towards a Modular Communication System for FPGAs. |
DELTA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Carsten Rust, Achim Rettberg |
Automatic Synthesis of SystemC-Code from Formal Specifications. |
DIPES |
2004 |
DBLP BibTeX RDF |
|
| 1 | André Luiz de Freitas Francisco, Achim Rettberg, Andreas Hennig |
Hardware Design and Protocol Specification for the Control and Communication within a Mechatronic System. |
DIPES |
2004 |
DBLP BibTeX RDF |
|
| 1 | Bernd Kleinjohann, Guang R. Gao, Hermann Kopetz, Lisa Kleinjohann, Achim Rettberg (eds.) |
Design Methods and Applications for Distributed Embedded Systems, IFIP 18th World Computer Congress, TC10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2004), 22-27 August 2004, Toulouse, France |
DIPES |
2004 |
DBLP BibTeX RDF |
|
| 1 | Florian Dittmann, Achim Rettberg |
A Self-Controlled and Dynamically Reconfigurable Architecture. |
DIPES |
2004 |
DBLP BibTeX RDF |
|
| 1 | Achim Rettberg, Mauro Cesar Zanella, Thomas Lehmann, Christophe Bobda |
A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture. |
IEEE International Workshop on Rapid System Prototyping |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Mauro Cesar Zanella, Thomas Lehmann, Ulrich Dierkes, Carsten Rustemeier |
Control Development for Mechatronic Systems with a Fully Reconfigurable Pipeline Architecture. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Florian Dittmann, Mauro Cesar Zanella, Thomas Lehmann |
Towards a High-Level Synthesis of Reconfigurable Bit-Serial Architectures. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Mauro Cesar Zanella, Christophe Bobda, Thomas Lehmann |
A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Wolfgang Thronicke |
How to integrate Webservices in Embedded System Design?. |
DIPES |
2002 |
DBLP BibTeX RDF |
|
| 1 | Achim Rettberg, Bernd Kleinjohann, Franz J. Rammig |
Integration of Low Power Analysis into High-Level Scheduling in Distributed Real-Time Computing Systems. |
DIPES |
2002 |
DBLP BibTeX RDF |
|
| 1 | Bernd Kleinjohann, K. H. Kim, Lisa Kleinjohann, Achim Rettberg (eds.) |
Design and Analysis of Distributed Embedded Systems, IFIP 17th World Computer Congress - TC10 Stream on Distributed and Parallel Embedded Systems (DIPES 2002), August 25-29, 2002, Montréal, Québec, Canada |
DIPES |
2002 |
DBLP BibTeX RDF |
|
| 1 | Achim Rettberg, Wolfgang Thronicke |
Embedded System Design Based On Webservices. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Wolfram Hardt, Bernd Kleinjohann, Achim Rettberg |
The FLYSIG Prototyping Approach. (PDF / PS) |
IEEE International Workshop on Rapid System Prototyping |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann |
The Specification Language SpecC within the PARADISE Design Environment. |
DIPES |
2000 |
DBLP BibTeX RDF |
|
| 1 | Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann |
The Re-Configurable Delay-Intensitive FLYSIG Architecture. |
IPPS/SPDP Workshops |
1999 |
DBLP DOI BibTeX RDF |
|
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