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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 19 occurrences of 19 keywords
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Results
Found 57 publication records. Showing 57 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Syed M. A. H. Jafri, Liang Guang, Axel Jantsch, Kolin Paul, Ahmed Hemani, Hannu Tenhunen |
Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation.  |
PECCS  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
Low-Latency No-Handshake GALS Interfaces for Fast-Receiver Links. |
VLSI Design |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Haider Abbas, Christer Magnusson, Louise Yngström, Ahmed Hemani |
Addressing Dynamic Issues in Information Security Management. |
Inf. Manag. Comput. Security |
2011 |
DBLP BibTeX RDF |
|
| 1 | Fahimeh Jafari, Shuo Li, Ahmed Hemani |
Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jamshaid Sarwar Malik, Jameel Nawaz Malik, Ahmed Hemani, N. D. Gohar |
Generating high tail accuracy Gaussian Random Numbers in hardware using central limit theorem. |
VLSI-SoC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen |
Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures. |
FPT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen |
Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures. |
IPDPS Workshops |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Ali Shami, Ahmed Hemani |
Address generation scheme for a coarse grain reconfigurable architecture. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pei Liu, Ahmed Hemani, Kolin Paul |
A Reconfigurable Processor for Phylogenetic Inference. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Adeel Tajammul, Muhammad Ali Shami, Ahmed Hemani, Sridharan Moorthi |
NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Omer Malik, Ahmed Hemani, Muhammad Ali Shami |
A Library Development Framework for a Coarse Grain Reconfigurable Architecture. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Ingo Sander, Ahmed Hemani |
Predicting bus contention effects on energy and performance in multi-processor SoCs. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pei Liu, Fatemeh O. Ebrahim, Ahmed Hemani, Kolin Paul |
A Coarse-Grained Reconfigurable Processor for Sequencing and Phylogenetic Algorithms in Bioinformatics. |
ReConFig |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
A GALS Network-on-Chip based on rationally-related frequencies. |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin |
Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. |
ISVLSI |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
Distributed DVFS using rationally-related frequencies and discrete voltage levels. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
GRLS, DVFS, GALS |
| 1 | Jamshaid Sarwar Malik, Ben Slimane, Ahmed Hemani, N. D. Gohar |
Improving performance of fading channel simulators by use of uniformly distributed random numbers. |
ISSPIT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Ingo Sander, Ahmed Hemani |
Inferring Energy and Performance Cost of RTOS in Priority-Driven Scheduling. |
SIES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Ali Shami, Ahmed Hemani |
Control Scheme for a CGRA. |
SBAC-PAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Ingo Sander, Ahmed Hemani |
Predicting energy and performance overhead of Real-Time Operating Systems. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
Lowering the latency of interfaces for rationally-related frequencies. |
ICCD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Ahmed Hemani, Luca Bolognino |
A General Approach to High-Level Energy and Performance Estimation in System-on-Chip Architectures. |
J. Low Power Electronics |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Ali Shami, Ahmed Hemani |
Morphable DPU: Smart and efficient data path for signal processing applications. |
SiPS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Luca Bolognino, Ahmed Hemani |
Energy and Performance Model of a SPARC Leon3 Processor. |
DSD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandro Penolazzi, Ahmed Hemani, Luca Bolognino |
A General Approach to High-Level Energy and Performance Estimation in SoCs. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Haider Abbas, Louise Yngström, Ahmed Hemani |
Adaptability infrastructure for bridging IT security evaluation and options theory. |
SIN |
2009 |
DBLP DOI BibTeX RDF |
it product evaluation, it security evaluation, options theory |
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
A flexible communication scheme for rationally-related clock frequencies. |
ICCD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Bengt Svantesson, Ahmed Hemani, F. Wolf |
Dynamic memory management methodology applied to embedded telecom network systems. |
IEEE Trans. VLSI Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani |
A Network on Chip Architecture and Design Methodology. |
ISVLSI |
2002 |
DBLP DOI BibTeX RDF |
System on Chip, IP, Platform based design, On-chip communication |
| 1 | Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, Ahmed Hemani |
Grammar-based design of embedded systems. |
Journal of Systems Architecture |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani |
System-level data-format exploration for dynamically allocated datastructures. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Simon Leung, Adam Postula, Ahmed Hemani |
Test Strategies on Functionally Partitioned Module-Based Programmable Architecture for Base-Band Processing. |
DSD |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhijit K. Deb, Ahmed Hemani, Johnny Öberg, Adam Postula, Dan Lindqvist |
Hardware Software Codesign of DSP System Using Grammar Based Approach. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Hemani, Abhijit K. Deb, Johnny Öberg, Adam Postula, Dan Lindqvist, Björn Fjellborg |
System Level Virtual Prototyping of DSP SOCs Using Grammar Based Approach. |
Design Autom. for Emb. Sys. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Johnny Öberg, Anshul Kumar, Ahmed Hemani |
Grammar-based hardware synthesis from port-size independent specifications. |
IEEE Trans. VLSI Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Axel Jantsch, Shashi Kumar, Ahmed Hemani |
A Metamodel for Studying Concepts in Electronic System Design. |
IEEE Design & Test of Computers |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani |
System-level data format exploration for dynamically allocated data structures. |
DAC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Simon Leung, Adam Postula, Ahmed Hemani |
Reconfigurable Architecture for Base-band Data Processing. |
PDPTA |
2000 |
DBLP BibTeX RDF |
|
| 1 | Simon Leung, Adam Postula, Ahmed Hemani |
Development of Programmable Architecture for Base-Band Processing. |
EUROMICRO |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Hemani, Johnny Öberg, Abhijit K. Deb, Dan Lindqvist, Björn Fjellborg |
System Level Virtual Prototyping of DSP ASICs Using Grammar Based Approach. (PDF / PS) |
IEEE International Workshop on Rapid System Prototyping |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny Öberg, Peeter Ellervee, Dan Lundqvist |
Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style. |
DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Axel Jantsch, Shashi Kumar, Ahmed Hemani |
The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Meincke, Ahmed Hemani, Shashi Kumar, Peeter Ellervee, Johnny Öberg, Thomas Olsson, Peter Nilsson, Dan Lindqvist, Hannu Tenhunen |
Globally asynchronous locally synchronous architecture for large high-performance ASICs. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Peeter Ellervee, Ahmed Hemani, Miguel Miranda, Francky Catthoor |
Exploiting Data Transfer Locality in Memory Mapping. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Bengt Svantesson, Shashi Kumar, Ahmed Hemani |
A Methodology and Algorithms for Efficient Interprocess Communication Synthesis from System Description in SDL. |
VLSI Design |
1998 |
DBLP BibTeX RDF |
|
| 1 | Johnny Öberg, Ahmed Hemani, Anshul Kumar |
Scheduling of Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Johnny Öberg, Anshul Kumar, Ahmed Hemani |
Specification of Exception Handling in Grammar-Based Hardware Synthesis. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Kalle Tammemäe, Mattias O'Nils, Ahmed Hemani |
Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems. |
FPL |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Johnny Öberg, Anshul Kumar, Ahmed Hemani |
Grammar-Based Hardware Synthesis of Data Communication Protocols. (PDF / PS) |
ISSS |
1996 |
DBLP DOI BibTeX RDF |
Grammar-based Specification, Data Communication Protocols, Design Space Exploration, Hardware Synthesis |
| 1 | Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen |
A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
Application specific High-Level Synthesis, High-Level Synthesis for telecommunication, ATM |
| 1 | Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani |
A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. |
VLSI Design |
1996 |
DBLP DOI BibTeX RDF |
CDFG, CDFG Transformations, Filter structures, Optimisations, High-Level Synthesis, Allocation, Rule-Based |
| 1 | Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen |
Hardware/software partitioning and minimizing memory interface traffic. |
EURO-DAC |
1994 |
DBLP DOI BibTeX RDF |
C++, VHDL |
| 1 | Ahmed Hemani, Börje Karlsson, Mats Fredriksson, Kurt Nordqvist, Björn Fjellborg |
Application of High-Level Synthesis in an Industrial Project. |
VLSI Design |
1994 |
DBLP BibTeX RDF |
|
| 1 | Ahmed Hemani |
Self-Organization and its Application to Binding. |
VLSI Design |
1993 |
DBLP BibTeX RDF |
|
| 1 | Ahmed Hemani, Adam Postula |
Cell placement by self-organisation. |
Neural Networks |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Hemani, Adam Postula |
A neural net based self organising scheduling algorithm. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
Behavioural Synthesis, Scheduling, Neural Nets, Self Organisation, Optimisation Techniques |
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