| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Codruta Istin, Dan Pescaru, Alex Doboli |
Stochastic Model-Based Heuristics for Fast Field of View Loss Recovery in Urban Traffic Management Through Networks of Video Cameras.  |
IEEE Transactions on Intelligent Transportation Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Anurag Umbarkar, Varun Subramanian, Alex Doboli |
Low-cost sound-based localization using programmable mixed-signal systems-on-chip. |
Microelectronics Journal |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristian Ferent, Alex Doboli |
Measuring the uniqueness and variety of analog circuit design features. |
Integration |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristian Ferent, Alex Doboli |
A symbolic technique for automated characterization of the uniqueness and similarity of analog circuit design features. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Cristian Ferent, Varun Subramanian, Michael Gilberti, Alex Doboli |
Linear programming approach for performance-driven data aggregation in networks of embedded sensors. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Ying Wei, Alex Doboli |
Reconfigurable DeltaSigma modulator topology design through hierarchical mapping and constraint extraction. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Varun Subramanian, Alex Doboli |
PNet: A Grid Type Sensor Network of Reconfigurable Nodes. |
ICDCS Workshops |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Madalin Plastoi, Daniel Curiac, Ovidiu Banias, Constantin Volosencu, Dan Pescaru, Alex Doboli |
Self-destruction Procedure for Cluster-tree Wireless Sensor Networks. |
WINSYS |
2009 |
DBLP BibTeX RDF |
|
| 1 | Florica Naghiu, Dan Pescaru, Gabriela Magureanu, Ionel Jian, Alex Doboli |
Corrections of sensing error in video-based traffic surveillance. |
SACI |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Varun Subramanian, Michael Gilberti, Alex Doboli |
Online adaptation policy design for grid sensor networks with reconfigurable embedded nodes. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hui Zhang, Yang Zhao, Alex Doboli |
A scalable sigma-space based methodology for modeling process parameter variations in analog circuits. |
Microelectronics Journal |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Wei, Alex Doboli |
Structural Macromodeling of Analog Circuits Through Model Decoupling and Transformation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Wei, Alex Doboli, Hua Tang |
Systematic Methodology for Designing Reconfigurable DeltaSigma Modulator Topologies for Multimode Communication Systems. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp S. Kallakuri, Alex Doboli, Eugene A. Feinberg |
Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems-on-Chip |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Sankalp S. Kallakuri, Alex Doboli |
Customization of Arbitration Policies and Buffer Space Distribution Using Continuous-Time Markov Decision Processes. |
IEEE Trans. VLSI Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zhang, Simona Doboli, Hua Tang, Alex Doboli |
Compiled code simulation of analog and mixed-signal systems using piecewise linear modeling of nonlinear parameters: A case study for DeltaSigma modulator simulation. |
Integration |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Alex Doboli, Simona Doboli |
Applying stochastic modeling to bus arbitration for systems-on-chip. |
Integration |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp S. Kallakuri, Alex Doboli, Simona Doboli, Dan Pescaru, Daniel Curiac |
SoC Design Point Selection for Dynamic Adaptation under Continuously Varying Throughput Constraints. |
AHS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Constantin Volosencu, Daniel-Ioan Curiac, Ovidiu Banias, Alex Doboli, Octavian Dranga |
Knowledge based System for Reliable Perimeter Protection using Sensor Networks. |
WINSYS |
2007 |
DBLP BibTeX RDF |
|
| 1 | Meng Wang, Alex Doboli, Thomas G. Robertazzi, Simona Doboli, Daniel Curiac |
Towards Scalable Distributed Control of Unmanned Autonomous Vehicles. |
SACI |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Pengbo Sun, Ying Wei, Alex Doboli |
Flexibility-oriented design methodology for reconfigurable DeltaSigma modulators. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Tang, Hui Zhang, Alex Doboli |
Refinement-based synthesis of continuous-time analog filters through successive domain pruning, plateau search, and adaptive sampling. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Tang, Alex Doboli |
High-level synthesis of /spl Delta//spl Sigma/ Modulator topologies optimized for complexity, sensitivity, and power consumption. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nagu R. Dhanwada, Alex Doboli, Adrián Núñez-Aldana, Ranga Vemuri |
Hierarchical constraint transformation based on genetic optimization for analog system synthesis. |
Integration |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Wei, Alex Doboli |
Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
nonlinear macromodel, structural macromodel, analog circuits |
| 1 | Ying Wei, Hua Tang, Alex Doboli |
Systematic methodology for designing reconfigurable Delta-Sigma modulator topologies for multimode communication systems. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zhang, Yang Zhao, Alex Doboli |
ALAMO: an improved alpha-space based methodology for modeling process parameter variations in analog circuits. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Wei, Alex Doboli |
Library of structural analog cell macromodels for design of continuous-time reconfigurable Delta Sigma modulators. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Alex Doboli |
Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yulei Weng, Alex Doboli |
Digital cell macro-model with regular substrate template and EKV based MOSFET model. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Nattawut Thepayasuwan, Alex Doboli, Eugene A. Feinberg |
A continuous time markov decision process based on-chip buffer allocation methodology. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
buffer space management, SoC |
| 1 | Ying Wei, Alex Doboli |
Systematic development of analog circuit structural macromodels through behavioral model decoupling. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
structural macromodel, analog circuits |
| 1 | Hua Tang, Ying Wei, Alex Doboli |
MINLP Based Topology Synthesis for Delta Sigma Modulators Optimized for Signal Path Complexity, Sensitivity and Power Consumption. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Alex Doboli, Eugene A. Feinberg |
Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems-on-Chip. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zhang, Preethi Karthik, Hua Tang, Alex Doboli |
An explorative tile-based technique for automated constraint transformation, placement and routing of high frequency analog filters. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Tang, Alex Doboli |
Parameter domain pruning for improving convergence of synthesis algorithms. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Nattawut Thepayasuwan, Alex Doboli, Simona Doboli |
Communication subsystem synthesis and analysis tool using bus architecture generation and stochastic arbitration policies. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Alex Doboli |
Energy conscious online architecture adaptation for varying latency constraints in sensor network applications. |
CODES+ISSS |
2005 |
DBLP DOI BibTeX RDF |
continuous time adaptation, sensor networks |
| 1 | Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri |
A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
genetic algorithms, branch-and-bound, performance estimation, VHDL-AMS, Analog synthesis |
| 1 | Nattawut Thepayasuwan, Alex Doboli |
OSIRIS: Automated Synthesis of Flat and Hierarchical Bus Architectures for Deep Submicron Systems on Chip. |
ISVLSI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Alex Doboli, Simona Doboli |
Stochastic Modeling Based Environment for Synthesis and Comparison of Bus Arbitration Policies. |
ISVLSI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Alex Doboli |
Hardware-Software Co-Design of Resource Constrained Systems on a Chip. |
ICDCS Workshops |
2004 |
DBLP DOI BibTeX RDF |
bus architectures, layout awarness, optimization, hardware/software co-design, trade-offs |
| 1 | Hui Zhang, Alex Doboli |
SystemC Simulation of Continuous-Time $Sigma-Delta$ Analog-Digital Converters in the Presence of Non-linearities. |
FDL |
2004 |
DBLP BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Alex Doboli |
Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zhang, Alex Doboli |
Fast time-domain symbolic simulation for synthesis of sigma-delta analog-digital converters. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Yulei Weng, Alex Doboli |
Smart Sensor Architecture Customized for Image Processing Applications. |
IEEE Real-Time and Embedded Technology and Applications Symposium |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
Behavioral modeling for high-level synthesis of analog and mixed-signal systems from VHDL-AMS. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Tang, Hui Zhang, Alex Doboli |
Layout-Aware Analog System Synthesis Based on Symbolic Layout Description and Combined Block Parameter Exploration, Placement and Global Routing. |
ISVLSI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalp Kallakuri, Alex Doboli, Simona Doboli |
Applying Stochastic Modeling to Bus Arbitration for Network-On-Chip Systems. |
VLSI |
2003 |
DBLP BibTeX RDF |
|
| 1 | Hua Tang, Hui Zhang, Alex Doboli |
Synthesis of continuous-time filters and analog to digital converters by integrated constraint transformation, floorplanning and routing. |
ACM Great Lakes Symposium on VLSI |
2003 |
DBLP DOI BibTeX RDF |
?? modulator, continuous-time filter, synthesis |
| 1 | Alex Doboli, Hua Tang, Hui Zhang |
Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications. |
FDL |
2003 |
DBLP BibTeX RDF |
|
| 1 | Simona Doboli, Gaurav Gothoskar, Alex Doboli |
Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Hua Tang, Alex Doboli |
An exploration-based binding and scheduling technique for synthesis of digital blocks for mixed-signal applications. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Vaishali Damle, Alex Doboli |
Bus Architecture Synthesis for Hardware-Software Co-Design of Deep Submicron Systems on Chip. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
A Functional Specification Notation for Co-Design of Mixed Analog-Digital Systems. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Tang, Alex Doboli |
Layout-Aware Synthesis Methodology for Analog Systems Based on Combined Block Sizing, Floorplanning and Global Routing. |
IWLS |
2002 |
DBLP BibTeX RDF |
|
| 1 | Nattawut Thepayasuwan, Alex Doboli |
A Methodology for Core Placement and Bus Synthesis under Time, Area and Energy Consumption Constraints. |
IWLS |
2002 |
DBLP BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints. |
DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
A regularity-based hierarchical symbolic analysis method for large-scale analog networks. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli |
Integrated hardware-software co-synthesis for design of embedded systems under power and latency constraints. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
Hierarchical performance optimization for synthesis of linear analog systems. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Alex Doboli, Paul Pop, Zebo Peng |
Scheduling with bus access optimization for distributed embedded systems. |
IEEE Trans. VLSI Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
Towards a Specification Notation for High-Level Synthesis of Mixed-Signal and Analog Systems. |
BMAS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Adrián Núñez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri |
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration. |
DAC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
A Decomposition-based Symbolic Analysis Method for Analog Synthesis from Behavioral Specifications. |
VLSI |
1999 |
DBLP BibTeX RDF |
|
| 1 | Alex Doboli, Ranga Vemuri |
A VHDL-AMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop |
Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Real time systems, Embedded systems, System design, Design automation, Performance estimation, Hardware/Software co-design, Process scheduling, System-level synthesis |
| 1 | Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop |
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alexa Doboli |
System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. |
Design Autom. for Emb. Sys. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli |
Post-synthesis back-annotation of timing information in behavioral VHDL. |
Journal of Systems Architecture |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex Doboli |
Hardware/Software Partitioning with Iterative Improvement Heuristics. (PDF / PS) |
ISSS |
1996 |
DBLP DOI BibTeX RDF |
optimization, simulated annealing, partitioning, tabu search, Hardware/Software co-design |
| 1 | Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli |
Timing constraint specification and synthesis in behavioral VHDL. |
EURO-DAC |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Petru Eles, Zebo Peng, Alexa Doboli |
VHDL system-level specification and partitioning in a hardware/software co-synthesis environment. |
CODES |
1994 |
DBLP DOI BibTeX RDF |
|
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