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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 44 occurrences of 33 keywords
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Results
Found 60 publication records. Showing 60 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Ahmed Abousamra, Alex K. Jones, Rami G. Melhem |
Codesign of NoC and Cache Organization for Reducing Access Latency in Chip Multiprocessors.  |
IEEE Trans. Parallel Distrib. Syst.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yaojun Zhang, Xiaobin Wang, Yong Li, Alex K. Jones, Yiran Chen |
Asymmetry of MTJ switching and its implication to STT-RAM designs. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Ahmed Abousamra, Rami G. Melhem, Alex K. Jones |
Two-hop Free-space based optical interconnects for chip multiprocessors. |
NOCS |
2011 |
DBLP BibTeX RDF |
|
| 1 | Ahmed Abousamra, Alex K. Jones, Rami G. Melhem |
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors. |
HiPEAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Charles C. Weems, Darren J. Kerbyson, Ramakrishnan Rajamony, Alex K. Jones |
Guest Editor's Note: Large-Scale Parallel Processing. |
Parallel Processing Letters |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Abousamra, Rami G. Melhem, Alex K. Jones |
NoC-aware cache design for chip multiprocessors. |
PACT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong Li, Ahmed Abousamra, Rami G. Melhem, Alex K. Jones |
Compiler-assisted data distribution for chip multiprocessors. |
PACT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Alex K. Jones |
An architectural space exploration tool for domain specific reconfigurable computing. |
IPDPS Workshops |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Colin J. Ihrig, Rami G. Melhem, Alex K. Jones |
Automated modeling and emulation of interconnect designs for many-core chip multiprocessors. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
simulation, interconnection network, emulation, multi-core, many-core |
| 1 | Shuyi Shao, Alex K. Jones, Rami G. Melhem |
Compiler Techniques for Efficient Communications in Circuit Switched Networks for Multiprocessor Systems. |
IEEE Trans. Parallel Distrib. Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Swapna R. Dontharaju, Shen Chih Tung, James T. Cain, Leonid Mats, Marlin H. Mickle, Alex K. Jones |
A design automation and power estimation flow for RFID systems. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
low-power, RFID, prototyping, design automation |
| 1 | Gayatri Mehta, Justin Stander, Mustafa Baz, Brady Hunsaker, Alex K. Jones |
Interconnect customization for a hardware fabric. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
hardware fabric, architecture, computer-aided design, Reconfigurable, low-energy, demonstrable |
| 1 | Yu Zhang, Alex K. Jones |
Non-Uniform "Fat-Meshes" for Chip Multiprocessors. |
Parallel Processing Letters |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Darren J. Kerbyson, Ramakrishnan Rajamony, Charles C. Weems |
Guest Editor's Note: Large Scale Parallel Processing. |
Parallel Processing Letters |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick Schaumont, Alex K. Jones, Steve Trimberger |
Guest Editors' Introduction to Security in Reconfigurable Systems Design. |
TRETS |
2009 |
DBLP DOI BibTeX RDF |
Trojan, Trustworthy design, side-channel resistant design, physically unclonable function |
| 1 | Colin J. Ihrig, Gerold Joseph Dhanabalan, Alex K. Jones |
A low-power CMOS thyristor based delay element with programmability extensions. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
delay element, thyristor, low power |
| 1 | Yu Zhang, Alex K. Jones |
Non-uniform fat-meshes for chip multiprocessors. |
IPDPS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Abousamra, Rami G. Melhem, Alex K. Jones |
Winning with Pinning in NoC. |
Hot Interconnects |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Robert Walker |
Introduction to the special section on demonstrable software systems and hardware platforms II. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Leonid Mats, Peter J. Hawrylak, Raymond R. Hoare, James T. Cain, Marlin H. Mickle |
Radio frequency identification prototyping. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
low-power, RFID, prototyping, Design automation |
| 1 | Raymond R. Hoare, Zhu Ding, Alex K. Jones |
A two-stage hardware scheduler combining greedy and optimal scheduling. |
J. Parallel Distrib. Comput. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Shuyi Shao, Yu Zhang, Rami G. Melhem |
Symbolic Expression Analysis for Compiled Communication. |
Parallel Processing Letters |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Darren J. Kerbyson, Ramakrishnan Rajamony, Charles C. Weems |
Guest Editor's Note: Large-Scale Parallel Processing. |
Parallel Processing Letters |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Yu, Raymond R. Hoare, Alex K. Jones |
A CAM-based intrusion detection system for single-packet attack detection. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Colin J. Ihrig, Alex K. Jones |
Reducing energy by exploring heterogeneity in a coarse-grain fabric. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuyi Shao, Yu Zhang, Alex K. Jones, Rami G. Melhem |
Symbolic expression analysis for compiled communication. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Shen Chih Tung, Alex K. Jones |
Physical layer design automation for RFID systems. |
IPDPS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle |
An automated, FPGA-based reconfigurable, low-power RFID tag. |
Microprocessors and Microsystems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Colin J. Ihrig, Justin Stander, Alex K. Jones |
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Justin Stander, Mustafa Baz, Brady Hunsaker, Alex K. Jones |
Interconnect Customization for a Coarse-grained Reconfigurable Fabric. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, Joshua M. Lucas, Shuyi Shao, Rami G. Melhem |
Linking Compilation and Visualization for Massively Parallel Programs. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Joshua M. Lucas, Raymond Hoare, Ivan S. Kourtev, Alex K. Jones |
Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). |
Microprocessors and Microsystems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Raymond R. Hoare, Alex K. Jones, Dara Kusic, Joshua Fazekas, John Foster, Shen Chih Tung, Michael L. McCloud |
Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions. |
EURASIP J. Adv. Sig. Proc. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Justin Stander, Joshua M. Lucas, Raymond R. Hoare, Brady Hunsaker, Alex K. Jones |
A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. |
J. Low Power Electronics |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster |
Reducing power while increasing performance with supercisc. |
ACM Trans. Embedded Comput. Syst. |
2006 |
DBLP DOI BibTeX RDF |
Low-power, synthesis, VLIW, predication, multicore architectures |
| 1 | Jeffrey William Schuster, Kshitij Gupta, Raymond Hoare, Alex K. Jones |
Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition. |
EURASIP J. Emb. Sys. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Jiang Zheng 0002, Ahmed Amer |
Entropy Based Evaluation of Communication Predictability in Parallel Applications. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Peter J. Hawrylak, Leonid Mats, Raymond R. Hoare, James T. Cain, Marlin H. Mickle |
Passive active radio frequency identification tags. |
IJRFITA |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Raymond R. Hoare, Zhu Ding, Alex K. Jones |
Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches. |
SC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhu Ding, Raymond R. Hoare, Alex K. Jones, Rami G. Melhem |
Interconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks. |
SC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones |
Design space exploration for low-power reconfigurable fabrics. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuyi Shao, Alex K. Jones, Rami G. Melhem |
A compiler-based communication analysis approach for multiprocessor systems. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle |
An automated, reconfigurable, low-power RFID tag. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle |
A Field Programmable RFID Tag and Associated Design Flow. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones |
Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones |
A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Yu, Raymond R. Hoare, Alex K. Jones, Ralph Sprang |
A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee |
High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. |
J. Low Power Electronics |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Raymond R. Hoare, Zhu Ding, Shen Chih Tung, Rami G. Melhem, Alex K. Jones |
A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks. |
J. Parallel Distrib. Comput. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker |
On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. |
SC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster |
Extracting Speedup From C-Code With Poor Instruction-Level Parallelism. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhu Ding, Raymond R. Hoare, Alex K. Jones, Dan Li, Shou-Kuo Shao, Shen-Chien Tung, Jiang Zheng 0002, Rami G. Melhem |
Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Joshua M. Lucas, Raymond Hoare, Alex K. Jones |
Optimizing Technology Mapping for FPGAs Using CAMs. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster |
An FPGA-based VLIW processor with custom hardware execution. |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
NIOS, parallelism, compiler, synthesis, kernels, VLIW |
| 1 | Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee |
Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee |
Handling Data Streams while Compiling C Programs onto Hardware. |
ISVLSI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Prithviraj Banerjee |
An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs. (PDF / PS) |
FCCM |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Prithviraj Banerjee |
An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. |
FPGA |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee |
PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. |
CASES |
2002 |
DBLP DOI BibTeX RDF |
FPGA, low-power, compiler, SoC, synthesis, pipelining, VHDL, IP, ASIC, high-performance, FSM, Verilog, HDL, levelization |
| 1 | Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky |
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. |
FCCM |
2000 |
DBLP DOI BibTeX RDF |
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