| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chengmo Yang, Alex Orailoglu |
Tackling Resource Variations Through Adaptive Multicore Execution Frameworks.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuping Zhang, Chun Jason Xue, Chengmo Yang, Alex Orailoglu |
Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability.  |
J. Parallel Distrib. Comput.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Chengmo Yang, Ramesh Karri, Alex Orailoglu |
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge.  |
IEEE Computer  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Full Fault Resilience and Relaxed Synchronization Requirements at the Cache-Memory Interface.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost.  |
Asian Test Symposium  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Diagnosing scan clock delay faults through statistical timing pruning.  |
DAC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
Adaptive test optimization through real time learning of test effectiveness.  |
DATE  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Frugal but flexible multicore topologies in support of resource variation-driven adaptivity.  |
DATE  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Diagnosing scan chain timing faults through statistical feature analysis of scan images.  |
DATE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li |
Register allocation for simultaneous reduction of energy and peak temperature on registers.  |
DATE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Garo Bournoutian, Alex Orailoglu |
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors.  |
CODES+ISSS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Garo Bournoutian, Alex Orailoglu |
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions.  |
Design Autom. for Emb. Sys.  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Mingjing Chen, Alex Orailoglu |
Squashing code size in microcoded IPs while delivering high decompression speed.  |
Design Autom. for Emb. Sys.  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sunghoon Chun, Alex Orailoglu |
DiSC: A New Diagnosis Method for Multiple Scan Chain Failures.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | João Antonio Martino, Guido Araujo, Alex Orailoglu, Felipe Klein (eds.) |
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2010, São Paulo, Brazil, September 6-9, 2010  |
SBCCI  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Chengmo Yang, Chun Jason Xue, Alex Orailoglu |
Fine-grained adaptive CMP cache sharing through access history exploitation.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Raid Ayoub, Alex Orailoglu |
Performance and energy efficient cache migrationapproach for thermal management in embedded systems.  |
ACM Great Lakes Symposium on VLSI  |
2010 |
DBLP DOI BibTeX RDF |
cache migration, performance, energy efficiency |
| 1 | Mingjing Chen, Alex Orailoglu |
VDDmin test optimization for overscreening minimization through adaptive scan chain masking.  |
VTS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme.  |
DATE  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
Delay test quality maximization through process-aware selection of test set size.  |
ICCD  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Garo Bournoutian, Alex Orailoglu |
Dynamic, non-linear cache architecture for power-sensitive mobile processors.  |
CODES+ISSS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kwangyoon Lee, Alex Orailoglu |
High durability in NAND flash memory through effective page reuse mechanisms.  |
CODES+ISSS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu |
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Orailoglu, L. Pozzi |
Guest Editorial Special Section on the IEEE Symposium on Application Specific Processors 2008.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Mohammed Al-Mulla, Noora A. Shunaiber, Alex Orailoglu |
Scan Cell Positioning for Boosting the Compression of Fan-Out Networks.  |
J. Comput. Sci. Technol.  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Logic Mapping in Crossbar-Based Nanoarchitectures.  |
IEEE Design & Test of Computers  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Deflecting crosstalk by routing reconsideration through refined signal correlation estimation.  |
ACM Great Lakes Symposium on VLSI  |
2009 |
DBLP DOI BibTeX RDF |
signal correlation, routing, crosstalk |
| 1 | Chengmo Yang, Alex Orailoglu |
Processor reliability enhancement through compiler-directed register file peak temperature reduction.  |
DSN  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Raid Ayoub, Alex Orailoglu |
Filtering Global History: Power and Performance Efficient Branch Predictor.  |
ASAP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Garo Bournoutian, Alex Orailoglu |
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions.  |
CASES  |
2009 |
DBLP DOI BibTeX RDF |
compiler assisted hardware, pipeline stalls, embedded processors, data cache |
| 1 | Chengmo Yang, Alex Orailoglu |
Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude.  |
DATE  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Saturnino Garcia, Alex Orailoglu |
Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy.  |
DATE  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Flip-Flop Hardening and Selection for Soft Error and Delay Fault Resilience.  |
DFT  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Scan power reduction in linear test data compression scheme.  |
ICCAD  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Chengmo Yang, Mingjing Chen, Alex Orailoglu |
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses.  |
CODES+ISSS  |
2009 |
DBLP DOI BibTeX RDF |
microcode compression, microcoded processors |
| 1 | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
Scheduling Power-Constrained Tests through the SoC Functional Bus.  |
IEICE Transactions  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Garo Bournoutian, Alex Orailoglu |
Miss reduction in embedded processors through dynamic, power-friendly cache design.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
dynamic associativity, multi-core, embedded processors, data cache |
| 1 | Chengmo Yang, Alex Orailoglu |
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization.  |
CASES  |
2008 |
DBLP DOI BibTeX RDF |
fault detection, checkpointing, fault recovery |
| 1 | Kwangyoon Lee, Alex Orailoglu |
Application Specific Low Latency Instruction Cache for NAND Flash Memory Based Embedded Systems.  |
SASP  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu |
Towards fault tolerant parallel prefix adders in nanoelectronic systems.  |
DATE  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Test cost minimization through adaptive test development.  |
ICCD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kwangyoon Lee, Alex Orailoglu |
Application specific non-volatile primary memory for embedded systems.  |
CODES+ISSS  |
2008 |
DBLP DOI BibTeX RDF |
application specific information, non-volatile primary memory, embedded systems, nand flash memory, wear-leveling |
| 1 | Peter Petrov, Alex Orailoglu |
Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory.  |
International Journal of Parallel Programming  |
2007 |
DBLP DOI BibTeX RDF |
software-controlled caching, Embedded systems, low-power, memory management, cache organization |
| 1 | R. Iris Bahar, Dan W. Hammerstrom, Justin E. Harlow III, William H. Joyner Jr., Clifford Lau, Diana Marculescu, Alex Orailoglu, Massoud Pedram |
Architectures for Silicon Nanoelectronics and Beyond.  |
IEEE Computer  |
2007 |
DBLP DOI BibTeX RDF |
Silicon devices, Computer architectures, Nanotechnology |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Towards Nanoelectronics Processor Architectures.  |
J. Electronic Testing  |
2007 |
DBLP DOI BibTeX RDF |
fault tolerance, reliability, computational model, processor architecture, nanoelectronics, time redundancy, hardware redundancy |
| 1 | Yiorgos Makris, Alex Orailoglu |
On the identification of modular test requirements for low cost hierarchical test path construction.  |
Integration  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays.  |
DSN  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs.  |
CASES  |
2007 |
DBLP DOI BibTeX RDF |
synchronization, interprocessor communication |
| 1 | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses.  |
ASP-DAC  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs.  |
DATE  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingjing Chen, Alex Orailoglu |
Circuit-level mismatch modelling and yield optimization for CMOS analog circuits.  |
ICCD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Raid Ayoub, Alex Orailoglu |
Power efficient register file update approach for embedded processors.  |
ICCD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Predictable execution adaptivity through embedding dynamic reconfigurability into static MPSoC schedules.  |
CODES+ISSS  |
2007 |
DBLP DOI BibTeX RDF |
multiprocessor task schedulihng, reconfiguration, adaptive execution |
| 1 | Chengmo Yang, Alex Orailoglu |
Power-efficient instruction delivery through trace reuse.  |
PACT  |
2006 |
DBLP DOI BibTeX RDF |
adaptive processor, low-power design, instruction delivery |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Topology aware mapping of logic functions onto nanowire-based crossbar architectures.  |
DAC  |
2006 |
DBLP DOI BibTeX RDF |
logic synthesis, PLA, nanoelectronic, crossbar |
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics.  |
European Test Symposium  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chengmo Yang, Alex Orailoglu |
Power efficient branch prediction through early identification of branch addresses.  |
CASES  |
2006 |
DBLP DOI BibTeX RDF |
low-power design, application-specific processors, dynamic branch prediction |
| 1 | Mingjing Chen, Hosam Haggag, Alex Orailoglu |
Decision Tree Based Mismatch Diagnosis in Analog Circuits.  |
VTS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Nanofabric Topologies and Reconfiguration Algorithms to Support Dynamically Adaptive Fault Tolerance.  |
VTS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
Power-Constrained SOC Test Schedules through Utilization of Functional Buses.  |
ICCD  |
2006 |
DBLP BibTeX RDF |
|
| 1 | Peter Petrov, Alex Orailoglu |
A reprogrammable customization framework for efficient branch resolution in embedded processors.  |
ACM Trans. Embedded Comput. Syst.  |
2005 |
DBLP DOI BibTeX RDF |
Branch resolution, pipeline organization |
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Test power reductions through computationally efficient, decoupled scan chain modifications.  |
IEEE Transactions on Reliability  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ismet Bayraktaroglu, Alex Orailoglu |
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations.  |
IEEE Trans. Computers  |
2005 |
DBLP DOI BibTeX RDF |
Fault diagnosis, finite field arithmetic, scan-based BIST |
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Efficient RT-Level Fault Diagnosis.  |
J. Comput. Sci. Technol.  |
2005 |
DBLP DOI BibTeX RDF |
RT-level diagnosis, dictionary compaction, fault bit location tracing, fault diagnosis, fault simulation, fault dictionary |
| 1 | Carlos Galup-Montoro, Sergio Bampi, Alex Orailoglu (eds.) |
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005  |
SBCCI  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Rasit Onur Topaloglu, Alex Orailoglu |
A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs.  |
DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Petrov, Daniel Tracy, Alex Orailoglu |
Energy-effcient physically tagged caches for embedded processors with virtual memory.  |
DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault tolerant nanoelectronic processor architectures.  |
ASP-DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tongquan Wei, Kaijie Wu, Ramesh Karri, Alex Orailoglu |
Fault tolerant quantum cellular array (QCA) design using Triple Modular Redundancy with shifted operands.  |
ASP-DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Rasit Onur Topaloglu, Alex Orailoglu |
Forward discrete probability propagation method for device performance characterization under process variations.  |
ASP-DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Raid Ayoub, Alex Orailoglu |
A unified transformational approach for reductions in fault vulnerability, power, and crosstalk noise & delay on processor buses.  |
ASP-DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors.  |
ICCD  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu |
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test.  |
IEEE Transactions on Reliability  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Petrov, Alex Orailoglu |
Transforming Binary Code for Low-Power Embedded Processors.  |
IEEE Micro  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Fast and energy-frugal deterministic test through efficient compression and compaction techniques.  |
Journal of Systems Architecture  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Petrov, Alex Orailoglu |
Tag compression for low power in dynamically customizable embedded processors.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Sule Ozev, Alex Orailoglu |
Design of concurrent test Hardware for Linear analog circuits with constrained hardware overhead.  |
IEEE Trans. VLSI Syst.  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Petrov, Alex Orailoglu |
Low-power instruction bus encoding for embedded processors.  |
IEEE Trans. VLSI Syst.  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Alex Orailoglu |
Searching for Global Test Costs Optimization in Core-Based Systems.  |
J. Electronic Testing  |
2004 |
DBLP DOI BibTeX RDF |
design space exploration, design for test, SOC testing, embedded cores testing |
| 1 | Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu |
Seamless Test of Digital Components in Mixed-Signal Paths.  |
IEEE Design & Test of Computers  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Autonomous Yet Deterministic Test of SOC Cores.  |
ITC  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems.  |
ITC  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
Test Cost Reduction Through A Reconfigurable Scan Architecture.  |
ITC  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Efficient RT-level fault diagnosis methodology.  |
ASP-DAC  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Rasit Onur Topaloglu, Alex Orailoglu |
On mismatch in the deep sub-micron era - from physics to circuits.  |
ASP-DAC  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Scan Power Minimization through Stimulus and Response Transformations.  |
DATE  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
CircularScan: A Scan Architecture for Test Cost Reduction.  |
DATE  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Alex Orailoglu |
Design space exploration for aggressive test cost reduction in CircularScan architectures.  |
ICCAD  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenjing Rao, Alex Orailoglu, G. Su |
Frugal linear network-based test decompression for drastic test cost reductions.  |
ICCAD  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Sule Ozev, Alex Orailoglu |
End-to-End Testability Analysis and DfT Insertion for Mixed-Signal Paths.  |
ICCD  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu |
Extending the Applicability of Parallel-Serial Scan Designs.  |
ICCD  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Alex Orailoglu, Pai H. Chou, Petru Eles, Axel Jantsch (eds.) |
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004  |
CODES+ISSS  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Alex Orailoglu |
Guest Editor's Introduction.  |
International Journal of Parallel Programming  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ismet Bayraktaroglu, Alex Orailoglu |
Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs.  |
IEEE Trans. Computers  |
2003 |
DBLP DOI BibTeX RDF |
Test pattern compression, test pattern compaction, on-chip decompression, deterministic decompression, scan chains |
| 1 | Sule Ozev, Alex Orailoglu |
Statistical Tolerance Analysis for Assured Analog Test Coverage.  |
J. Electronic Testing  |
2003 |
DBLP DOI BibTeX RDF |
tolerance analysis, test signal propagation, statistical analysis, analog test |
| 1 | Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu |
Reducing Average and Peak Test Power Through Scan Chain Modification.  |
J. Electronic Testing  |
2003 |
DBLP DOI BibTeX RDF |
test power reduction, scan chain modification, average test power, peak test power, scan testing |
| 1 | Alex Orailoglu, Alexander V. Veidenbaum |
Guest Editors' Introduction: Application-Specific Microprocessors.  |
IEEE Design & Test of Computers  |
2003 |
DBLP BibTeX RDF |
|
| 1 | Ozgur Sinanoglu, Alex Orailoglu |
Compacting Test Responses for Deeply Embedded SoC Cores.  |
IEEE Design & Test of Computers  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Petrov, Alex Orailoglu |
Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors.  |
IEEE Design & Test of Computers  |
2003 |
DBLP DOI BibTeX RDF |
|