Search results for "Alexandru Nicolau"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Luis Angel D. Bathen, Nikil D. Dutt, Alex Nicolau, Puneet Gupta	VaMV: Variability-aware Memory Virtualization.	DATE	2012	DBLP BibTeX RDF
1	Matthew Badin, Lubomir Bic, Michael B. Dillencourt, Alexandru Nicolau	Improving accuracy for matrix multiplications on GPUs.	Scientific Programming	2011	DBLP DOI BibTeX RDF
1	Paolo D'Alberto, Marco Bodrato, Alexandru Nicolau	Exploiting parallelism in matrix-computation kernels for symmetric multiprocessor systems: Matrix-multiplication and matrix-addition algorithm optimizations by software pipelining and threads allocation.	ACM Trans. Math. Softw.	2011	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau	Modulo Scheduling and Loop Pipelining.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
1	Rosario Cammarota, Arun Kejariwal, Paolo D'Alberto, Sapan Panigrahi, Alexander V. Veidenbaum, Alexandru Nicolau	Pruning hardware evaluation space via correlation-driven application similarity analysis.	Conf. Computing Frontiers	2011	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos	Exploitation of nested thread-level speculative parallelism on multi-core systems.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	performance, thread-level speculation
1	Matthew Badin, Lubomir Bic, Michael B. Dillencourt, Alexandru Nicolau	Pretty Good Accuracy in Matrix Multiplication with GPUs.	ISPDC	2010	DBLP DOI BibTeX RDF	Compensated Summation, GPGPU, Matrix Multiplication, Floating Point
1	Alexandru Nicolau, Arun Kejariwal	How Many Threads to Spawn during Program Multithreading?	LCPC	2010	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos	On the efficacy of call graph-level thread-level speculation.	WOSP/SIPEW	2010	DBLP DOI BibTeX RDF	performance, thread-level speculation
1	Jayram Moorkanikara Nageswaran, Andrew Felch, Ashok Chandrasekhar, Nikil Dutt, Richard Granger, Alex Nicolau, Alexander V. Veidenbaum	Brain Derived Vision Algorithm on High Performance Architectures.	International Journal of Parallel Programming	2009	DBLP DOI BibTeX RDF
1	Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau	Optimizing control flow in loops using interval and dependence analysis.	Design Autom. for Emb. Sys.	2009	DBLP DOI BibTeX RDF
1	Jayram Moorkanikara Nageswaran, Nikil D. Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum	A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors.	Neural Networks	2009	DBLP DOI BibTeX RDF
1	Jayram Moorkanikara Nageswaran, Nikil Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum	Efficient simulation of large-scale Spiking Neural Networks using CUDA graphics processors.	IJCNN	2009	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito	On the exploitation of loop-level parallelism in embedded applications.	ACM Trans. Embedded Comput. Syst.	2009	DBLP DOI BibTeX RDF	multithreading, Multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops, system-on-chip (Soc)
1	Paolo D'Alberto, Alexandru Nicolau	Adaptive Winograd's matrix multiplications.	ACM Trans. Math. Softw.	2009	DBLP DOI BibTeX RDF	Winograd's matrix multiplications, fast algorithms
1	Darshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy	Performance Characterization of Itanium® 2-Based Montecito Processor.	SPEC Benchmark Workshop	2009	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos	Efficient Scheduling of Nested Parallel Loops on Multi-Core Systems.	ICPP	2009	DBLP DOI BibTeX RDF
1	Michael Gschwind, Alexandru Nicolau, Valentina Salapura, José E. Moreira (eds.)	Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009	ICS	2009	DBLP BibTeX RDF
1	Alexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal	Synchronization optimizations for efficient execution on multi-cores.	ICS	2009	DBLP DOI BibTeX RDF	compilers, synchronization, multithreading, code motion
1	Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Cache-aware partitioning of multi-dimensional iteration spaces.	SYSTOR	2009	DBLP DOI BibTeX RDF	partitioning, parallel loops, iteration space
1	Alexandru Nicolau, Guangqiang Li, Arun Kejariwal	Techniques for efficient placement of synchronization primitives.	PPOPP	2009	DBLP DOI BibTeX RDF	performance, parallelization, compilers, multithreading
1	Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau	Control flow optimization in loops using interval analysis.	CASES	2008	DBLP DOI BibTeX RDF	algorithmic code transformation, compiler loop optimization, interval analysis
1	Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie	Register File Power Reduction Using Bypass Sensitive Compiler.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Xinmin Tian, Milind Girkar, Hideki Saito, Utpal Banerjee	Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor.	ICSAMOS	2008	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Cache-aware iteration space partitioning.	PPOPP	2008	DBLP DOI BibTeX RDF	load balancing, caches
1	Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum	Impact of JVM superoperators on energy consumption in resource-constrained embedded systems.	LCTES	2008	DBLP DOI BibTeX RDF	superoperators, embedded systems, java virtual machine, energy estimation, profile-guided optimization
1	Radu Cornea, Alex Nicolau, Nikil Dutt	Annotation Integration and Trade-off Analysis for Multimedia Applications.	IPDPS	2007	DBLP DOI BibTeX RDF
1	Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau	Short-Circuit Compiler Transformation: Optimizing Conditional Blocks.	ASP-DAC	2007	DBLP DOI BibTeX RDF
1	Jeff Furlong, Andrew Felch, Jayram Moorkanikara Nageswaran, Nikil Dutt, Alex Nicolau, Alexander V. Veidenbaum, Ashok Chandrashekar, Richard Granger	Novel Brain-Derived Algorithms Scale Linearly with Number of Processing Elements.	PARCO	2007	DBLP BibTeX RDF
1	Paolo D'Alberto, Alexandru Nicolau	R-Kleene: A High-Performance Divide-and-Conquer Algorithm for the All-Pair Shortest Path for Densely Connected Networks.	Algorithmica	2007	DBLP DOI BibTeX RDF
1	Weiyu Tang, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau	A predictive decode filter cache for reducing power consumption in embedded processors.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	Cache, embedded processors, power optimization
1	Aviral Shrivastava, Sanghyun Park, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek	Automatic Design Space Exploration of Register Bypasses in Embedded Processors.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Shivajit Mohapatra, Nikil Dutt, Alexandru Nicolau, Nalini Venkatasubramanian	DYNAMO: A Cross-Layer Framework for End-to-End QoS and Energy Optimization in Mobile Handheld Devices.	IEEE Journal on Selected Areas in Communications	2007	DBLP DOI BibTeX RDF
1	Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum	A simplified java bytecode compilation system for resource-constrained embedded processors.	CASES	2007	DBLP DOI BibTeX RDF	superoperators, embedded systems, java virtual machine, adaptive optimization, profile-guided optimization
1	Paolo D'Alberto, Alexandru Nicolau	Adaptive Strassen's matrix multiplication.	ICS	2007	DBLP DOI BibTeX RDF	matrix multiplications, fast algorithms
1	Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum	Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	SPEC CPU benchmarks, performance evaluation, caches, branch prediction
1	Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li 0015, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Tight analysis of the performance potential of thread speculation using spec CPU 2006.	PPOPP	2007	DBLP DOI BibTeX RDF	conflict probability, misspeculation penalty, threading overhead, performance evaluation, speculative execution
1	Minyoung Kim, Hyunok Oh, Nikil Dutt, Alex Nicolau, Nalini Venkatasubramanian	PBPAIR: an energy-efficient error-resilient encoding using probability based power aware intra refresh.	Mobile Computing and Communications Review	2006	DBLP DOI BibTeX RDF
1	Radu Cornea, Alex Nicolau, Nikil Dutt	Video Stream Annotations for Energy Trade-offs in Multimedia Applications.	ISPDC	2006	DBLP DOI BibTeX RDF
1	Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alex Nicolau, Nikil Dutt, Yunheung Paek	Automatic generation of operation tables for fast exploration of bypasses in embedded processors.	DATE	2006	DBLP DOI BibTeX RDF
1	Radu Cornea, Alex Nicolau, Nikil Dutt	Annotation Based Multimedia Streaming Over Wireless Networks.	ESTImedia	2006	DBLP DOI BibTeX RDF
1	Aviral Shrivastava, Partha Biswas, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau	Compilation framework for code size reduction using reduced bit-width ISAs (rISAs).	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	codesize reduction, dual instruction set, narrow bit-width instruction set, rISA, register pressure-based code generation, thumb, optimization, compilers, Code generation, code compression, retargetable compilers
1	Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil D. Dutt, Rajesh K. Gupta	Energy efficient watermarking on mobile devices using proxy-based partitioning.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau	Expression equivalence checking using interval analysis.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau	Retargetable pipeline hazard detection for partially bypassed processors.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Milind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Probablistic Self-Scheduling.	Euro-Par	2006	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos	History-aware Self-Scheduling.	ICPP	2006	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Xinmin Tian, Wei Li 0015, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings.	ICS	2006	DBLP DOI BibTeX RDF	DOALL loops, value dependence, performance evaluation, data dependence, speculative execution, control dependence
1	Arun Kejariwal, Hideki Saito, Xinmin Tian, Milind Girkar, Wei Li 0015, Utpal Banerjee, Alexandru Nicolau, Constantine D. Polychronopoulos	Lightweight lock-free synchronization methods for multithreading.	ICS	2006	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Hideki Saito, Xinmin Tian, Milind Girkar, Utpal Banerjee, Constantine D. Polychronopoulos	A general approach for partitioning N-dimensional parallel nested loops with conditionals.	SPAA	2006	DBLP DOI BibTeX RDF	partitioning, conditionals, parallel loops, affine, Fourier-Motzkin elimination
1	Radu Cornea, Alexandru Nicolau, Nikil D. Dutt	Software annotations for power optimization on mobile devices.	DATE	2006	DBLP DOI BibTeX RDF
1	Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie	Bypass aware instruction scheduling for register file power reduction.	LCTES	2006	DBLP DOI BibTeX RDF	architecture-sensitive compiler, bypass-sensitive, forwarding paths, operation table, processor bypasses, reservation table, power consumption, register file
1	Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito	Challenges in exploitation of loop parallelism in embedded applications.	CODES+ISSS	2006	DBLP DOI BibTeX RDF	multithreading, multi-cores, vectorization, libraries, programming models, thread-level speculation, parallel loops
1	Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta	Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Cache-line size adaptivity, parameterized loop nests, interference, spatial locality
1	Ana Azevedo, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau	High performance annotation-aware JVM for Java cards.	EMSOFT	2005	DBLP DOI BibTeX RDF	superoperators, virtual machine, high performance, Java card
1	Minyoung Kim, Hyunok Oh, Nikil D. Dutt, Alexandru Nicolau, Nalini Venkatasubramanian	Probability Based Power Aware Error Resilient Coding.	ICDCS Workshops	2005	DBLP DOI BibTeX RDF
1	Shivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoungwoo Lee, Minyoung Kim, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau, Sandeep K. Shukla, Nalini Venkatasubramanian	A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems.	IPDPS	2005	DBLP DOI BibTeX RDF
1	Mohammad Ali Ghodrat, Tony Givargis, Alexandru Nicolau	Equivalence checking of arithmetic expressions using fast evaluation.	CASES	2005	DBLP DOI BibTeX RDF	expression equivalence, mutual exclusion, interval analysis
1	Arun Kejariwal, Alexandru Nicolau	An Efficient Load Balancing Scheme for Grid-based High Performance Scientific Computing.	ISPDC	2005	DBLP DOI BibTeX RDF
1	Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Eugene Earlie	PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors.	DATE	2005	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos	An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers.	LCPC	2005	DBLP DOI BibTeX RDF
1	Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau	Using a Way Cache to Improve Performance of Set-Associative Caches.	ISHPC	2005	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos	Enhanced Loop Coalescing: A Compiler Technique for Transforming Non-uniform Iteration Spaces.	ISHPC	2005	DBLP DOI BibTeX RDF
1	Paolo D'Alberto, Alexandru Nicolau	Using Recursion to Boost ATLAS's Performance.	ISHPC	2005	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta	Energy Analysis of Multimedia Watermarking on Mobile Handheld Devices.	ESTImedia	2005	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Constantine D. Polychronopoulos	A novel approach for partitioning iteration spaces with variable densities.	PPOPP	2005	DBLP DOI BibTeX RDF	partitioning, parallel loops, iteration space, unimodular transformation
1	Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau	Aggregating processor free time for energy reduction.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	processor free time, embedded systems, aggregation, clock gating, code transformation, energy reduction
1	Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau	Coordinated parallelizing compiler optimizations and high-level synthesis.	ACM Trans. Design Autom. Electr. Syst.	2004	DBLP DOI BibTeX RDF	dynamic CSE, parallelizing transformations, presynthesis, embedded systems, high-level synthesis, Code motions, common subexpression elimination
1	Sumit Gupta, Nicolae Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau	Using global code motions to improve the quality of results for high-level synthesis.	IEEE Trans. on CAD of Integrated Circuits and Systems	2004	DBLP DOI BibTeX RDF
1	Nikhil Bansal, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh K. Gupta	Interconnect-Aware Mapping of Applications to Coarse-Grain Reconfigurable Architectures.	FPL	2004	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta	Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices.	DAC	2004	DBLP DOI BibTeX RDF	partitioning, watermarking, proxy, handhelds
1	Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau	Caching Values in the Load Store Queue.	MASCOTS	2004	DBLP DOI BibTeX RDF
1	Nikhil Bansal, Sumit Gupta, Nikil Dutt, Alexandru Nicolau, Rajesh Gupta	Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures.	DATE	2004	DBLP DOI BibTeX RDF
1	Sumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru Nicolau	Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow.	DATE	2004	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Paolo D'Alberto, Alexandru Nicolau, Constantine D. Polychronopoulos	A Geometric Approach for Partitioning N-Dimensional Non-rectangular Iteration Spaces.	LCPC	2004	DBLP DOI BibTeX RDF
1	Paolo D'Alberto, Alexandru Nicolau	JuliusC: A Practical Approach for the Analysis of Divide-and-Conquer Algorithms.	LCPC	2004	DBLP DOI BibTeX RDF
1	Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau	Operation tables for scheduling in the presence of incomplete bypassing.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	hazard detection, operation table, reservation table, scheduling, retargetable compilers, bypass
1	Peter Grun, Nikil D. Dutt, Alexandru Nicolau	Access pattern-based memory and connectivity architecture exploration.	ACM Trans. Embedded Comput. Syst.	2003	DBLP DOI BibTeX RDF	Memory, access patterns, architecture exploration
1	Peter Grun, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau	RTGEN-an algorithm for automatic generation of reservation tables from architectural descriptions.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
1	Peter Grun, Nikil D. Dutt, Alexandru Nicolau	Memory architecture exploration for programmable embedded systems.		2003	RDF
1	Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau	Reducing data cache energy consumption via cached load/store queue.	ISLPED	2003	DBLP DOI BibTeX RDF	LSQ, load queue, store queue, low power, cache, memory, low energy, low latency
1	Radu Cornea, Nikil D. Dutt, Rajesh K. Gupta, Ingolf Krüger, Alexandru Nicolau, Douglas C. Schmidt, Sandeep K. Shukla	FORGE: A Framework for Optimization of Distributed Embedded Systems Software.	IPDPS	2003	DBLP DOI BibTeX RDF
1	Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau	SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations.	VLSI Design	2003	DBLP DOI BibTeX RDF
1	Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau	Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs.	DATE	2003	DBLP DOI BibTeX RDF
1	Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau	Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors.	DATE	2003	DBLP DOI BibTeX RDF
1	Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum	A Data Cache with Dynamic Mapping.	LCPC	2003	DBLP DOI BibTeX RDF
1	Shivajit Mohapatra, Radu Cornea, Nikil D. Dutt, Alexandru Nicolau, Nalini Venkatasubramanian	Integrated power management for video streaming to mobile handheld devices.	ACM Multimedia	2003	DBLP DOI BibTeX RDF	low-power, multimedia streaming, cross-layer adaptation
1	Manev Luthra, Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau	Interface Synthesis using Memory Mapping for an FPGA Platform.	ICCD	2003	DBLP DOI BibTeX RDF
1	Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem	Coordinated transformations for high-level synthesis of high performance microprocessor blocks.	DAC	2002	DBLP DOI BibTeX RDF	high-level synthesis, microprocessor design
1	Dan Grigoras, Alexandru Nicolau, Bernard Toursel, Bertil Folliot (eds.)	Advanced Environments, Tools, and Applications for Cluster Computing, NATO Advanced Research Workshop, IWCC 2001, Mangalia, Romania, September 1-6, 2001, Revised Papers	IWCC	2002	DBLP BibTeX RDF
1	Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi	A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design .	ISSS	2002	DBLP DOI BibTeX RDF	compressed instruction set, dual Instruction set, rISA, reduced bit-width instruction set, thumb, design space exploration, register pressure
1	Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta	Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis.	ISSS	2002	DBLP DOI BibTeX RDF	common sub-expression elimination, dynamic CSE, parallelizing transformations, high-level synthesis
1	Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau	Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language.	VLSI Design	2002	DBLP DOI BibTeX RDF	Pipeline Verification, Architecture Description Language
1	Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil D. Dutt, Alexandru Nicolau	An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs.	DATE	2002	DBLP DOI BibTeX RDF
1	Peter Grun, Nikil D. Dutt, Alexandru Nicolau	Memory System Connectivity Exploration.	DATE	2002	DBLP DOI BibTeX RDF
1	Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau	Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints.	DATE	2002	DBLP DOI BibTeX RDF
1	Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama	Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units.	DATE	2002	DBLP DOI BibTeX RDF
1	Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau	Power Savings in Embedded Processors through Decode Filer Cache.	DATE	2002	DBLP DOI BibTeX RDF
1	Weiyu Tang, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta	Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption.	ISHPC	2002	DBLP BibTeX RDF
1	Asheesh Khare, Ashok Halambi, Nicolae Savoiu, Peter Grun, Nikil Dutt, Alex Nicolau	V-SAT: A visual specification and analysis tool for system-on-chip exploration.	Journal of Systems Architecture	2001	DBLP DOI BibTeX RDF

Publications of Alexandru Nicolau Alex Nicolau ( http://dblp.L3S.de/Authors/Alexandru_Nicolau )