Search results for "Altamiro Amadeu Susin"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	César A. M. Marcon, Ney Calazans, Edson I. Moreno, Fernando Moraes, Fabiano Hessel, Altamiro Amadeu Susin	CAFES: A framework for intrachip application modeling and communication architecture design.	J. Parallel Distrib. Comput.	2011	DBLP DOI BibTeX RDF
1	Debora Matos, Caroline Concatto, Márcio Eduardo Kreutz, Fernanda Lima Kastensmidt, Luigi Carro, Altamiro Amadeu Susin	Reconfigurable Routers for Low Power and High Performance.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Valter Roesler, Ricardo Kintschner, Humberto Frohlich, Altamiro Amadeu Susin	High performance H.264/AVC encoding motion prediction algorithm.	ICIP	2011	DBLP DOI BibTeX RDF
1	Cláudio Machado Diniz, Bruno Zatt, Cristiano Thiele, Altamiro Amadeu Susin, Sergio Bampi, Felipe Sampaio, Daniel Palomino, Luciano Volcan Agostini	A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz	Monitor-adapter coupling for NOC performance tuning.	ICSAMOS	2010	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Mariano Majolo, Altamiro Amadeu Susin, Valter Roesler, José Valdeni de Lima	Highly Efficient Transforms Module Solution for a H.264/SVC Encoder.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Mariano Majolo, Valter Roesler, José Valdeni de Lima, Altamiro Amadeu Susin	Highly efficient forward two-dimensional DCT module architecture for H.264/SVC.	International Symposium on Rapid System Prototyping	2010	DBLP DOI BibTeX RDF
1	Alexsandro Cristovão Bonatto, André Borin Soares, Adriano Renner, Altamiro Amadeu Susin, Leandro Max Silva, Sergio Bampi	A 720p H.264/AVC decoder ASIC implementation for digital television set-top boxes.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Debora Matos, Miklecio Costa, Luigi Carro, Altamiro Amadeu Susin	Network interface to synchronize multiple packets on NoC-based Systems-on-Chip.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Mariano Majolo, Victor Guimaraes, Altamiro Amadeu Susin, Valter Roesler, José Valdeni de Lima	Hardware integrated quantization solution for improvement of computational H.264 encoder module.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Ricardo Kintschner, Valter Roesler, José Valdeni de Lima, Altamiro Amadeu Susin	Proposal of an improved motion estimation module for SVC.	SAC	2010	DBLP DOI BibTeX RDF	H.264 video encoder, SVC standard, motion estimation
1	Debora Matos, Luigi Carro, Altamiro Amadeu Susin	Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Fábio Luís Livi Ramos, Bruno Zatt, Thaísa Leal da Silva, Altamiro Amadeu Susin, Sergio Bampi	A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding.	ICECS	2010	DBLP DOI BibTeX RDF
1	Thaísa Leal da Silva, João Alberto Vortmann, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi	Low Cost and Memoryless CAVLD Architecture for H.264/AVC Decoder.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz	NoC Power Optimization Using a Reconfigurable Router.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Thaísa Leal da Silva, Fabio Pereira, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini	High performance and low cost architecture for H.264/AVC CAVLD targeting HDTV.	SBCCI	2009	DBLP DOI BibTeX RDF	CAVLD, H.264/AVC, video compression, hardware architectures
1	Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Érika F. Cota, Márcio Eduardo Kreutz	Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router.	SBCCI	2009	DBLP DOI BibTeX RDF	reconfigurable router, fault tolerance, reliability, network-on-chip, NoC
1	Cláudio Machado Diniz, Bruno Zatt, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi	A real time H.264/AVC intra frame prediction hardware architecture for HDTV 1080P video.	ICME	2009	DBLP DOI BibTeX RDF
1	Debora Matos, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin	The Need for Reconfigurable Routers in Networks-on-Chip.	ARC	2009	DBLP DOI BibTeX RDF	heterogeneous NoC, reconfigurable router, buffer, FIFO
1	Vagner S. Rosa, Altamiro Amadeu Susin, Sergio Bampi	A High Performance H.264 Deblocking Filter.	PSIVT	2009	DBLP DOI BibTeX RDF
1	Thaísa Leal da Silva, Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini	High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard.	ICECS	2009	DBLP DOI BibTeX RDF
1	Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini	High throughput architecture for H.264/AVC motion compensation sample interpolator for HDTV.	SBCCI	2008	DBLP DOI BibTeX RDF	video coding, H.264/AVC, motion compensation, hardware architectures
1	Luciano Severino de Paula, Altamiro Amadeu Susin, Sergio Bampi	A wide band CMOS differential voltage-controlled ring oscillator.	SBCCI	2008	DBLP DOI BibTeX RDF	SSB mixer, wide-band oscillators, voltage-controlled oscillator, frequency synthesizer
1	André Borin Soares, Alexsandro Cristovão Bonatto, Altamiro Amadeu Susin	A new march sequence to fit DDR SDRAM test in burst mode.	SBCCI	2008	DBLP DOI BibTeX RDF	DDR SDRAM, march algorithms, built-in self test, system on chip, memory test
1	Ronaldo Husemann, Altamiro Amadeu Susin, Valter Roesler	A new pipelined architecture of an H.264/MPEG-4 AVC deblocking filter.	SBCCI	2008	DBLP DOI BibTeX RDF	H.264, programmable logic, video encoder, deblocking filter
1	Marcelo Schiavon Porto, Sergio Bampi, Altamiro Amadeu Susin, Luciano Volcan Agostini	Architectural design for the new QSDS with dynamic iteration control motion estimation algorithm targeting HDTV.	SBCCI	2008	DBLP DOI BibTeX RDF	motion estimation, architectural design, fast algorithm
1	Marcelo Schiavon Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin	A high throughput and low cost diamond search architecture for HDTV motion estimation.	ICME	2008	DBLP DOI BibTeX RDF
1	Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini	HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Luciano Volcan Agostini, Arnaldo P. Azevedo Filho, Wagston T. Staehler, Vagner S. Rosa, Bruno Zatt, Ana Cristina M. Pinto, Roger Endrigo Carvalho Porto, Sergio Bampi, Altamiro Amadeu Susin	Design and FPGA Prototyping of a H.264/AVC Main Profile.	J. Braz. Comp. Soc.	2007	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Noise Figure Evaluation Using Low Cost BIST	CoRR	2007	DBLP BibTeX RDF
1	César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel	Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique	CoRR	2007	DBLP BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Reducing Test Time Using an Enhanced RF Loopback.	J. Electronic Testing	2007	DBLP DOI BibTeX RDF	Loopback test, RF test
1	Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi	Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Luciano Severino de Paula, Eric E. Fabris, Sergio Bampi, Altamiro Amadeu Susin	A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin	FPGA Prototyping Strategy for a H.264/AVC Video Decoder.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
1	Vagner S. Rosa, Altamiro Amadeu Susin, Sergio Bampi	An HDTV H.264 deblocking filter in FPGA with RGB video output.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Digital Generation of Signals for Low Cost RF BIST.	European Test Symposium	2007	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Adão Antônio de Souza Jr., Luigi Carro, Altamiro Amadeu Susin	RF Digital Signal Generation Beyond Nyquist.	VTS	2007	DBLP DOI BibTeX RDF
1	Marcelo Schiavon Porto, Luciano Volcan Agostini, Leandro Rosa, Altamiro Amadeu Susin, Sergio Bampi	High Throughput Hardware Architecture for Motion Estimation with 4: 1 Pel Subsampling Targeting Digital Television Applications.	PSIVT	2007	DBLP DOI BibTeX RDF	Motion estimation, hardware architecture, FPGA design
1	Thaísa Leal da Silva, Cláudio Machado Diniz, João Alberto Vortmann, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi	A Pipelined 8x8 2-D Forward DCT Hardware Architecture for H.264/AVC High Profile Encoder.	PSIVT	2007	DBLP DOI BibTeX RDF	8x8 2-D DCT, H.264/AVC standard, Video compression, Architectural Design
1	Bruno Zatt, Valter Ferreira, Luciano Volcan Agostini, Flávio Rech Wagner, Altamiro Amadeu Susin, Sergio Bampi	Motion Compensation Hardware Accelerator Architecture for H.264/AVC.	PSIVT	2007	DBLP DOI BibTeX RDF	MPEG-4 AVC, Video Coding, H.264/AVC, Motion Compensation, Hardware Acceleration
1	Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin	FPGA Design of A H.264/AVC Main Profile Decoder for HDTV.	FPL	2006	DBLP DOI BibTeX RDF
1	Wagston T. Staehler, Eduardo A. Berriel, Altamiro Amadeu Susin, Sergio Bampi	Architecture of an HDTV Intraframe Predictor for a H.264 Decoder.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	André Borin Soares, Luigi Carro, Altamiro Amadeu Susin	Reconfigurable communications for image processing applications.	IPDPS	2006	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	An improved RF loopback for test time reduction.	DATE	2006	DBLP DOI BibTeX RDF
1	André Borin Soares, Altamiro Amadeu Susin, Leticia V. Guimaraes	Automatic generation of neural networks for image processing.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Alex Ngouanga, Gilles Sassatelli, Lionel Torres, Thierry Gil, André Borin Suarez, Altamiro Amadeu Susin	Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES' Platform.	ARC	2006	DBLP DOI BibTeX RDF
1	Alex Ngouanga, Gilles Sassatelli, Lionel Torres, André Borin Soares, Altamiro Amadeu Susin	A Contextual Resources use: a Proof of Concept through the APACHES' Platform.	DDECS	2006	DBLP BibTeX RDF
1	Maria Da Gloria Flores, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin, Felipe R. Clayton, Cristiano Benevento	Low Cost BIST for Static and Dynamic Testing of ADCs.	J. Electronic Testing	2005	DBLP DOI BibTeX RDF	ADC BIST, noise based testing, mixed-signal test
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Low Cost On-Line Testing Strategy for RF Circuits.	J. Electronic Testing	2005	DBLP DOI BibTeX RDF	on-line analog testing, DSP-based testing, analog test
1	César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Models for Embedded Application Mapping onto NoCs: Timing Analysis.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
1	Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Flávio Rech Wagner, Altamiro Amadeu Susin	Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures.	SBCCI	2005	DBLP DOI BibTeX RDF	mapping and optimization algorithms, systems-on-chip, networks-on-chip
1	José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin	Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation.	SBCCI	2005	DBLP DOI BibTeX RDF	traffic effect, networks-on-chip, energy estimation, application mapping
1	César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis	Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs.	VLSI-SoC	2005	DBLP DOI BibTeX RDF
1	Carla Lopes, Erik Schüler, Paulo Engel, Altamiro Amadeu Susin	ERP signal identification of Individuals at Risk for Alcoholism using Learning Vector Quantization Network.	CIBCB	2005	DBLP BibTeX RDF
1	César A. M. Marcon, André Borin Suarez, Altamiro Amadeu Susin, Luigi Carro, Flávio Rech Wagner	Time and energy efficient mapping of embedded applications onto NoCs.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel	Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.	DATE	2005	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Noise Figure Evaluation Using Low Cost BIST.	DATE	2005	DBLP DOI BibTeX RDF
1	Leticia V. Guimaraes, André Borin Soares, Viviane Cordeiro, Altamiro Amadeu Susin	Gradient pile up for edge detection on hardware.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Energy and latency evaluation of NoC topologies.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Rodrigo Ferrugem Cardoso, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin	Design space exploration on heterogeneous network-on-chip.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Maria Da Gloria Flores, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	INL and DNL estimation based on noise for ADC test.	IEEE T. Instrumentation and Measurement	2004	DBLP DOI BibTeX RDF
1	Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin	Abstract RTOS Modeling for Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
1	Cesar Albenes Zeferino, Frederico G. M. E. Santo, Altamiro Amadeu Susin	ParIS: a parameterizable interconnect switch for networks-on-chip.	SBCCI	2004	DBLP DOI BibTeX RDF	FPGA, systems-on-chip, networks-on-chip
1	Cesar Albenes Zeferino, Márcio Eduardo Kreutz, Altamiro Amadeu Susin	RASoC: A Router Soft-Core for Networks-on-Chip.	DATE	2004	DBLP DOI BibTeX RDF	FPGA, Systems-on-Chip, On-Chip Networks
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Low Cost Analog Testing of RF Signal Paths.	DATE	2004	DBLP DOI BibTeX RDF
1	Josias O. Mainardi, Adão Antônio de Souza Jr., Luigi Carro, Altamiro Amadeu Susin	A comparison of totally digital ADCs for SOCs.	ISCAS	2004	DBLP DOI BibTeX RDF
1	Leticia V. Guimaraes, André Borin Soares, Viviane Cordeiro, Altamiro Amadeu Susin	Gradient Pile up Algorithm for Edge Enhancement and Detection.	ICIAR	2004	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Low Cost On-Line Testing of RF Circuits.	IOLTS	2004	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Testing analog circuits using spectral analysis.	Microelectronics Journal	2003	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	A Statistical Sampler for a New On-Line Analog Test Method.	J. Electronic Testing	2003	DBLP DOI BibTeX RDF	DSP-based testing, on-line testing, analog test
1	Cesar Albenes Zeferino, Altamiro Amadeu Susin	SoCIN: A Parametric and Scalable Network-on-Chip.	SBCCI	2003	DBLP DOI BibTeX RDF	FPGA, Embedded Systems, Systems-on-Chip
1	Marcelo Negreiros, Erik Schüler, Luigi Carro, Altamiro Amadeu Susin	Testing RF Signal Paths Using Spectral Analysis and Subsampling.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Ultimate low cost analog BIST.	DAC	2003	DBLP DOI BibTeX RDF	DSP-based analog test, low cost analog BIST, test of analog circuits
1	Érika F. Cota, Márcio Eduardo Kreutz, Cesar Albenes Zeferino, Luigi Carro, Marcelo Lubaszewski, Altamiro Amadeu Susin	The Impact of NoC Reuse on the Testing of Core-based Systems.	VTS	2003	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Ultra Low Cost Analog BIST Using Spectral Analysis.	VTS	2003	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	A Statistical Sampler for a New On-line Analog Test Method.	IOLTW	2002	DBLP DOI BibTeX RDF
1	Márcio Eduardo Kreutz, Cesar Albenes Zeferino, Luigi Carro, Altamiro Amadeu Susin	Análise e Seleção de Redes de Interconexão para Síntese de Sistemas no Ambiente S3E2S.	RITA	2001	DBLP BibTeX RDF
1	Luigi Carro, Altamiro Amadeu Susin	A Risc Architecture to Explore HW/SW Parallelism in HW/SW Co-Design.	ECBS	1996	DBLP DOI BibTeX RDF
1	Luigi Carro, G. A. Pereira, C. Alba, Altamiro Amadeu Susin	System Design using ASIPs.	ECBS	1996	DBLP DOI BibTeX RDF
1	C. Alba, Luigi Carro, A. Lima, Altamiro Amadeu Susin	Embedded Systems Design with Frontend Compilers. (PDF / PS)	ICCD	1996	DBLP DOI BibTeX RDF

Publications of "Altamiro Amadeu Susin" ( http://dblp.L3S.de/Authors/Altamiro_Amadeu_Susin )