Search results for "Alvin R. Lebeck"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin	Address Translation Aware Memory Consistency.	IEEE Micro	2011	DBLP DOI BibTeX RDF
1	Meng Zhang, Alvin R. Lebeck, Daniel J. Sorin	Fractal Consistency: Architecting the Memory System to Facilitate Verification.	Computer Architecture Letters	2010	DBLP DOI BibTeX RDF
1	Constantin Pistol, Wutichai Chongchitmate, Christopher Dwyer, Alvin R. Lebeck	Architectural Implications of Nanoscale-Integrated Sensing and Computing.	IEEE Micro	2010	DBLP DOI BibTeX RDF	nanoarchitecture, DNA scaffold, self-assembly, optical computing, nanocomputing
1	Yang Liu, Chris Dwyer, Alvin R. Lebeck	Routing in self-organizing nano-scale irregular networks.	JETC	2010	DBLP DOI BibTeX RDF
1	Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin	Specifying and dynamically verifying address translation-aware memory consistency.	ASPLOS	2010	DBLP DOI BibTeX RDF	virtual memory, memory consistency, address translation, dynamic verification
1	Meng Zhang, Alvin R. Lebeck, Daniel J. Sorin	Fractal Coherence: Scalably Verifiable Cache Coherence.	MICRO	2010	DBLP DOI BibTeX RDF
1	Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin, Anne Bracy	UNified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all.	HPCA	2010	DBLP DOI BibTeX RDF
1	Constantin Pistol, Christopher Dwyer, Alvin R. Lebeck	Architectural implications of nanoscale integrated sensing and computing.	ASPLOS	2009	DBLP DOI BibTeX RDF	instruction fused computing, new computing domain, nanocomputing, biological computing
1	Yang Liu, Alvin R. Lebeck	Nano-Scale On-Chip Irregular Network Analysis.	ICCCN	2009	DBLP DOI BibTeX RDF
1	Constantin Pistol, Chris Dwyer, Alvin R. Lebeck	Nanoscale Optical Computing Using Resonance Energy Transfer Logic.	IEEE Micro	2008	DBLP DOI BibTeX RDF
1	Alvin R. Lebeck, Krishnendu Chakrabarty	Introduction to DAC 2007 special section.	JETC	2008	DBLP DOI BibTeX RDF
1	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck	A self-organizing defect tolerant SIMD architecture.	JETC	2007	DBLP DOI BibTeX RDF	Self-organizing, SIMD, data parallel, DNA, defect tolerance, nanocomputing, bit-serial
1	Tong Li, Alvin R. Lebeck, Daniel J. Sorin	Spin Detection Hardware for Improved Management of Multithreaded Systems.	IEEE Trans. Parallel Distrib. Syst.	2006	DBLP DOI BibTeX RDF	multithreaded system, scheduling, synchronization, virtualization, multiprocessor, Deadlock, spinning, performance counter, livelock
1	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin	NANA: A nano-scale active network architecture.	JETC	2006	DBLP DOI BibTeX RDF	Accumulator ISA, defect isolation, reverse path forwarding, active network, DNA, defect tolerance, self-assembly, carbon nanotube, nanoelectronics, nanocomputing
1	M. Hsiao, S. Shukla, M. Gokhale, Alvin R. Lebeck	Panel: Nano-computing - do we need new formal approaches?	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Jaidev P. Patwardhan, Vijeta Johri, Chris Dwyer, Alvin R. Lebeck	A defect tolerant self-organizing nanoscale SIMD architecture.	ASPLOS	2006	DBLP DOI BibTeX RDF	self-organizing, SIMD, data parallel, DNA, defect tolerance, nanocomputing, bit-serial
1	Constantin Pistol, Alvin R. Lebeck, Chris Dwyer	Design automation for DNA self-assembled nanostructures.	DAC	2006	DBLP DOI BibTeX RDF	nanostructure design, optimized self-assembly, DNA self-assembly
1	Heng Zeng, Carla Schlatter Ellis, Alvin R. Lebeck	Experiences in managing energy with ECOSystem.	IEEE Pervasive Computing	2005	DBLP DOI BibTeX RDF	operating system, resource management, processor scheduling, energy management
1	Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin	Self-Assembled Architectures and the Temporal Aspects of Computing.	IEEE Computer	2005	DBLP DOI BibTeX RDF
1	Tong Li, Carla Schlatter Ellis, Alvin R. Lebeck, Daniel J. Sorin	Pulse: A Dynamic Deadlock Detection Mechanism Using Speculative Execution.	USENIX Annual Technical Conference, General Track	2005	DBLP BibTeX RDF
1	Chia-Lin Yang, Alvin R. Lebeck, Hung-Wei Tseng, Chien-Hao Lee	Tolerating memory latency through push prefetching for pointer-intensive applications.	TACO	2004	DBLP DOI BibTeX RDF	linked data structures, pointer-chasing, Prefetch, memory hierarchy
1	Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee	Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for k-Ary n-Cube Networks.	IEEE Trans. Parallel Distrib. Syst.	2004	DBLP DOI BibTeX RDF	k{hbox{-}rm ary}n{hbox{-}rm cubes}, Interconnection networks, congestion control, self-tuning, wormhole, global information
1	Jaidev P. Patwardhan, Alvin R. Lebeck, Daniel J. Sorin	Communication breakdown: analyzing CPU usage in commercial Web workloads.	ISPASS	2004	DBLP DOI BibTeX RDF
1	Heng Zeng, Carla Schlatter Ellis, Alvin R. Lebeck, Amin Vahdat	Currentcy: A Unifying Abstraction for Expressing Energy Management Policies.	USENIX Annual Technical Conference, General Track	2003	DBLP BibTeX RDF
1	Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee	BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks.	IPDPS	2003	DBLP DOI BibTeX RDF	non-minimal routing, chaotic routing, Multiprocessor interconnection networks, routing algorithm, k-ary n-cubes, virtual cut-through
1	Xiaobo Fan, Carla Schlatter Ellis, Alvin R. Lebeck	The Synergy Between Power-Aware Memory Systems and Processor Voltage Scaling.	PACS	2003	DBLP DOI BibTeX RDF
1	Tong Li, Alvin R. Lebeck, Daniel J. Sorin	Quantifying instruction criticality for shared memory multiprocessors.	SPAA	2003	DBLP DOI BibTeX RDF	shared memory multiprocessors, slack, critical path analysis
1	Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K. Patnala, Mithuna Thottethodi	Recursive Array Layouts and Fast Matrix Multiplication.	IEEE Trans. Parallel Distrib. Syst.	2002	DBLP DOI BibTeX RDF	matrix multiplication, Data layout
1	Alvin R. Lebeck, Tong Li, Eric Rotenberg, Jinson Koppanalil, Jaidev P. Patwardhan	A Large, Fast Instruction Window for Tolerating Cache Misses. (PDF / PS)	ISCA	2002	DBLP DOI BibTeX RDF	Cache Memory, Memory Latency, Latency Tolerance, Instruction Window
1	Heng Zeng, Carla Schlatter Ellis, Alvin R. Lebeck, Amin Vahdat	ECOSystem: managing energy as a first class operating system resource.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	Xiaobo Fan, Carla Schlatter Ellis, Alvin R. Lebeck	Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets.	PACS	2002	DBLP DOI BibTeX RDF	Modeling, Petri Nets, DRAM, Memory Controller, Control Policy
1	Chia-Lin Yang, Alvin R. Lebeck	A Programmable Memory Hierarchy for Prefetching Linked Data Structures.	ISHPC	2002	DBLP BibTeX RDF
1	Philip J. Hanlon, Dean Chung, Siddhartha Chatterjee, Daniela Genius, Alvin R. Lebeck, Erin Parker	The Combinatorics of Cache Misses during Matrix Multiplication.	J. Comput. Syst. Sci.	2001	DBLP DOI BibTeX RDF
1	Siddhartha Chatterjee, Erin Parker, Philip J. Hanlon, Alvin R. Lebeck	Exact Analysis of the Cache Behavior of Nested Loops.	PLDI	2001	DBLP DOI BibTeX RDF
1	Srikanth T. Srinivasan, Roy Dz-Ching Ju, Alvin R. Lebeck, Chris Wilkerson	Locality vs. criticality.	ISCA	2001	DBLP DOI BibTeX RDF	Systems Application Architecture
1	Xiaobo Fan, Carla Schlatter Ellis, Alvin R. Lebeck	Memory controller policies for DRAM power management.	ISLPED	2001	DBLP DOI BibTeX RDF
1	Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S. Mukherjee	Self-Tuned Congestion Control for Multiprocessor Networks.	HPCA	2001	DBLP DOI BibTeX RDF
1	Chia-Lin Yang, Barton Sano, Alvin R. Lebeck	Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	geometry pipeline, paired-single instructions, 3D graphics, superscalar processors, SIMD instructions
1	Amin Vahdat, Alvin R. Lebeck, Carla Schlatter Ellis	Every joule is precious: the case for revisiting operating system design for energy efficiency.	ACM SIGOPS European Workshop	2000	DBLP DOI BibTeX RDF
1	Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schlatter Ellis	Power Aware Page Allocation.	ASPLOS	2000	DBLP DOI BibTeX RDF
1	Chia-Lin Yang, Alvin R. Lebeck	Push vs. pull: data movement for linked data structures.	ICS	2000	DBLP DOI BibTeX RDF
1	Srikanth T. Srinivasan, Alvin R. Lebeck	Load Latency Tolerance in Dynamically Scheduled Processors.	J. Instruction-Level Parallelism	1999	DBLP BibTeX RDF
1	Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, Mithuna Thottethodi	Annotated Memory References: A Mechanism for Informed Cache Management.	Euro-Par	1999	DBLP DOI BibTeX RDF
1	Siddhartha Chatterjee, Vibhor V. Jain, Alvin R. Lebeck, Shyam Mundhra, Mithuna Thottethodi	Nonlinear array layouts for hierarchical memory systems.	International Conference on Supercomputing	1999	DBLP DOI BibTeX RDF
1	Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K. Patnala, Mithuna Thottethodi	Recursive Array Layouts and Fast Parallel Matrix Multiplication.	SPAA	1999	DBLP DOI BibTeX RDF
1	Alvin R. Lebeck	Cache conscious programming in undergraduate computer science.	SIGCSE	1999	DBLP DOI BibTeX RDF
1	Chia-Lin Yang, Barton Sano, Alvin R. Lebeck	Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications.	MICRO	1998	DBLP BibTeX RDF
1	Srikanth T. Srinivasan, Alvin R. Lebeck	Load Latency Tolerance in Dynamically Scheduled Processors.	MICRO	1998	DBLP BibTeX RDF
1	Alvin R. Lebeck, David A. Wood	Active Memory: A New Abstraction for Memory System Simulation.	ACM Trans. Model. Comput. Simul.	1997	DBLP DOI BibTeX RDF	direct-execution simulation, on-the-fly simulation, memory hierarchy, Cache memory, trace-driven simulation
1	Ken Yocum, Jeffrey S. Chase, Andrew J. Gallatin, Alvin R. Lebeck	Cut-Through Delivery in Trapeze: An Exercise in Low-Latency Messaging. (PDF / PS)	HPDC	1997	DBLP DOI BibTeX RDF	message switching, cut-through delivery, low-latency messaging, I/O bus bandwidths, host I/O DMA transfers, network traversal, messaging substrate, network memory, Trapeze prototype, virtual memory pages, Myrinet cluster, DEC AlphaStations, network interfaces, computer clusters, network technology, application performance, messaging systems
1	Alvin R. Lebeck, David A. Wood	Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors.	ISCA	1995	DBLP DOI BibTeX RDF
1	Alvin R. Lebeck, David A. Wood	Active Memory: A New Abstraction for Memory-System Simulation.	SIGMETRICS	1995	DBLP DOI BibTeX RDF
1	Alvin R. Lebeck, Gurindar S. Sohi	Request Combining in Multiprocessors with Arbitrary Interconnection Networks.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	arbitrary interconnection networks, shared memory location, combining set, processor elements, simulationresults, parallel architectures, virtual machines, multiprocessors, message passing, multiprocessor interconnection networks, shared memory systems, design space, hot spots, message routing, parallel access, classification scheme, combining strategies
1	Alvin R. Lebeck, David A. Wood	Cache Profiling and the SPEC Benchmarks: A Case Study.	IEEE Computer	1994	DBLP DOI BibTeX RDF
1	Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, Ioannis Schoinas, Mark D. Hill, James R. Larus, Anne Rogers, David A. Wood	Application-specific protocols for user-level shared memory.	SC	1994	DBLP BibTeX RDF	CM-X
1	Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood	Fine-grain Access Control for Distributed Shared Memory.	ASPLOS	1994	DBLP DOI BibTeX RDF
1	David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, Shubhendu S. Mukherjee, Subbarao Palacharla, Steven K. Reinhardt	Mechanisms for Cooperative Shared Memory.	ISCA	1993	DBLP DOI BibTeX RDF
1	Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, David A. Wood	The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers.	SIGMETRICS	1993	DBLP DOI BibTeX RDF
1	Richard E. Kessler, Richard Jooss, Alvin R. Lebeck, Mark D. Hill	Inexpensive Implementations of Set-Associativity.	ISCA	1989	DBLP DOI BibTeX RDF

Publications of "Alvin R. Lebeck" ( http://dblp.L3S.de/Authors/Alvin_R._Lebeck )