Search results for "Anant Agarwal"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Henry Hoffmann, Stelios Sidiroglou, Michael Carbin, Sasa Misailovic, Anant Agarwal, Martin C. Rinard	Dynamic knobs for responsive power-aware computing.	ASPLOS	2011	DBLP DOI BibTeX RDF
1	Martina Maggio, Henry Hoffmann, Marco D. Santambrogio, Anant Agarwal, Alberto Leva	Decision making in autonomic computing systems: comparison of approaches and techniques.	ICAC	2011	DBLP DOI BibTeX RDF
1	Jonathan Eastep, David Wingate, Anant Agarwal	Smart data structures: an online machine learning approach to multicore data structures.	ICAC	2011	DBLP DOI BibTeX RDF
1	Omer Khan, Henry Hoffmann, Mieszko Lis, Farrukh Hijaz, Anant Agarwal, Srinivas Devadas	ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores.	ICCD	2011	DBLP DOI BibTeX RDF
1	David Wentzlaff, Charles Gruenwald III, Nathan Beckmann, Kevin Modzelewski, Adam Belay, Lamia Youseff, Jason E. Miller, Anant Agarwal	An operating system for multicore and clouds: mechanisms and implementation.	SoCC	2010	DBLP DOI BibTeX RDF
1	George Kurian, Jason E. Miller, James Psota, Jonathan Eastep, Jifeng Liu, Jürgen Michel, Lionel C. Kimerling, Anant Agarwal	ATAC: a 1000-core cache-coherent processor with on-chip optical network.	PACT	2010	DBLP DOI BibTeX RDF
1	Martina Maggio, Henry Hoffmann, Marco D. Santambrogio, Anant Agarwal, Alberto Leva	Controlling software applications via resource allocation within the heartbeats framework.	CDC	2010	DBLP DOI BibTeX RDF
1	Henry Hoffmann, Jonathan Eastep, Marco D. Santambrogio, Jason E. Miller, Anant Agarwal	Application heartbeats: a generic interface for specifying program performance and goals in autonomous computing environments.	ICAC	2010	DBLP DOI BibTeX RDF
1	Jonathan Eastep, David Wingate, Marco D. Santambrogio, Anant Agarwal	Smartlocks: lock acquisition scheduling for self-aware synchronization.	ICAC	2010	DBLP DOI BibTeX RDF
1	James Psota, Jason E. Miller, George Kurian, Henry Hoffmann, Nathan Beckmann, Jonathan Eastep, Anant Agarwal	ATAC: Improving performance and programmability with on-chip optical networks.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Jason E. Miller, Harshad Kasture, George Kurian, Charles Gruenwald III, Nathan Beckmann, Christopher Celio, Jonathan Eastep, Anant Agarwal	Graphite: A distributed parallel simulator for multicores.	HPCA	2010	DBLP DOI BibTeX RDF
1	Henry Hoffmann, David Wentzlaff, Anant Agarwal	Remote Store Programming.	HiPEAC	2010	DBLP DOI BibTeX RDF
1	Henry Hoffmann, Jonathan Eastep, Marco D. Santambrogio, Jason E. Miller, Anant Agarwal	Application heartbeats for software performance and health.	PPOPP	2010	DBLP DOI BibTeX RDF	adaptive algorithms
1	Jim Holt, Anant Agarwal, Sven Brehmer, Max J. Domeika, Patrick Griffin, Frank Schirrmeister	Software Standards for the Multicore Era.	IEEE Micro	2009	DBLP DOI BibTeX RDF
1	Peter G. Muzykov, Robert M. Kennedy, Qingchun Zhang, Craig Capell, Al Burk, Anant Agarwal, Tangali S. Sudarshan	Physical phenomena affecting performance and reliability of 4H-SiC bipolar junction transistors.	Microelectronics Reliability	2009	DBLP DOI BibTeX RDF
1	David Wentzlaff, Anant Agarwal	Factored operating systems (fos): the case for a scalable operating system for multicores.	Operating Systems Review	2009	DBLP DOI BibTeX RDF
1	Anant Agarwal	Keynote 3 (Banquet Talk) Digital space.	NOCS	2009	DBLP DOI BibTeX RDF
1	Anant Agarwal	Keynote: The Other Face of On-Chip Interconnect.	Hot Interconnects	2009	DBLP DOI BibTeX RDF
1	A. Grekov, Qingchun Zhang, Husna Fatima, Anant Agarwal, Tangali S. Sudarshan	Effect of crystallographic defects on the reverse performance of 4H-SiC JBS diodes.	Microelectronics Reliability	2008	DBLP DOI BibTeX RDF
1	David Yeh, Li-Shiuan Peh, Shekhar Borkar, John A. Darringer, Anant Agarwal, Wen-mei W. Hwu	Thousand-Core Chips [Roundtable].	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF
1	James Psota, Anant Agarwal	rMPI: Message Passing on Multicore Processors with On-Chip Interconnect.	HiPEAC	2008	DBLP DOI BibTeX RDF
1	David Wentzlaff, Patrick Griffin, Henry Hoffmann, Liewei Bao, Bruce Edwards, Carl Ramey, Matthew Mattina, Chyi-Chang Miao, John F. Brown III, Anant Agarwal	On-Chip Interconnection Architecture of the Tile Processor.	IEEE Micro	2007	DBLP DOI BibTeX RDF	MIMD processors, parallel architectures, mesh networks, multicore architectures, on-chip interconnection networks
1	Anant Agarwal, Markus Levy	The KILL Rule for Multicore.	DAC	2007	DBLP DOI BibTeX RDF
1	David Wentzlaff, Anant Agarwal	Constructing Virtual Architectures on a Tiled Processor.	CGO	2006	DBLP DOI BibTeX RDF
1	Jason E. Miller, Anant Agarwal	Software-based instruction caching for embedded processors.	ASPLOS	2006	DBLP DOI BibTeX RDF	instruction cache, chaining, software caching
1	Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Scalar Operand Networks.	IEEE Trans. Parallel Distrib. Syst.	2005	DBLP DOI BibTeX RDF	microprocessors, distributed architectures, Interconnection architectures
1	Andrew Ayers, Richard Schooler, Chris Metcalf, Anant Agarwal, Junghwan Rhee, Emmett Witchel	TraceBack: first fault diagnosis by reconstruction of distributed control flow.	PLDI	2005	DBLP DOI BibTeX RDF	fault diagnosis, instrumentation
1	Umar Saif, James W. Anderson, Anthony Degangi, Anant Agarwal	Gigabit routing on a software-exposed tiled-microprocessor.	ANCS	2005	DBLP DOI BibTeX RDF	RAW router, tiled architecture, programmable router
1	Michael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal	Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams.	ISCA	2004	DBLP DOI BibTeX RDF
1	David Wentzlaff, Anant Agarwal	A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation.	FCCM	2004	DBLP DOI BibTeX RDF
1	Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.	HPCA	2003	DBLP DOI BibTeX RDF
1	Michael Bedford Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae W. Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal	The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs.	IEEE Micro	2002	DBLP DOI BibTeX RDF
1	Csaba Andras Moritz, Donald Yeung, Anant Agarwal	SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures.	IEEE Trans. Parallel Distrib. Syst.	2001	DBLP DOI BibTeX RDF	modeling, architecture, Multiprocessors, microprocessors
1	Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Compiler Support for Scalable and Efficient Memory Systems.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	bank disambiguation, memory parallelism, Raw, Compiler, Maps, memory
1	Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan	Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors.	Compiler Optimizations for Scalable Parallel Systems Languages	2001	DBLP DOI BibTeX RDF
1	Donald Yeung, John Kubiatowicz, Anant Agarwal	Multigrain shared memory.	ACM Trans. Comput. Syst.	2000	DBLP DOI BibTeX RDF	symmetric multiprocessors, distributed memory, system of systems
1	Frederic T. Chong, Anant Agarwal	Shared Memory Versus Message Passing for Iterative Solution of Sparse Irregular Problems.	Parallel Processing Letters	1999	DBLP BibTeX RDF
1	Rajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal	Maps: A Compiler-Managed Memory System for Raw Machines.	ISCA	1999	DBLP DOI BibTeX RDF
1	Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz	The MIT Alewife Machine: Architecture and Performance.	25 Years ISCA: Retrospectives and Reprints	1998	DBLP DOI BibTeX RDF
1	Anant Agarwal	Retrospective: The MIT Alewife Machine: Architecture and Performance.	25 Years ISCA: Retrospectives and Reprints	1998	DBLP DOI BibTeX RDF
1	Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz	An Evaluation of Directory Schemes for Cache Coherence.	25 Years ISCA: Retrospectives and Reprints	1998	DBLP DOI BibTeX RDF
1	Dileep Bhandarkar, Anant Agarwal (eds.)	ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 3-7, 1998.	ASPLOS	1998	DBLP BibTeX RDF
1	Csaba Andras Moritz, Donald Yeung, Anant Agarwal	Exploring Optimal Cost-Performance Designs for Raw Microprocessors. (PDF / PS)	FCCM	1998	DBLP DOI BibTeX RDF
1	Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal	The Sensitivity of Communication Mechanisms to Bandwidth and Latency.	HPCA	1998	DBLP DOI BibTeX RDF
1	Kenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek	Exploiting Two-Case Delivery for Fast Protected Messaging.	HPCA	1998	DBLP DOI BibTeX RDF
1	Jonathan Babb, Russell Tessier, Matthew Dahl, Silvina Hanono, David M. Hoki, Anant Agarwal	Logic emulation with virtual wires.	IEEE Trans. on CAD of Integrated Circuits and Systems	1997	DBLP DOI BibTeX RDF
1	Elliot Waingold, Michael Bedford Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal	Baring It All to Software: Raw Machines.	IEEE Computer	1997	DBLP DOI BibTeX RDF
1	Jonathan Babb, Matthew Frank, Victor Lee, Elliot Waingold, Rajeev Barua, Michael Bedford Taylor, Jang Kim, Devabhaktuni Srikrishna, Anant Agarwal	The RAW benchmark suite: computation structures for general purpose computing.	FCCM	1997	DBLP DOI BibTeX RDF
1	Matthew Frank, Anant Agarwal, Mary K. Vernon	LoPC: Modeling Contention in Parallel Algorithms.	PPOPP	1997	DBLP DOI BibTeX RDF
1	Frederic T. Chong, Beng-Hong Lim, Ricardo Bianchini, John Kubiatowicz, Anant Agarwal	Application Performance on the MIT Alewife Machine.	IEEE Computer	1996	DBLP DOI BibTeX RDF
1	Donald Yeung, John Kubiatowicz, Anant Agarwal	MGS: A Multigrain Shared Memory System.	ISCA	1996	DBLP DOI BibTeX RDF
1	Rajeev Barua, David A. Kranz, Anant Agarwal	Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors.	LCPC	1996	DBLP DOI BibTeX RDF
1	Anant Agarwal, David A. Kranz, Venkat Natarajan	Automatic Partitioning of Parallel Loops and Data Arrays for Distributed Shared-Memory Multiprocessors.	IEEE Trans. Parallel Distrib. Syst.	1995	DBLP DOI BibTeX RDF	Automatic loop partitioning, minimizing communication, compilers, shared-memory multiprocessors, tiling
1	Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, Donald Yeung	The MIT Alewife Machine: Architecture and Performance.	ISCA	1995	DBLP DOI BibTeX RDF
1	Charles Selvidge, Anant Agarwal, Matthew Dahl, Jonathan Babb	TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation.	FPGA	1995	DBLP DOI BibTeX RDF
1	G. N. Srinivasa Prasanna, Anant Agarwal, Bruce R. Musicus	Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	hierarchicalcompilation, macro dataflow graphs, macro operations, precedenceconstraints, multiple nested loops, partitioning phase, close-to-optimal run-times, prototype structure-driven compiler, Alewife multiprocessor, simulator, performance evaluation, performance, multiprocessing systems, program compilers, processor allocation, nested loops, local memory, SDC
1	Anant Agarwal, John V. Guttag, Christoforos N. Hadjicostis, Marios C. Papaefthymiou	Memory Assignment for Multiprocessor Caches through Grey Coloring.	PARLE	1994	DBLP DOI BibTeX RDF
1	David Chaiken, Anant Agarwal	Software-Extended Coherent Shared Memory: Performance and Cost.	ISCA	1994	DBLP DOI BibTeX RDF
1	Beng-Hong Lim, Anant Agarwal	Reactive Synchronization Algorithms for Multiprocessors.	ASPLOS	1994	DBLP DOI BibTeX RDF
1	Beng-Hong Lim, Anant Agarwal	Waiting Algorithms for Synchronization in Large-Scale Multiprocessors.	ACM Trans. Comput. Syst.	1993	DBLP DOI BibTeX RDF	producer-consumer synchronization, competitive analysis, locks, blocking, spinning, waiting time, barriers
1	Anant Agarwal, Steven D. Pudar	Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct-Mapped Caches.	ISCA	1993	DBLP DOI BibTeX RDF
1	Anant Agarwal, David A. Kranz, Venkat Natarajan	Automatic Partitioning of Parallel Loops for Cache-Coherent Multiprocessors.	ICPP	1993	DBLP BibTeX RDF
1	John Kubiatowicz, Anant Agarwal	Anatomy of a Message in the Alewife Multiprocessor.	International Conference on Supercomputing	1993	DBLP DOI BibTeX RDF
1	Jory Tsai, Anant Agarwal	Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling.	SIGMETRICS	1993	DBLP DOI BibTeX RDF
1	Donald Yeung, Anant Agarwal	Experience with Fine-Grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient.	PPOPP	1993	DBLP DOI BibTeX RDF
1	David A. Kranz, Kirk L. Johnson, Anant Agarwal, John Kubiatowicz, Beng-Hong Lim	Integrating Message-Passing and Shared-Memory: Early Experience.	PPOPP	1993	DBLP DOI BibTeX RDF
1	Anant Agarwal	Performance Tradeoffs in Multithreaded Processors.	IEEE Trans. Parallel Distrib. Syst.	1992	DBLP DOI BibTeX RDF	context-switchingoverhead, multiprocessingsystems, performance evaluation, parallel algorithms, caches, multiprocessor interconnection networks, storage management, data-sharing, buffer storage, switching theory, multithreaded processors, network bandwidth, network contention, parallelprogramming, cache interference
1	John Kubiatowicz, David Chaiken, Anant Agarwal	Closing the Window of Vulnerability in Multiphase Memory Transactions.	ASPLOS	1992	DBLP DOI BibTeX RDF
1	G. N. Srinivasa Prasanna, Anant Agarwal	Compile-time Techniques for Processor Allocation in Macro Dataflow Graphs for Multiprocessors.	ICPP	1992	DBLP BibTeX RDF
1	David A. Kranz, Beng-Hong Lim, Kirk L. Johnson, John Kubiatowicz, Anant Agarwal	Integrating Message-Passing and Shared-Memory: Early Experience.	SIGPLAN Workshop	1992	DBLP DOI BibTeX RDF
1	Anant Agarwal, Jonathan Babb, David Chaiken, Godfrey D'Souza, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Gino Maa, Kenneth Mackenzie, Daniel Nussbaum, Mike Parkin, Donald Yeung	Sparcle: A Multithreaded VLSI Processor for Parallel Computing.	Parallel Symbolic Computing	1992	DBLP DOI BibTeX RDF
1	Anant Agarwal	Limits on Interconnection Network Performance.	IEEE Trans. Parallel Distrib. Syst.	1991	DBLP DOI BibTeX RDF	buffered networks, interconnection network performance, wiredelays, two-dimensionalnetwork, switch delays, four-dimensional networks, networkbandwidth requirements, multiprocessor interconnection networks, latency, direct networks, network contention, performanceevaluation, closed-form expression, packet size, communication locality
1	Daniel Nussbaum, Anant Agarwal	Scalability of Parallel Machines.	Commun. ACM	1991	DBLP DOI BibTeX RDF
1	David Chaiken, John Kubiatowicz, Anant Agarwal	LimitLESS Directories: A Scalable Cache Coherence Scheme.	ASPLOS	1991	DBLP DOI BibTeX RDF
1	David Chaiken, Craig Fields, Kiyoshi Kurihara, Anant Agarwal	Directory-Based cache Coherence in Large-Scale Multiprocessors.	IEEE Computer	1990	DBLP DOI BibTeX RDF
1	Anant Agarwal, Beng-Hong Lim, David A. Kranz, John Kubiatowicz	APRIL: A Processor Architecture for Multiprocessing.	ISCA	1990	DBLP DOI BibTeX RDF
1	Daniel Nussbaum, Ingmar Vuong-Adlerberg, Anant Agarwal	Modeling a Circuit Switched Multiprocessor Interconnect.	SIGMETRICS	1990	DBLP DOI BibTeX RDF
1	Anant Agarwal, Minor Huffman	Blocking: Exploiting Spatial Locality for Trace Compaction.	SIGMETRICS	1990	DBLP DOI BibTeX RDF
1	Anant Agarwal, Mark Horowitz, John L. Hennessy	An Analytical Cache Model.	ACM Trans. Comput. Syst.	1989	DBLP DOI BibTeX RDF
1	Anant Agarwal, Mathews Cherian	Adaptive Backoff Synchronization Techniques.	ISCA	1989	DBLP DOI BibTeX RDF
1	Susan S. Owicki, Anant Agarwal	Evaluating the Performance of Software Cache Coherence.	ASPLOS	1989	DBLP DOI BibTeX RDF
1	Anant Agarwal, John L. Hennessy, Mark Horowitz	Cache Performance of Operating System and Multiprogramming Workloads.	ACM Trans. Comput. Syst.	1988	DBLP DOI BibTeX RDF
1	Richard L. Sites, Anant Agarwal	Multiprocessor Cache Analysis Using ATUM.	ISCA	1988	DBLP BibTeX RDF
1	Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz	An Evaluation of Directory Schemes for Cache Coherence.	ISCA	1988	DBLP BibTeX RDF
1	Anant Agarwal, Anoop Gupta	Memory-Reference Characteristics of Multiprocessor Applications under MACH.	SIGMETRICS	1988	DBLP DOI BibTeX RDF	VAX
1	Anant Agarwal, Richard L. Sites, Mark Horowitz	ATUM: A New Technique for Capturing Address Traces Using Microcode.	ISCA	1986	DBLP DOI BibTeX RDF

Publications of "Anant Agarwal" ( http://dblp.L3S.de/Authors/Anant_Agarwal )