Search results for "BIST Synthesis"

Found 17 publication records. Showing 17 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Abdil Rashid Mohamed, Zebo Peng, Petru Eles	A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead.	J. Comput. Sci. Technol.	2005	DBLP DOI BibTeX RDF	BIST insertion, wiring area, simulated annealing, test synthesis
1	Abdil Rashid Mohamed, Zebo Peng, Petru Eles	A Wiring-Aware Approach to Minimizing Built-in Self-Test Overhead.	DELTA	2004	DBLP DOI BibTeX RDF
1	Abdil Rashid Mohamed, Zebo Peng, Petru Eles	A Heuristic for Wiring-Aware Built-In Self-Test Synthesis.	DSD	2004	DBLP DOI BibTeX RDF	BIST insertion, wiring area, test synthesis
1	Petr Fiser, Hana Kubatova	Survey of the Algorithms in the Column-Matching BIST Method.	IOLTS	2004	DBLP DOI BibTeX RDF
1	Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian	Switching activity generation with automated BIST synthesis forperformance testing of interconnects.	IEEE Trans. on CAD of Integrated Circuits and Systems	2001	DBLP DOI BibTeX RDF
1	David Berthelot, Marie-Lise Flottes, Bruno Rouzeyre	A Method for Trading off Test Time, Area and Fault Coverage in Datapath BIST Synthesis.	J. Electronic Testing	2001	DBLP DOI BibTeX RDF	BIST, datapath, high level test synthesis
1	A. Irion, Gundolf Kiefer, Harald P. E. Vranken, Hans-Joachim Wunderlich	Circuit partitioning for efficient logic BIST synthesis.	DATE	2001	DBLP DOI BibTeX RDF	divide-and-conquer, circuit partitioning, deterministic BIST
1	Xiaodong Zhang, Kaushik Roy	Peak Power Reduction in Low Power BIST.	ISQED	2000	DBLP DOI BibTeX RDF	BIST Synthesis, Weighted Random Pattern Generator, Testing, Low Power
1	Han Bin Kim, Dong Sam Ha, Takeshi Takahashi, Takahiro J. Yamaguchi	A new approach to built-in self-testable datapath synthesis based on integer linear programming.	IEEE Trans. VLSI Syst.	2000	DBLP DOI BibTeX RDF
1	Han Bin Kim, Dong Sam Ha	A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming.	ITC	1999	DBLP DOI BibTeX RDF
1	Han Bin Kim, Dong Sam Ha, Takeshi Takahashi	On ILP Formulations for Built-In Self-Testable Data Path Synthesis.	DAC	1999	DBLP DOI BibTeX RDF	high-level BIST synthesis, built-in self-test, BIST, ILP
1	Xiaodong Zhang, Kaushik Roy	Design and Synthesis of Low Power Weighted Random Pattern Generator Considering Peak Power Reduction. (PDF / PS)	DFT	1999	DBLP DOI BibTeX RDF	BIST Synthesis, Weighted Random Pattern Generator, Low Power BIST, Testing, Low Power, Cellular Automata, Peak Power
1	Xiaowei Li, Paul Y. S. Cheung	Exploiting Test Resource Optimization in Data Path Synthesis for BIST.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
1	Xiaowei Li, Paul Y. S. Cheung	High-Level BIST Synthesis for Delay Testing. (PDF / PS)	DFT	1998	DBLP DOI BibTeX RDF
1	Han Bin Kim, Takeshi Takahashi, Dong Sam Ha	Test session oriented built-in self-testable data path synthesis.	ITC	1998	DBLP DOI BibTeX RDF
1	Tom Eberle, Robert McVay, Chris Meyers, Jason Moore	ASIC BIST Synthesis: A VHDL Approach.	ITC	1996	DBLP DOI BibTeX RDF
1	Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich	Pattern generation for a deterministic BIST scheme.	ICCAD	1995	DBLP DOI BibTeX RDF	ATPG, BIST, Test Synthesis