Search results for "Boyuan Yan"

Found 15 publication records. Showing 15 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Boyuan Yan, Sheldon X.-D. Tan, Lingfei Zhou, Jie Chen 0005, Ruijing Shen	Decentralized and Passive Model Order Reduction of Linear Networks With Massive Ports.	IEEE Trans. VLSI Syst.	2012	DBLP DOI BibTeX RDF
1	Boyuan Yan, Peng Li	Reduced order modeling of passive and quasi-active dendrites for nervous system simulation.	Journal of Computational Neuroscience	2011	DBLP DOI BibTeX RDF
1	Tong Xu, Peng Li, Boyuan Yan	Decoupling for power gating: sources of power noise and design strategies.	DAC	2011	DBLP DOI BibTeX RDF
1	Mingchao Wang, Boyuan Yan, Jingzhen Hu, Peng Li	Simulation of large neuronal networks with biophysically accurate models on graphics processors.	IJCNN	2011	DBLP DOI BibTeX RDF
1	Boyuan Yan, Sheldon X.-D. Tan, Jeffrey Fan	Passive Rational Interpolation-Based Reduction via Carathéodory Extension for General Systems.	IEEE Trans. on Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Yici Cai	Efficient model reduction of interconnects via double gramians approximation.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Ning Mi, Sheldon X.-D. Tan, Boyuan Yan	Multiple block structure-preserving reduced order modeling of interconnect circuits.	Integration	2009	DBLP DOI BibTeX RDF
1	Boyuan Yan, Sheldon X.-D. Tan, Bruce McGaughy	Second-Order Balanced Truncation for Passive-Order Reduction of RLCK Circuits.	IEEE Trans. on Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Pu Liu, Sheldon X.-D. Tan, Boyuan Yan, Bruce McGaughy	An efficient terminal and model order reduction algorithm.	Integration	2008	DBLP DOI BibTeX RDF
1	Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie Chen 0005, Bruce McGaughy	DeMOR: decentralized model order reduction of linear networks with massive ports.	DAC	2008	DBLP DOI BibTeX RDF	multi-port networks, decentralized, model order reduction
1	Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Lifeng Wu	Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Ning Mi, Boyuan Yan, Sheldon X.-D. Tan, Jeffrey Fan, Hao Yu	General Block Structure-Preserving Reduced Order Modeling of Linear Dynamic Circuits.	ISQED	2007	DBLP DOI BibTeX RDF
1	Boyuan Yan, Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy	Passive Modeling of Interconnects by Waveform Shaping.	ISQED	2007	DBLP DOI BibTeX RDF
1	Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy	SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits.	DAC	2007	DBLP DOI BibTeX RDF
1	Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy	Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form.	ASP-DAC	2007	DBLP DOI BibTeX RDF	moment-matching methods, passive interconnect macromodeling, descriptor form, passive model order reduction, projection-based truncated balanced realization method, large RLC interconnect circuits, Lur'e equation, algebraic Riccati equations, generalized Lyapunov equations, passivity preservation, congruence transformation, large scale interconnect circuit, linear systems, structure information, Krylov-subspace methods, block structure, balanced truncation

Publications of "Boyuan Yan" ( http://dblp.L3S.de/Authors/Boyuan_Yan )