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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1 occurrences of 1 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Brian Greskamp, Ulya R. Karpuzcu, Josep Torrellas |
LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores.  |
HPCA  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas |
The BubbleWrap many-core: popping cores for sequential acceleration.  |
MICRO  |
2009 |
DBLP DOI BibTeX RDF |
power wall, process scaling, processor aging, voltage scaling |
| 1 | Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles |
Blueshift: Designing processors for timing speculation from the ground up.  |
HPCA  |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Smruti R. Sarangi, Brian Greskamp, Abhishek Tiwari, Josep Torrellas |
EVAL: Utilizing processors with variation-induced timing errors.  |
MICRO  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Smruti R. Sarangi, Brian Greskamp, Josep Torrellas |
A Model for Timing Errors in Processors with Parameter Variation.  |
ISQED  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Greskamp, Josep Torrellas |
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking.  |
PACT  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Cyrus Bazeghi, Francisco J. Mesa-Martinez, Brian Greskamp, Josep Torrellas, Jose Renau |
Estimating design time for system circuits.  |
VLSI-SoC  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Greskamp, Smruti R. Sarangi, Josep Torrellas |
Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates.  |
ISCAS  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Ron Sass, Brian Greskamp, Brian Leonard, Jeff Young, Srinivas Beeravolu |
Online architectures: A theoretical formulation and experimental prototype.  |
Microprocessors and Microsystems  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Smruti R. Sarangi, Brian Greskamp, Josep Torrellas |
CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging.  |
DSN  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Greskamp, Ron Sass |
A Virtual Machine for Merit-Based Runtime Reconfiguration.  |
FCCM  |
2005 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #11 of 11 (100 per page; Change: )
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