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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 9 publication records. Showing 9 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Bao Le, Hratch Mangassarian, Brian Keng, Andreas G. Veneris |
Non-solution implications using reverse domination in a modern SAT-based debugging environment.  |
DATE  |
2012 |
DBLP BibTeX RDF |
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| 1 | Andreas G. Veneris, Brian Keng, Sean Safarpour |
From RTL to silicon: The case for automated debug. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Andreas G. Veneris |
Managing complexity in design debugging with sequential abstraction and refinement. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Sean Safarpour, Andreas G. Veneris |
Automated debugging of SystemVerilog assertions. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Sean Safarpour, Andreas G. Veneris |
Bounded Model Debugging. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Yu-Shen Yang, Brian Keng, Nicola Nicolici, Andreas G. Veneris, Sean Safarpour |
Automated silicon debug data analysis techniques for a hardware data acquisition environment. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Andreas G. Veneris, Sean Safarpour |
An Automated Framework for Correction and Debug of PSL Assertions. |
MTV |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Andreas G. Veneris |
Scaling VLSI design debugging with interpolation. |
FMCAD |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Keng, Hratch Mangassarian, Andreas G. Veneris |
A succinct memory model for automated design debugging. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #9 of 9 (100 per page; Change: )
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