Search results for "César A. M. Marcon"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Eduardo Antunes, Matheus Soares, Alexandra Aguiar, Sergio Johann Filho, Marcos Sartori, Fabiano Hessel, César A. M. Marcon	Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC.	ISQED	2012	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Ney Calazans, Edson I. Moreno, Fernando Moraes, Fabiano Hessel, Altamiro Amadeu Susin	CAFES: A framework for intrachip application modeling and communication architecture design.	J. Parallel Distrib. Comput.	2011	DBLP DOI BibTeX RDF
1	Edson I. Moreno, César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Arbitration and routing impact on NoC design.	International Symposium on Rapid System Prototyping	2011	DBLP DOI BibTeX RDF
1	Alexandre M. Amory, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski	Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time.	International Symposium on Rapid System Prototyping	2011	DBLP DOI BibTeX RDF
1	Alexandre M. Amory, Luciano Ost, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski	Evaluating energy consumption of homogeneous MPSoCs using spare tiles.	DATE	2011	DBLP BibTeX RDF
1	José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler	A Passive 915 MHz UHF RFID Tag.	ISQED	2008	DBLP DOI BibTeX RDF	Low Power, RFID, Passive Tag
1	David Matschulat, César A. M. Marcon, Fabiano Hessel	A QoS Scheduler for Real-Time Embedded Systems.	ISQED	2008	DBLP DOI BibTeX RDF	QoS, real-time systems, embedded systems
1	César Augusto Missio Marcon, Edson Ifarraguirre Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Comparison of network-on-chip mapping algorithms targeting low energy consumption.	IET Computers & Digital Techniques	2008	DBLP DOI BibTeX RDF
1	Sergio Johann Filho, Alexandra Aguiar, César Augusto Missio Marcon, Fabiano Hessel	High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping.	IEEE International Workshop on Rapid System Prototyping	2008	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel	Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique	CoRR	2007	DBLP BibTeX RDF
1	Fabiano Hessel, César A. M. Marcon, Tatiana Gadelha Serra dos Santos	High Level RTOS Scheduler Modeling for a Fast Design Validation.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	David Matschulat, César A. M. Marcon, Fabiano Hessel	ER-EDF: A QoS Scheduler for Real-Time Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
1	César A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler	A 915 MHz UHF low power RFID tag.	SBCCI	2007	DBLP DOI BibTeX RDF	RFID systems, low power consumption, synchronization algorithms
1	César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel	A VHDL based approach for fast and accurate energy consumption estimations.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler	A Flexible Design Flow for a Low Power RFID Tag.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Evaluation of Algorithms for Low Energy Mapping onto NoCs.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Fabiano Hessel, Vitor M. da Rosa, Carlos Eduardo Reif, César A. M. Marcon, Tatiana Gadelha Serra dos Santos	Scheduling refinement in abstract RTOS models.	ACM Trans. Embedded Comput. Syst.	2006	DBLP DOI BibTeX RDF	RTOS scheduling, Real-time operating systems, transaction level Modeling
1	Melissa Vetromille, Luciano Ost, César A. M. Marcon, Carlos Eduardo Reif, Fabiano Hessel	RTOS Scheduler Implementation in Hardware and Software for Real Time Applications.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Models for Embedded Application Mapping onto NoCs: Timing Analysis.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
1	Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Flávio Rech Wagner, Altamiro Amadeu Susin	Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures.	SBCCI	2005	DBLP DOI BibTeX RDF	mapping and optimization algorithms, systems-on-chip, networks-on-chip
1	José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin	Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation.	SBCCI	2005	DBLP DOI BibTeX RDF	traffic effect, networks-on-chip, energy estimation, application mapping
1	César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis	Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs.	VLSI-SoC	2005	DBLP DOI BibTeX RDF
1	César A. M. Marcon, André Borin Suarez, Altamiro Amadeu Susin, Luigi Carro, Flávio Rech Wagner	Time and energy efficient mapping of embedded applications onto NoCs.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel	Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.	DATE	2005	DBLP DOI BibTeX RDF
1	Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Energy and latency evaluation of NoC topologies.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin	Abstract RTOS Modeling for Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
1	Luigi Carro, César A. M. Marcon, A. A. Suzim	SHC-SLX: A levelized compiled, event driven interpreted VLSI simulator.	Microprocessing and Microprogramming	1993	DBLP DOI BibTeX RDF

Publications of César A. M. Marcon César Augusto Missio Marcon ( http://dblp.L3S.de/Authors/César_A._M._Marcon )