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Searching for phrase CMOS analog circuit (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1997-2008 (9)
Publication types (Num. hits)
article(2) inproceedings(7)
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Results
Found 9 publication records. Showing 9 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Benoit Gosselin, Mohamad Sawan An ultra low-power CMOS action potential detector. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1C. M. Markan, Priti Gupta Neuromorphic building blocks for adaptable cortical feature maps. Search on Bibsonomy VLSI-SoC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Jihyun Lee, Yong-Bin Kim ASLIC: A low power CMOS analog circuit design automation. Search on Bibsonomy Integration The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Jihyun Lee, Yong-Bin Kim ASLIC: A Low Power CMOS Analog Circuit Design Automation. Search on Bibsonomy ISQED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Hui-Chin Tseng, Hsin-Hung Ou, Chi-Sheng Lin, Bin-Da Liu A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF CMOS analog circuit, flash analog-to-digital converter, rail-to-rail, low power, comparator
1Hesam Amir Aslanzadeh, Saeid Mehrmanesh, Mohammad B. Vahidfar, Amin Quasem Safarian, Reza Lotfi A 1-V 1-mW high-speed class AB operational amplifier for high-speed low power pipelined A/D converters using "Slew Boost" technique. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF CMOS analog circuit, Slew Boost technique, class AB, low power, high speed, operational amplifier, pipelined analog to digital converter, ultra low voltage
1Razvan Ionita, Andrei Vladimirescu, Paul G. A. Jespers Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems. Search on Bibsonomy PATMOS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Ravindranath Naiknaware, Terri S. Fiez CMOS analog circuit stack generation with matching constraints. Search on Bibsonomy ICCAD The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
1Ming-Jer Chen, Jib-Shin Ho A three-parameters-only MOSFET subthreshold current CAD model considering back-gate bias and process variation. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
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