| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam |
New Design for Testability Approach for Clock Fault Testing.  |
IEEE Trans. Computers  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Rajesh Galivanche |
Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Cecilia Metra, T. M. Mak, Simon Tam |
Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation High Performance Microprocessors. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, N. Timoncini, M. Spica, Cecilia Metra |
Error correcting code analysis for cache memory high reliability and performance. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra |
Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. |
DFT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella |
Impact of Aging Phenomena on Soft Error Susceptibility. |
DFT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
High-Performance Robust Latches. |
IEEE Trans. Computers |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra |
Secure communication protocol for wireless sensor networks. |
EWDTS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche |
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. |
Conf. Computing Frontiers |
2010 |
DBLP DOI BibTeX RDF |
microprocessor, on-line testing, control logic |
| 1 | Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra |
Novel low-cost aging sensor. |
Conf. Computing Frontiers |
2010 |
DBLP DOI BibTeX RDF |
aging sensor, performance degradation, nbti |
| 1 | Michele Favalli, Cecilia Metra |
Testing Resistive Opens and Bridging Faults Through Pulse Propagation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee |
Accurate Linear Model for SET Critical Charge Estimation. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi |
Detecting Multiple Faults in One-Dimensional Arrays of Reversible QCA Gates. |
J. Electronic Testing |
2009 |
DBLP DOI BibTeX RDF |
Array testing, Nanotechnology, Emerging technology, Reversible computing, QCA |
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Novel High Speed Robust Latch. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska |
Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, André K. Nieuwland, Steven V. E. S. van Dijk, Richard P. Kleihorst, Cecilia Metra |
Power Consumption of Fault Tolerant Busses. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Cecilia Metra |
Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Error detecting codes, Transient faults, Self-checking circuits, Checker |
| 1 | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi |
Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Testing, Emerging technologies, Reversible computing, QCA |
| 1 | Daniele Rossi, André K. Nieuwland, Cecilia Metra |
Simultaneous Switching Noise: The Relation between Bus Layout and Coding. |
IEEE Design & Test of Computers |
2008 |
DBLP DOI BibTeX RDF |
bus layout, switching patterns, system reliability, IC, power supply network, simultaneous switching noise, coding techniques |
| 1 | Daniele Rossi, Paolo Angelini, Cecilia Metra, Giovanni Campardo, Gianpietro P. Vanalli |
Risks for Signal Integrity in System in Package and Possible Remedies. |
European Test Symposium |
2008 |
DBLP DOI BibTeX RDF |
Crosstalk, Error Detecting Codes, Signal Integrity, System in Package |
| 1 | Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche |
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. |
European Test Symposium |
2008 |
DBLP DOI BibTeX RDF |
microprocessor, error detecting codes, on-line testing, control logic |
| 1 | Cecilia Metra, Martin Omaña, T. M. Mak, Asifur Rahman, Simon Tam |
Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Latch Susceptibility to Transient Faults and New Hardening Approach. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
Static Latch, Hardened Latch, Soft Errors, Transient Faults, Robust Design |
| 1 | Cecilia Metra, Daniele Rossi, T. M. Mak |
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
fault tolerance, Reliability, VLSI, testing |
| 1 | Fabrizio Lombardi, Cecilia Metra |
Guest Editors' Introduction: The State of the Art in Nanoscale CAD. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
feature size, nanostructures, VLSI, CAD, nanotechnology |
| 1 | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam |
Novel compensation scheme for local clocks of high performance microprocessors. |
ITC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam |
Novel Approach to Clock Fault Testing for High Performance Microprocessors. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
Interactive presentation: Pulse propagation for the detection of small delay defects. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Huang, Xiaojun Ma, Cecilia Metra, Fabrizio Lombardi |
Testing Reversible One-Dimensional QCA Arrays for Multiple Faults. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Paolo Angelini, Cecilia Metra |
Configurable Error Control Scheme for NoC Signal Integrity. |
IOLTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jien-Chung Lo, Cecilia Metra, Fabrizio Lombardi |
Guest Editors' Introduction: Special Section on Design and Test of Systems-on-Chip (SoC). |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Carlo Steiner, Cecilia Metra |
Analysis of the impact of bus implemented EDCs on on-chip SSN. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra |
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi |
Testing Reversible 1D Arrays for Molecular QCA. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
emerging technologies, Reversible computing, QCA |
| 1 | Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak |
Can Clock Faults be Detected Through Functional Test? |
DDECS |
2006 |
DBLP BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni |
Checker No-Harm Alarm Robustness. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak |
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Low Cost and High Speed Embedded Two-Rail Code Checker. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Self-checking circuits, checkers, error indicators, two-rail code |
| 1 | José Manuel Cazeaux, Martin Omaña, Cecilia Metra |
Novel on-chip circuit for jitter testing in high-speed PLLs. |
IEEE T. Instrumentation and Measurement |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Cazeaux, Daniele Rossi, Cecilia Metra |
Self-Checking Voter for High Speed TMR Systems. |
J. Electronic Testing |
2005 |
DBLP DOI BibTeX RDF |
high reliabily, duplication and comparison, self-checking, voter, TMR systems |
| 1 | Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra |
Exploiting ECC Redundancy to Minimize Crosstalk Impact. |
IEEE Design & Test of Computers |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra |
New ECC for Crosstalk Impact Minimization. |
IEEE Design & Test of Computers |
2005 |
DBLP DOI BibTeX RDF |
Fault Tolerance, Reliability, Error Correcting Codes, Crosstalk, Signal Integrity |
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Low Cost Scheme for On-Line Clock Skew Compensation. |
VTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra |
Multiple Transient Faults in Logic: An Issue for Next Generation ICs. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak |
The Other Side of the Timing Equation: a Result of Clock Faults. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, O. Losco, Cecilia Metra, Andrea Pagni |
On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | André K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra |
Coding Techniques for Low Switching Noise in Fault Tolerant Busses. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee |
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra |
Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
TMR voting in the presence of crosstalk faults at the voter inputs. |
IEEE Transactions on Reliability |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, T. M. Mak |
Implications of Clock Distribution Faults and Issues with Screening Them during Manufacturing Testing. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
clock faults, Testing, clock distribution network, manufacturing test |
| 1 | Cecilia Metra, Matteo Sonza Reorda |
Guest Editorial. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Model for Transient Fault Susceptibility of Combinational Circuits. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
transient fault modeling, transient fault susceptibility, alpha-particle, soft error, transient fault |
| 1 | André Ivanov, Fabrizio Lombardi, Cecilia Metra |
Guest Editors' Introduction: Advances in VLSI Testing at MultiGbps Rates. (PDF / PS) |
IEEE Design & Test of Computers |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, T. M. Mak, Martin Omaña |
Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, T. M. Mak, Martin Omaña |
Fault secureness need for next generation high performance microprocessor design for testability structures. |
Conf. Computing Frontiers |
2004 |
DBLP DOI BibTeX RDF |
built in self test, design for testability, microprocessor, comparator, fault secureness |
| 1 | Cecilia Metra, T. M. Mak, Martin Omaña |
Are Our Design for Testability Features Fault Secure? |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Fast and Low-Cost Clock Deskew Buffer. |
DFT |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, A. Muccio, André K. Nieuwland, Atul Katoch, Cecilia Metra |
Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, A. Ferrari, Martin Omaña, Andrea Pagni |
Hardware Reconfiguration Scheme for High Availability Systems. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Cazeaux, Daniele Rossi, Cecilia Metra |
New High Speed CMOS Self-Checking Voter. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Cazeaux, Martin Omaña, Cecilia Metra |
Low-Area On-Chip Circuit for Jitter Measurement in a Phase-Locked Loop. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Luca Schiano, Michele Favalli |
Concurrent detection of power supply noise. |
IEEE Transactions on Reliability |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, Michele Favalli, Bruno Riccò |
Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults. |
Microelectronics Journal |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Schiano, Cecilia Metra, Diego Marino |
Self-checking design, implementation, and measurement of a controller for track-side railway systems. |
IEEE T. Instrumentation and Measurement |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Cecilia Metra |
Error Correcting Strategy for High Speed and High Density Reliable Flash Memories. |
J. Electronic Testing |
2003 |
DBLP DOI BibTeX RDF |
symbol error correcting codes, error correcting circuitry, fault tolerance, reliability, flash memories |
| 1 | Cecilia Metra, Matteo Sonza Reorda |
Guest Editorial. |
J. Electronic Testing |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
Novel Transient Fault Hardened Static Latch. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Daniele Rossi, Cecilia Metra |
High Speed and Highly Testable Parallel Two-Rail Code Checker. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, Martin Omaña |
Automatic Modification of Sequential Circuits for Self-Checking Implementation. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, S. Cavallotti, Cecilia Metra |
Error Correcting Codes for Crosstalk Effect Minimization. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, T. M. Mak, Daniele Rossi |
Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | L. Di Silvio, Daniele Rossi, Cecilia Metra |
Crosstalk Effect Minimization for Encoded Busses. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, André K. Nieuwland, Cecilia Metra |
Power Consumption of Fault Tolerant Codes: the Active Elements. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra |
A Model for Transient Fault Propagation in Combinatorial Logic. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Michele Favalli, Stefano Di Francescantonio, Bruno Riccò |
On-Chip Clock Faults' Detector. |
J. Electronic Testing |
2002 |
DBLP DOI BibTeX RDF |
clock faults, systems-on-a-chip, on-line testing |
| 1 | Michele Favalli, Cecilia Metra |
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. |
J. Electronic Testing |
2002 |
DBLP DOI BibTeX RDF |
bus based systems, on-line testing, two-rail checker |
| 1 | Dimitris Nikolos, John P. Hayes, Michael Nicolaidis, Cecilia Metra |
Guest Editorial. |
J. Electronic Testing |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
Online Testing Approach for Very Deep-Submicron ICs. |
IEEE Design & Test of Computers |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, T. M. Mak |
Clock Faults? Impact on Manufacturing Testing and Their Possible Detection Through On-Line Testing. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Luca Schiano, Bruno Riccò, Michele Favalli |
Self-Checking Scheme for the On-Line Testing of Power Supply Noise. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, Giuseppe Marrale |
On-Line Testing of Transient Faults Affecting Functional Blocks of FCMOS, Domino and FPGA-Implemented Self-Checking Circuits. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Cecilia Metra, Bruno Riccò |
Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Schiano, Cecilia Metra, Diego Marino |
Design and Implementation of a Self-Checking Scheme for Railway Trackside Systems. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, A. H. Nieuwland, Cecilia Metra |
Coding Scheme for Low Energy Consumption Fault-Tolerant Bus. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniele Rossi, Cecilia Metra, Bruno Riccò |
Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. |
MTDT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Schiano, Cecilia Metra, Diego Marino |
Design and Implementation of a Self-Checking Scheme for Railway Trackside Systems. |
MTDT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Fabrizio Lombardi, Cecilia Metra |
Guest Editors' Introduction: Defect-Oriented Diagnosis for Very Deep-Submicron Systems. |
IEEE Design & Test of Computers |
2001 |
DBLP BibTeX RDF |
|
| 1 | Cecilia Metra, Andrea Pagano, Bruno Riccò |
On-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems. |
ITC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
Optimization of error detecting codes for the detection of crosstalk originated errors. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Stefano Di Francescantonio, Bruno Riccò, T. M. Mak |
Evaluation of Clock Distribution Networks' Most Likely Faults and Produced Effects. (PDF / PS) |
DFT |
2001 |
DBLP DOI BibTeX RDF |
clock faults, testing, microprocessor, Clock distribution network |
| 1 | Michele Favalli, Cecilia Metra |
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures. |
IOLTW |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra |
Novel Fault-Tolerant Adder Design for FPGA-Based Systems. |
IOLTW |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Cecilia Metra, Michele Favalli, Bruno Riccò |
Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
bus lines, diagnosis, transient faults, On-line testing, delay faults, self-checking, crosstalk faults |
| 1 | Michele Favalli, Cecilia Metra |
Bridging Faults in Pipelined Circuits. |
J. Electronic Testing |
2000 |
DBLP DOI BibTeX RDF |
fault modeling, bridging faults, CMOS circuits, pipelined circuits |
| 1 | Cecilia Metra, Jien-Chung Lo |
Intermediacy Prediction for High Speed Berger Code Checkers. |
J. Electronic Testing |
2000 |
DBLP DOI BibTeX RDF |
self-checking circuits, checkers, Berger code |
| 1 | Cecilia Metra, Michele Favalli, Bruno Riccò |
On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra |
Achieving Fault-Tolerance by Shifted and Rotated Operands in TMR Non-Diverse ALUs. (PDF / PS) |
DFT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Michele Favalli, Cecilia Metra |
Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testing. |
IEEE Trans. VLSI Syst. |
1999 |
DBLP DOI BibTeX RDF |
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