| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester |
A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS.  |
J. Solid-State Circuits  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Qi Qi, Chaitali Chakrabarti |
Parallel High Throughput Soft-Output Sphere Decoding Algorithm.  |
Signal Processing Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Samatha Gummalla, Anupama R. Subramaniam, Yu Cao, Chaitali Chakrabarti |
An analytical approach to efficient circuit variability analysis in scaled CMOS design.  |
ISQED  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias |
A top-down design methodology using virtual platforms for concept development.  |
ISQED  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola |
Algorithm and Parallel Implementation of Particle Filtering and its Use in Waveform-Agile Sensing.  |
Signal Processing Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Chaitali Chakrabarti |
Accurate Area, Time and Power Models for FPGA-Based Implementations.  |
Signal Processing Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti |
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data.  |
Signal Processing Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan |
Multidimensional DFT IP Generator for FPGA Platforms.  |
IEEE Trans. on Circuits and Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunus Emre, Chaitali Chakrabarti |
Data-path and memory error compensation technique for low power JPEG implementation.  |
ICASSP  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester |
Energy-optimized high performance FFT processor.  |
ICASSP  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lifeng Miao, J. J. Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola, N. Kovvali |
Real-time closed-loop tracking of an unknown number of neural sources using probability hypothesis density particle filtering.  |
SiPS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | C. Yang, Yunus Emre, Chaitali Chakrabarti, Trevor N. Mudge |
Flexible product code-based ECC schemes for MLC NAND Flash memories.  |
SiPS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Al-Maashri, Michael DeBole, C.-L. Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti |
A hardware architecture for accelerating neuromorphic vision algorithms.  |
SiPS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester |
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design.  |
DAC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Srinidhi Kestur, Kevin M. Irick, Sungho Park, Ahmed Al-Maashri, Vijaykrishnan Narayanan, Chaitali Chakrabarti |
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs.  |
DAC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester |
A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining.  |
ISSCC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunus Emre, Chaitali Chakrabarti |
Low energy motion estimation via selective aproximations.  |
ASAP  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti |
LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches.  |
VLSI Design  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael DeBole, Ahmed Al-Maashri, M. Cotter, C.-L. Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan |
A framework for accelerating neuromorphic-vision algorithms on FPGAs.  |
ICCAD  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
AnySP: Anytime Anywhere Anyway Signal Processing.  |
IEEE Micro  |
2010 |
DBLP DOI BibTeX RDF |
AnySP, DSP, multicore, SIMD, H.264, embedded processor, software-defined radio, 4G |
| 1 | Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti |
Mobile Supercomputers for the Next-Generation Cell Phone.  |
IEEE Computer  |
2010 |
DBLP DOI BibTeX RDF |
Mobile supercomputers, SIMD execution, 4G-wireless technology, Cell phones |
| 1 | Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudge |
A Low-Power DSP for Wireless Communications.  |
IEEE Trans. VLSI Syst.  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam, Judit Martinez Bauza |
A distributed psycho-visually motivated Canny edge detector.  |
ICASSP  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunus Emre, Chaitali Chakrabarti |
Energy-aware adaptive OFDM systems.  |
ICASSP  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan |
Bandwidth-intensive FPGA architecture for multi-dimensional DFT.  |
ICASSP  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge |
Diet SODA: a power-efficient processor for digital cameras.  |
ISLPED  |
2010 |
DBLP DOI BibTeX RDF |
digital still cameras, near-threshold, dynamic voltage scaling, SIMD |
| 1 | Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, Sai Prashanth Muralidhara, Hui Zhao, Mahmut T. Kandemir, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun |
A special-purpose compiler for look-up table and code generation for function evaluation.  |
DATE  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yuming Zhu, Chaitali Chakrabarti |
Architecture-aware LDPC code design for multiprocessor software defined radio systems.  |
IEEE Transactions on Signal Processing  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun |
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization.  |
IEEE Trans. Computers  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy |
Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang, Sarma B. K. Vrudhula |
Maximizing the Lifetime of Embedded Systems Powered by Fuel Cell-Battery Hybrids.  |
IEEE Trans. VLSI Syst.  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sangwon Seo, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Sunfaram Vijay, Chaitali Chakrabarti |
Customizing wide-SIMD architectures for H.264.  |
ICSAMOS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
AnySP: anytime anywhere anyway signal processing.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
fully programmable architecture, high-end signal processing, single-instruction multiple-data parallelism, software defined radio, low-power architecture, simd |
| 1 | Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti |
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data.  |
SiPS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Veera Papirla, Aarul Jain, Chaitali Chakrabarti |
Low power robust signal processing.  |
ISLPED  |
2009 |
DBLP DOI BibTeX RDF |
algorithmic noise tolerance, redundant binary arithmetic, soft DSP |
| 1 | Veera Papirla, Chaitali Chakrabarti |
Energy-aware error control coding for Flash memories.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
low-power design, Flash memories, error control coding, endurance |
| 1 | Niranjan D. Narvekar, Bharatan Konnanath, Shalin Mehta, Santosh Chintalapati, Ismail AlKamal, Chaitali Chakrabarti, Lina J. Karam |
An H.264/SVC memory architecture supporting spatial and course-grained quality scalabilities.  |
ICIP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianli Zhuo, Chaitali Chakrabarti |
Energy-efficient dynamic task scheduling algorithms for DVS systems.  |
ACM Trans. Embedded Comput. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
DVS system, Dynamic task scheduling, optimal scaling factor, real time, energy minimization |
| 1 | Kyungsoo Lee, Naehyuck Chang, Jianli Zhuo, Chaitali Chakrabarti, Sudheendra Kadri, Sarma B. K. Vrudhula |
A fuel-cell-battery hybrid for portable embedded systems.  |
ACM Trans. Design Autom. Electr. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
Simulation, simulator, hybrid systems, battery, DPM, fuel cell |
| 1 | Yuan Lin, Yoonseo Choi, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti |
A parameterized dataflow language extension for embedded streaming systems.  |
ICSAMOS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabarti |
Accurate models for estimating area and power of FPGA implementations.  |
ICASSP  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Bhavana B. Manjunath, Aaron S. Williams, Chaitali Chakrabarti, Antonia Papandreou-Suppappola |
Efficient mapping of advanced signal processing algorithms on multi-processor architectures.  |
SiPS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan |
Efficient image reconstruction using partial 2D Fourier transform.  |
SiPS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Younghyun Kim, Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Nam Ik Cho |
Extending the lifetime of media recorders constrained by battery and flash memory size.  |
ISLPED  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztián Flautner |
From SODA to scotch: The evolution of a wireless baseband processor.  |
MICRO  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sung-Hoon Oh, Hang Song, James T. Aberle, Bertan Bakkaloglu, Chaitali Chakrabarti |
Automatic antenna-tuning unit for software-defined and cognitive radio.  |
Wireless Communications and Mobile Computing  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
SODA: A High-Performance DSP Architecture for Software-Defined Radio.  |
IEEE Micro  |
2007 |
DBLP DOI BibTeX RDF |
DSP, multicore, SIMD, embedded processor, software-defined radio, SODA |
| 1 | Ye Li, Bertan Bakkaloglu, Chaitali Chakrabarti |
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends.  |
IEEE Trans. VLSI Syst.  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
The Next Generation Challenge for Software Defined Radio.  |
SAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun |
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms.  |
FPL  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali Chakrabarti |
Design and Analysis of LDPC Decoders for Software Defined Radio.  |
SiPS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan |
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations.  |
SiPS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Qi Qi, Chaitali Chakrabarti |
Sphere Decoding for Multiprocessor Architectures.  |
SiPS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti |
Throughput of multi-core processors under thermal constraints.  |
ISLPED  |
2007 |
DBLP DOI BibTeX RDF |
leakage dependence on temperature, throughput, power, speedup, thermal management, multi-core processors |
| 1 | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang |
Energy management of DVS-DPM enabled embedded systems powered by fuel cell-battery hybrid source.  |
ISLPED  |
2007 |
DBLP DOI BibTeX RDF |
hybrid power, embedded system, DVS, DPM, fuel cell |
| 1 | Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang |
Dynamic Power Management with Hybrid Power Sources.  |
DAC  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy, Chaitali Chakrabarti |
Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering.  |
ICCAD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuming Zhu, L. Li, Chaitali Chakrabarti |
Study of energy and performance of space-time decoding systems in concatenation with turbo decoding.  |
IEEE Trans. VLSI Syst.  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Tinku Acharya, Chaitali Chakrabarti |
A Survey on Lifting-based Discrete Wavelet Transform Architectures.  |
VLSI Signal Processing  |
2006 |
DBLP DOI BibTeX RDF |
architecture, VLSI, Discrete Wavelet Transform, lifting |
| 1 | Rahim Khoja, Mehul Marolia, Tinku Acharya, Chaitali Chakrabarti |
A coprocessor architecture for fast protein structure prediction.  |
Pattern Recognition  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
SODA: A Low-power Architecture For Software Radio.  |
ISCA  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuming Zhu, Chaitali Chakrabarti |
Architecture-Aware LDPC Code Design for Software Defined Radio.  |
SiPS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner |
Design and Implementation of Turbo Decoders for Software Defined Radio.  |
SiPS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunseok Lee, Trevor N. Mudge, Chaitali Chakrabarti |
Reducing idle mode power in software defined radio terminals.  |
ISLPED  |
2006 |
DBLP DOI BibTeX RDF |
baseband processor, idle mode, wireless terminal, low power, SIMD, SDR, software defined radio |
| 1 | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula |
Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids.  |
ISLPED  |
2006 |
DBLP DOI BibTeX RDF |
DVFS system, task scaling, hybrid systems, battery, fuel cell |
| 1 | Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang |
An optimal analytical solution for processor speed control with thermal constraints.  |
ISLPED  |
2006 |
DBLP DOI BibTeX RDF |
optimal control, temperature, DVFS, thermal management, DTM |
| 1 | Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Sarma B. K. Vrudhula |
High-level power management of embedded systems with application-specific energy cost functions.  |
DAC  |
2006 |
DBLP DOI BibTeX RDF |
algorithms |
| 1 | Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula |
Extending the lifetime of fuel cell based hybrid systems.  |
DAC  |
2006 |
DBLP DOI BibTeX RDF |
DVFS system, task scaling, hybrid systems, battery, fuel cell |
| 1 | M. Tiwari, Yuming Zhu, Chaitali Chakrabarti |
Memory sub-banking scheme for high throughput MAP-based SISO decoders.  |
IEEE Trans. VLSI Syst.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianli Zhuo, Chaitali Chakrabarti |
System-level energy-efficient dynamic task scheduling.  |
DAC  |
2005 |
DBLP DOI BibTeX RDF |
DVS system, dynamic task scheduling, optimal scaling point, real-time, energy minimization |
| 1 | Jianli Zhuo, Chaitali Chakrabarti |
An efficient dynamic task scheduling algorithm for battery powered DVS systems.  |
ASP-DAC  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Tsong Shiue, Chaitali Chakrabarti |
Multi-Module Multi-Port Memory Design for Low Power Embedded Systems.  |
Design Autom. for Emb. Sys.  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Russell Henning, Chaitali Chakrabarti |
An approach for adaptively approximating the Viterbi algorithm to reduce power consumption while decoding convolutional codes.  |
IEEE Transactions on Signal Processing  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Todd M. Austin, David Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne Wolf |
Mobile Supercomputers.  |
IEEE Computer  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Manzak, Chaitali Chakrabarti |
Optimum Buffer Size for Dynamic Voltage Processors.  |
PATMOS  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Hafijur Rahman, Chaitali Chakrabarti |
A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage.  |
ISCAS  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Sumant Bhutoria, Chaitali Chakrabarti |
Parameterized SoC design for portable systems.  |
ISCAS  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Jameel Ahmed, Chaitali Chakrabarti |
A dynamic task scheduling algorithm for battery powered DVS systems.  |
ISCAS  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Ali Manzak, Chaitali Chakrabarti |
Variable voltage task scheduling algorithms for minimizing energy/power.  |
IEEE Trans. VLSI Syst.  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Kishore Andra, Chaitali Chakrabarti, Tinku Acharya |
A high-performance JPEG2000 architecture.  |
IEEE Trans. Circuits Syst. Video Techn.  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Kishore Andra, Chaitali Chakrabarti, Tinku Acharya |
A VLSI architecture for lifting-based forward and inverse wavelet transform.  |
IEEE Transactions on Signal Processing  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Rusell E. Henning, Chaitali Chakrabarti |
Low-power approach for decoding convolutional codes with adaptive viterbi algorithm approximations.  |
ISLPED  |
2002 |
DBLP DOI BibTeX RDF |
adaptive T-algorithm decoding, low power, convolutional codes, viterbi algorithm |
| 1 | Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti |
Battery-conscious task sequencing for portable devices including voltage/clock scaling.  |
DAC  |
2002 |
DBLP DOI BibTeX RDF |
scheduling, modeling, low-power design, voltage scaling, battery |
| 1 | Kishore Andra, Chaitali Chakrabarti, Tinku Acharya |
A high performance JPEG2000 architecture.  |
ISCAS  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Tsong Shiue, Sathishkumar Udayanarayanan, Chaitali Chakrabarti |
Data memory design and exploration for low-power embedded systems.  |
ACM Trans. Design Autom. Electr. Syst.  |
2001 |
DBLP DOI BibTeX RDF |
Data cache, search space pruning |
| 1 | Ali Manzak, Chaitali Chakrabarti |
Variable voltage task scheduling algorithms for minimizing energy.  |
ISLPED  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Sathishkumar Udayanarayanan, Chaitali Chakrabarti |
Address Code Generation for Digital Signal Processors.  |
DAC  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Manzak, Chaitali Chakrabarti |
Voltage Scaling for Energy Minimization with QoS Constraints.  |
ICCD  |
2001 |
DBLP BibTeX RDF |
|
| 1 | Chaitali Chakrabarti, Lori E. Lucke |
VLSI architectures for weighted order statistic (WOS) filters.  |
Signal Processing  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Sathishkumar Udayanarayanan, Chaitali Chakrabarti |
Energy-efficient code generation for DSP56000 family (poster session).  |
ISLPED  |
2000 |
DBLP DOI BibTeX RDF |
low power, code generation |
| 1 | Kishore Andra, Tinku Acharya, Chaitali Chakrabarti |
A Multi-Bit Binary Arithmetic Coding Technique.  |
ICIP  |
2000 |
DBLP BibTeX RDF |
|
| 1 | Russell Henning, Chaitali Chakrabarti |
Relating Data Characteristics to Transition Activity in High-Level Static CMOS Design.  |
VLSI Design  |
2000 |
DBLP DOI BibTeX RDF |
statistical parameters, high-level synthesis, Low power design, data models, transition activity |
| 1 | Wen-Tsong Shiue, Chaitali Chakrabarti |
Memory Exploration for Low Power, Embedded Systems.  |
DAC  |
1999 |
DBLP DOI BibTeX RDF |
memory exploration and optimization, off-chip data assignment, low power design, memory hierarchy, design automation, cache simulator, low power embedded systems |
| 1 | Wen-Tsong Shiue, Chaitali Chakrabarti |
Memory exploration for low power embedded systems.  |
ISCAS  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Manzak, Chaitali Chakrabarti |
A low power scheduling scheme with resources operating at multiple voltages.  |
ISCAS  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Rusell E. Henning, Chaitali Chakrabarti |
High-Level Design Synthesis of a Low Power, VLIW Processor for the IS-54 VSELP Speech Encoder.  |
ICCD  |
1997 |
DBLP BibTeX RDF |
|
| 1 | Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens |
Architectures for wavelet transforms: A survey.  |
VLSI Signal Processing  |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsiang-Ling Li, Chaitali Chakrabarti |
Motion estimation of two-dimensional objects based on the straight line hough transform: A new approach.  |
Pattern Recognition  |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Chaitali Chakrabarti, Mohan Vishwanath |
Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers.  |
IEEE Transactions on Signal Processing  |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Lori Lucke, Chaitali Chakrabarti |
A digit-serial architecture for gray-scale morphological filtering.  |
IEEE Transactions on Image Processing  |
1995 |
DBLP DOI BibTeX RDF |
|