Search results for "Charles A. Zukowski"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Kagan Irez, Jiaping Hu, Charles A. Zukowski	Characteristics of MS-CMOS logic in sub-32nm technologies.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	MSCMOS, gate leakage reduction, hs&ls, logic overhead, upsizing, noise margin, input vector, domino, downsizing
1	Ali Bastani, Charles A. Zukowski	A Low-Leakage High-Speed Monotonic Static CMOS 64b Adder in a Dual Gate Oxide 65-nm CMOS Technology.	ISQED	2006	DBLP DOI BibTeX RDF
1	Ali Bastani, Charles A. Zukowski	Monotonic static CMOS tradeoffs in sub-100nm technologies.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	gate leakage current, monotonic static CMOS logic, low power design, noise tolerance, static power
1	Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky	Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies.	Integration	2005	DBLP DOI BibTeX RDF
1	Ali Bastani, Charles A. Zukowski	Characterization of monotonic static CMOS gates in a 65nm technology.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	gate leakage reduction, low power design
1	Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky	Characterization of logic circuit techniques for high leakage CMOS technologies.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	monotonic logic, low power, leakage current
1	David Garrett, John Lach, Charles A. Zukowski (eds.)	Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004	ACM Great Lakes Symposium on VLSI	2004	DBLP BibTeX RDF
1	Ali Bastani, Charles A. Zukowski	Design of superbuffers in sub-100nm CMOS technologies with significant gate leakage.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	gate leakage reduction, superbuffers, low power design
1	Ilias Tagkopoulos, Charles A. Zukowski, German Cavelier, Dimitris Anastassiou	A custom FPGA for the simulation of gene regulatory networks.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	custom mixed signal FPGA, genetic pathways, gene regulatory networks
1	Gary L. Dare, Charles A. Zukowski	Accuracy management for mixed-mode digital VLSI simulation.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
1	Christophe Tretz, Charles A. Zukowski	CMOS Transistor Sizing for Minimization of Energy-Delay Product.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF
1	Hong Shi, Charles A. Zukowski, Omar Wing	VLSI Design Optimization of Input/Output-Buffered Broadband ATM Switches.	INFOCOM	1996	DBLP BibTeX RDF
1	Hong Shi, Naeem Abbasi, Charles A. Zukowski, Omar Wing	Buffer size trade-offs in input/output buffered ATM switches under various conditions.	ICCCN	1995	DBLP DOI BibTeX RDF	buffer size trade-offs, input/output buffered ATM switches, nonlinear complex relationship, average packet delay, speed-up factors, VLSI design, telecommunication traffic, packet loss probability, traffic conditions
1	Paul Landsberg, Charles A. Zukowski	Generic Queue Scheduling: Concepts and VLSI.	INFOCOM	1994	DBLP BibTeX RDF
1	Perng-Shyong Lin, Charles A. Zukowski	Jitter Due to Signal History in Digital Logic Circuits and Its Control Strategies.	ISCAS	1993	DBLP BibTeX RDF
1	Perng-Shyong Lin, Charles A. Zukowski	Analysis and Control of Timing Jitter in Digital Logic Arising from Noise Voltage Sources.	ICCD	1993	DBLP BibTeX RDF
1	Charles A. Zukowski, Ying-Wen Bai	Implementing a High-Frequency Pattern Generator Based on Combinational Merging.	ICCD	1992	DBLP BibTeX RDF
1	Tong-Bi Pei, Charles A. Zukowski	VLSI Implementation of Routing Tables: Tries and CAMs.	INFOCOM	1991	DBLP BibTeX RDF
1	Charles A. Zukowski, George Gristede, Albert E. Ruehli	Measuring Error Propagation in Waveform Relaxation Algorithms.	ICCAD	1990	DBLP BibTeX RDF
1	Lance A. Glasser, Charles A. Zukowski	Continuous Models for Communication Density Constraints on Multiprocessor Performance.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	continuous models, communication density constraints, multiprocessor performance, communication energy density, performance evaluation, multiprocessing systems, interprocessor communication, communication bandwidth
1	Charles A. Zukowski	Relaxing Bounds for Linear RC Mesh Circuits.	IEEE Trans. on CAD of Integrated Circuits and Systems	1986	DBLP DOI BibTeX RDF
1	Jeffrey H. Lang, Charles A. Zukowski, Richard O. LaMaire, Chae H. An	Integrated-Circuit Logarithmic Arithmetic Units.	IEEE Trans. Computers	1985	DBLP DOI BibTeX RDF	Arithmetic unit comparisons, logarithmic arithmetic, multiplier-accumulators, special-purpose digital signal processors, VLSI

Publications of "Charles A. Zukowski" ( http://dblp.L3S.de/Authors/Charles_A._Zukowski )