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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 16 occurrences of 16 keywords
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Results
Found 44 publication records. Showing 44 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
Design Planning with 3D-Via Optimization in Alternative Stacking Integrated Circuits.  |
J. Inf. Sci. Eng.  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chin-Lung Chuang, Chien-Nan Jimmy Liu |
Hybrid Testbench Acceleration for Reducing Communication Overhead. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-Hong Roland Jiang, Chien-Nan Jimmy Liu, Chiu-Han Hsiao, Sy-Yen Kuo |
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimization. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Jen Chang, Pao-Jen Huang, Tai-Chen Chen, Chien-Nan Jimmy Liu |
ILP-based inter-die routing for 3D ICs. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mu-Shun Matt Lee, Chien-Nan Jimmy Liu |
Dynamic Supply Current Waveform Estimation with Standard Library Information. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yuhwai Tseng, Chauchin Su, Chien-Nan Jimmy Liu |
Measurement and Evaluation of the Bioelectrical Impedance of the Human Body by Deconvolution of a Square Wave. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yuhwai Tseng, Chauchin Su, Chien-Nan Jimmy Liu |
Measuring the Transmission Characteristic of the Human Body in an Electrostatic-Coupling Intra Body Communication System Using a Square Test Stimulus. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Chien-Nan Jimmy Liu |
Fast and Accurate Analysis of Supply Noise Effects in PLL With Noise Interactions. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Yen-Lung Chen, I-Ching Tsai, Li-Yu Chan, Chien-Nan Jimmy Liu |
Behavior-level yield enhancement approach for large-scaled analog circuits. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
process variation, analog circuits, yield enhancement |
| 1 | Mu-Shun Matt Lee, Kuo-Sheng Lai, Chia-Ling Hsu, Chien-Nan Jimmy Liu |
Dynamic IR drop estimation at gate level with standard library information. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsiu-Wen Li, Ren-Hong Fu, Hsin-Yu Luo, Chien-Nan Jimmy Liu |
Automatic circuit adjustment technique for process sensitivity reduction and yield improvement. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kuo-Hsing Cheng, Yu-Chang Tsai, Chien-Nan Jimmy Liu, Kai-Wei Hong, Chin-Cheng Kuo |
A Low Jitter Self-Calibration PLL for 10-Gbps SoC Transmission Links Application. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yuhwai Tseng, Chauchin Su, Chien-Nan Jimmy Liu |
Analysis and Design of Wide-Band Digital Transmission in an Electrostatic-Coupling Intra-Body Communication System. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hungwen Lu, Chauchin Su, Chien-Nan Jimmy Liu |
A Tree-Topology Multiplexer for Multiphase Clock System. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Meng-Jung Lee, Chien-Nan Jimmy Liu, Ching-Ji Huang |
Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hungwen Lu, Hsin-Wen Wang, Chauchin Su, Chien-Nan Jimmy Liu |
Design of an All-Digital LVDS Driver. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu |
A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih |
Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
Effective decap insertion in area-array SoC floorplan design. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
decap insertion, floorplan, Power supply noise |
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
An Effective Decap Insertion Method Considering Power Supply Noise during Floorplanning. |
J. Inf. Sci. Eng. |
2008 |
DBLP BibTeX RDF |
|
| 1 | Chih-Hu Wang, Bor-Sen Chen, Bore-Kuen Lee, Tsu-Tian Lee, Chien-Nan Jimmy Liu, Chauchin Su |
Long-Range Prediction for Real-Time MPEG Video Traffic: An Hinfty Filter Approach. |
IEEE Trans. Circuits Syst. Video Techn. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Mu-Shun Matt Lee, Chin-Hsun Lin, Chien-Nan Jimmy Liu, Shih-Che Lin |
Quick supply current waveform estimation at gate level using existed cell library information. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
current waveform estimation, gate-level |
| 1 | Wen-Tsan Hsieh, Chi-Chia Yu, Chien-Nan Jimmy Liu, Yi-Fang Chiu |
An Efficient Approach with Scaling Capability to Improve Existing Memory Power Model. |
IEICE Transactions |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
Observability Analysis on HDL Descriptions for Effective Functional Validation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Yang Hsu, Wen-Tsan Hsieh, Chien-Nan Jimmy Liu, Jing-Yang Jou |
A Tableless Approach for High-Level Power Modeling Using Neural Networks. |
J. Inf. Sci. Eng. |
2007 |
DBLP BibTeX RDF |
|
| 1 | Chin-Lung Chuang, Wei-Hsiang Cheng, Dong-Jung Lu, Chien-Nan Jimmy Liu |
Hybrid Approach to Faster Functional Verification with Full Visibility. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
simulator, emulator, visibility, hybrid, functional verification, debugging environment |
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Yu-Chien Wang, Chien-Nan Jimmy Liu |
An Efficient Approach to Build Accurate Behavioral Models of PLL Designs. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wenliang Tseng, Chien-Nan Jimmy Liu, Chauchin Su |
Passive Reduced-Order Macro-Modeling for Linear Time-Delay Interconnect Systems. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Tsan Hsieh, Chi-Chia Yu, Chien-Nan Jimmy Liu, Yi-Fang Chiu |
A Scalable Power Modeling Approach for Embedded Memory Using LIB Format. |
PATMOS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Chien-Nan Jimmy Liu |
On Efficient Behavioral Modeling to Accurately Predict Supply Noise Effects of PLL Designs in Real Systems. |
VLSI-SoC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Hsiang Cheng, Chin-Lung Chuang, Chien-Nan Jimmy Liu |
An efficient mechanism to provide full visibility for hardware debugging. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Cheng Kuo, Yu-Chien Wang, Chien-Nan Jimmy Liu |
An efficient bottom-up extraction approach to build accurate PLL behavioral models for SOC designs. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
An observability measure to enhance statement coverage metric for proper evaluation of verification completeness. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Tsan Hsieh, Chih-Chieh Shiue, Chien-Nan Jimmy Liu |
A novel approach for high-level power modeling of sequential circuits using recurrent neural networks. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing Ya Jou |
Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chin-Lung Chuang, Dong-Jung Lu, Chien-Nan Jimmy Liu |
A Snapshot Method to Provide Full Visibility for Functional Debugging Using FPGA. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chien-Nan Jimmy Liu, I-Ling Chen, Jing-Yang Jou |
A Design-for-Verification Technique for Functional Pattern Reduction. |
IEEE Design & Test of Computers |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Ying Jiang, Chien-Nan Jimmy Liu, Jing-Yang Jou |
Effective Error Diagnosis for RTL Designs in HDLs. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chien-Nan Jimmy Liu, Chia-Chih Yen, Jing-Yang Jou |
Automatic Functional Vector Generation Using the Interacting FSM Model. |
ISQED |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chien-Nan Jimmy Liu, I-Ling Chen, Jing-Yang Jou |
An efficient design-for-verification technique for HDLs. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chien-Nan Jimmy Liu, Jing-Yang Jou |
An Automatic Controller Extractor for HDL Descriptions at the RTL. |
IEEE Design & Test of Computers |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Chien-Nan Jimmy Liu, Jing-Yang Jou |
An Efficient Functional Coverage Test for HDL Descriptions at RTL. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
verification, coverage, FSM, HDL |
Displaying result #1 - #44 of 44 (100 per page; Change: )
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