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Results
Found 10 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Manthena Vamshi Krishna, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo |
A Low-Power Single-Phase Clock Multiband Flexible Divider.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Ali Meaamar, Chirn Chye Boon, Xiaomeng Shi, Wei Meng Lim, Kiat Seng Yeo, Manh Anh Do |
A 3.1-8 GHz CMOS UWB front-end receiver.  |
ISCAS  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Zhenghao Lu, Kiat Seng Yeo, Wei Meng Lim, Manh Anh Do, Chirn Chye Boon |
Design of a CMOS Broadband Transimpedance Amplifier With Active Feedback.  |
IEEE Trans. VLSI Syst.  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Ali Meaamar, Chirn Chye Boon, Kiat Seng Yeo, Manh Anh Do |
A Wideband Low Power Low-Noise Amplifier in CMOS Technology.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Aaron V. T. Do, Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Alper Cabuk |
An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim |
Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Manthena Vamshi Krishna, Xuan Jie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do |
A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4.  |
VLSI-SoC (Selected Papers)  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Aaron V. T. Do, Chirn Chye Boon, Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo |
A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.  |
VLSI-SoC (Selected Papers)  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Manthena Vamshi Krishna, J. Xie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do |
A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Aaron V. T. Do, Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Alper Cabuk |
A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
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