| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Shang-Hsien Yang, Chua-Chin Wang |
Feed-forward Output Swing Prediction AGC design with Parallel-Detect Singular-Store Peak Detector.  |
Microelectronics Journal  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Shang-Hsien Yang, Chua-Chin Wang |
A low power 48-dB/stage linear-in-dB variable gain amplifier for direct-conversion receivers. |
Microelectronics Journal |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chia-Hao Hsu, Gang-Neng Sung, Yu-Cheng Lu |
A Signed Array Multiplier with Bypassing Logic. |
Signal Processing Systems |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ron-Chi Kuo, Tung-Han Tsai |
A high precision low dropout regulator with nested feedback loops. |
Microelectronics Journal |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chih-Lin Chen, Gang-Neng Sung, Ching-Lin Wang |
A high-efficiency DC-DC buck converter for sub-2×VDD power supply. |
Microelectronics Journal |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Hao Hsu, Shao-Bin Tseng, Yi-Jie Hsieh, Chua-Chin Wang |
One-Time-Implantable Spinal Cord Stimulation System Prototype. |
IEEE Trans. Biomed. Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chia-Hao Hsu, Szu-Chia Liao, Yi-Cheng Liu |
A Wide Voltage Range Digital I/O Design Using Novel Floating N-Well Circuit. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chia-Hao Hsu, Chia-Chuan Lee, Jian-Ming Huang |
A ROM-less DDFS Based on a Parabolic Polynomial Interpolation Method with an Offset. |
Signal Processing Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Shang-Hsien Yang, Jen-Wei Liu, Yi-Hong Wu, Deng-Sian Wang, Chua-Chin Wang |
A high voltage battery charger with smooth charge mode transition in BCD process. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chih-Lin Chen, Tai-Hao Yeh, Yi Hu, Gang-Neng Sung |
A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Jian-Ming Huang, Lung-Hsuan Lee, Chih-Peng Li |
A low-power 2.45 GHz WPAN modulator/demodulator. |
Microelectronics Journal |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ying-Yu Shen |
Energy-Efficient Double-Edge Triggered Flip-Flop. |
Signal Processing Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ron-Chi Kuo, Jen-Wei Liu |
0.9 V to 5 V Bidirectional Mixed-Voltage I/O Buffer With an ESD Protection Output Stage. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chih-Lin Chen, Ron-Chi Kuo, Doron Shmilovitz |
Self-Sampled All-MOS ASK Demodulator for Lower ISM Band Applications. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chia-Hao Hsu, Yi-Cheng Liu |
A 1/2 times hbox VDD to 3 times hbox VDD Bidirectional I/O Buffer With a Dynamic Gate Bias Generator. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chia-Hao Hsu, Chi-Chun Huang, Jun-Han Wu |
A Self-Disabled Sensing Technique for Content-Addressable Memories. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Chun Huang, Tzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang |
(1/3) times hboxVDD-to- (3/2) times hboxVDD Wide-Range I/O Buffer Using 0.35- muhboxm 3.3-V CMOS Technology. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Felix Lustenberger, Yehia Massoud, Wouter A. Serdijn |
Guest Editorial Special Issue on ISCAS 2009. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Po-Cheng Chen, Chin-Long Wey |
A Transceiver Front End for Electronic Control Units in FlexRay-Based Automotive Communication Systems. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang-Neng Sung, Szu-Chia Liao, Jian-Ming Huang, Yu-Cheng Lu, Chua-Chin Wang |
All-Digital Frequency Synthesizer Using a Flying Adder. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Yi-Cheng Liu, Victor Pikov, Doron Shmilovitz |
A mini-invasive multi-function biomedical pressure measurement system ASIC. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Szu-Chia Liao, Yi-Cheng Liu |
A 125-MHz wide-range mixed-voltage I/O buffer using gated Floating N-well circuit. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sen-Hung Wang, Chih-Peng Li, Chao-Tang Yu, Jian-Ming Huang, Chua-Chin Wang |
Baseband Receiver Design for the MBOA Ultra Wideband Wireless Personal Area Networks. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung |
Low-Power Multiplier Design Using a Bypassing Technique. |
Signal Processing Systems |
2009 |
DBLP DOI BibTeX RDF |
Low power multiplier, Timing control, Partial product, Bypassing |
| 1 | Tzung-Je Lee, Tieh-Yen Chang, Chua-Chin Wang |
Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | S. Ozeri, Doron Shmilovitz, Chua-Chin Wang |
A Drive Circuit for Piezoelectric Devices with Low Harmonics Content. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Hao Hsu, Gang-Neng Sung, Tuo-Yu Yao, Chun-Ying Juan, Yain-Reu Lin, Chua-Chin Wang |
Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tzung-Je Lee, Chua-Chin Wang |
A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Sheng-Lun Tseng |
A low-power ADPLL using feedback DCO quarterly disabled in time domain. |
Microelectronics Journal |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Tzung-Je Lee, U. Fat Chio, Yu-Tzu Hsiao, Jia-Jin Chen |
A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants. |
Microelectronics Journal |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Ching-Li Lee, Chien-Chih Hung, Li-Pin Lin |
A single-chip CMOS IF-band converter design for DVB-T receivers. |
Microelectronics Journal |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Chi-Chun Huang, Ching-Li Lee, Tian-Hau Chen, Wun-Ji Lin, Ron Hu |
A 1.7-ns Access Time SRAM Using Variable Bulk Bias wordline-Controlled transistors. |
Journal of Circuits, Systems, and Computers |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Yan-Jhin Ciou, I-Yu Huang, Chih-Peng Li, Yung-Chin Lee, Weng-Jeng Wu |
A Mini-Invasive Long-Term Bladder Urine Pressure Measurement ASIC and System. |
IEEE Trans. Biomed. Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Jian-Ming Huang, Chih-Yi Chang, Chih-Peng Li |
ZigBee 868/915-MHz Modulator/Demodulator for Wireless Personal Area Network. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Ching-Li Lee, Tsai-Wen Cheng |
A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Pai-Li Liu |
Power-Aware Design of An 8-Bit Pipelining ANT-Based CLA Using Data Transition Detection. |
Signal Processing Systems |
2008 |
DBLP DOI BibTeX RDF |
data transition detection, CLA, pipeline, power-aware, ANT |
| 1 | Tzung-Je Lee, Ching-Li Lee, Yan-Jhin Ciou, Chi-Chun Huang, Chua-Chin Wang |
All-MOS ASK Demodulator for Low-Frequency Applications. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tung-Han Tsai, Chin-Lin Chen, Ching-Li Lee, Chua-Chin Wang |
Power-saving nano-scale DRAMs with an adaptive refreshing clock generator. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang-Neng Sung, Yan-Jhin Ciou, Chua-Chin Wang |
A power-aware 2-dimensional bypassing multiplier using cell-based design flow. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Jun-Han Wu, I-Yu Huang |
A mini-invasive multi-function bladder urine pressure measurement system. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Jian-Ming Huang, Li-Ping Lin |
An 80MHz PLL with 72.7ps peak-to-peak jitter. |
Microelectronics Journal |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu |
Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator. |
Microelectronics Journal |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Yan-Jhin Ciou, I-Yu Huang, Chih-Peng Li, Yung-Chin Lee, Wen-Jen Wu |
An Implantable Long-term Bladder Urine Pressure Measurement System with a 1-atm Canceling Instrumentation Amplifier. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng |
A Low-power Sensorless Inverter Controller of Brushless DC Motors. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung |
A Low-Power 2-Dimensional Bypassing Multiplier Using 0.35 um CMOS Technology. |
ISVLSI |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Kuan-Wen Fang |
A 140-dB CMRR Low-noise Instrumentation Amplifier for Neural Signal Sensing. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ching-Li Lee, Cheng-Mu Wu, Ju-Ya Chen |
A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Tzung-Je Lee, Chih-Chen Li, Ron Hu |
An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Ming-Kai Chang, Ying-Yu Shen |
Engery-Efficient Double-Edge Triggered Flip-Flop Design. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, Cheng-Mu Wu, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng, Jia-Jin Chen |
An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chi-Chun Huang, Tzung-Je Lee, U. Fat Chio |
A Linear LDO Regulator with Modified NMCF Frequency Compensation Independent of Off-chip Capacitor and ESR. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ching-Li Lee, Wun-Ji Lin |
A 4-Kb low power 4-T SRAM design with negative word-line gate drive. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Jian-Ming Huang, Chih-Yi Chang, Kuang-Ting Cheng, Chih-Peng Li |
A 6.57 mW ZigBee transceiver for 868/915 MHz band. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Gang-Neng Sung, Jia-Hao Li |
Codec Design for Variable-Length to Fixed-Length Data Conversion for H.263. |
IIH-MSP |
2006 |
DBLP DOI BibTeX RDF |
fixed-length, variable-length, compression, sparsity, H.263 |
| 1 | Chua-Chin Wang, Yih-Long Tseng, Chih-Chiang Chiu |
A temperature-insensitive self-recharging circuitry used in DRAMs. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Tzung-Je Lee, Yu-Tzu Hsiao, U. Fat Chio, Chi-Chun Huang, J.-J. J. Chin, Ya-Hsin Hsueh |
A multiparameter implantable microstimulator SOC. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ching-Li Lee, Li-Ping Lin, Yih-Long Tseng |
Wideband 70dB CMOS digital variable gain amplifier design for DVB-T receiver's AGC. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Yih-Long Tseng, Hsien-Chih She, Chih-Chen Li, Ron Hu |
A 13-bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Yih-Long Tseng, Hon-Yuan Leo, Ron Hu |
A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Yih-Long Tseng, Hsien-Chih She, Ron Hu |
A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ya-Hsin Hsueh, Sen-Fu Hong, Rong-Sui Kao |
A phase-adjustable negative phase shifter using a single-shot locking method. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Yih-Long Tseng, Tzung-Je Lee, Ron Hu |
High-PSR bias circuitry for NTSC sync separation. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ya-Hsin Hsueh, U. Fat Chio, Yu-Tzu Hsiao |
A C-less ASK demodulator for implantable neural interfacing chips. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Ya-Hsin Hsueh, Ying-Pei Chen |
An area-saving decoder structure for ROMs. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Po-Ming Lee, Jun-Jie Wang, Chenn-Jung Huang |
Design of a cycle-efficient 64-b/32-b integer divisor using a table-sharing algorithm. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chenn-Jung Huang, Chua-Chin Wang, Chi-Feng Wu |
Image Processing Techniques for Wafer Defect Cluster Identification. |
IEEE Design & Test of Computers |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chenn-Jung Huang, Wei Kuang Lai, Chua-Chin Wang, Yu-Jyr Jin, Hsin Wei Chen |
A ratioed channel assignment scheme for initial and handoff calls in mobile cellular systems. |
Computer Communications |
2001 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Cheng-Fa Tsai, Yu-Tsun Chien |
Pattern Recognitin by High-Capacity Polynomial Bidirectional Hetero-Associative Network. |
J. Inf. Sci. Eng. |
2001 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Po-Ming Lee, Rong-Chin Lee, Chenn-Jung Huang |
A 1.25 GHz 32-bit tree-structured carry lookahead adder. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Cheng-Fa Tsai |
Fuzzy data processing using polynomial bidirectional hetero-associative network. |
Inf. Sci. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chenn-Jung Huang, Shiou-Ming Hwang |
A deterministic capacity-finding method for multi-valued exponential BAM. |
IEEE Transactions on Systems, Man, and Cybernetics, Part A |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Cheng-Fa Tsai |
A Novel Neural Architecture with High Storage Capacity. |
IJCNN |
2000 |
DBLP DOI BibTeX RDF |
associative memory, fuzzy neural networks |
| 1 | Chua-Chin Wang, Cheng-Fa Tsai |
Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlator. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen |
A practical load-optimized VCO design for low-jitter 5 V 500 MHz digital phase-locked loop. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Hon-Son Don |
The Majority Theorem of Centralized Multiple BAMs Networks. |
Inf. Sci. |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chang-Rong Tsai |
Data compression by the recursive algorithm of exponential bidirectional associative memory. |
IEEE Transactions on Systems, Man, and Cybernetics, Part B |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Chih-Lwan Fan |
Digital Design of Discrete Exponential Bidirectional Associative Memory. |
VLSI Signal Processing |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Shiou-Ming Hwang, Jyh-Ping Lee |
Capacity analysis of the asymptotically stable multi-valued exponential bidirectional associative memory. |
IEEE Transactions on Systems, Man, and Cybernetics, Part B |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang |
Practical Capacity and Attraction Radix Analysis of Exponential Bidirectional Associative Memory. |
J. Inf. Sci. Eng. |
1996 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Jeng-Ming Wu |
Analysis and Current-Mode Implementation of Asymptotically Stable Exponential Bidirectional Associative Memory. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chua-Chin Wang, Hon-Son Don |
A robust continuous model for evidential reasoning. |
Journal of Intelligent and Robotic Systems |
1994 |
DBLP DOI BibTeX RDF |
belief conjunction, mutual dependency, Reasoning, belief propagation, belief function, inference network, AND/OR graph |
| 1 | Chua-Chin Wang, Hon-Son Don |
A Polar Model for Evidential Reasoning. |
Inf. Sci. |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Chua-Chin Wang, Hon-Son Don |
A Modified Measure for Fuzzy Subsethood. |
Inf. Sci. |
1994 |
DBLP DOI BibTeX RDF |
|
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