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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 13 occurrences of 13 keywords
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Results
Found 44 publication records. Showing 44 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Sewook Hwang, Minyoung Song, Young-Ho Kwak, Inhwa Jung, Chulwoo Kim |
A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile.  |
J. Solid-State Circuits  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Sohn, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung |
A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS Technology. |
J. Solid-State Circuits |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Phi-Hung Pham, Jongsun Park, Phuong Mau, Chulwoo Kim |
Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip. |
IEEE Trans. VLSI Syst. |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Moo-young Kim, Hokyu Lee, Chulwoo Kim |
PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration. |
IEEE Trans. VLSI Syst. |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyun-Woo Lee, Soo-Bin Lim, Junyoung Song, Jabeom Koo, Dae-Han Kwon, Jong-Ho Kang, Yunsaing Kim, Young-Jung Choi, Kunwoo Park, Byong-Tae Chung, Chulwoo Kim |
A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface. |
ISSCC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Sang-Yoon Lee, Hyung-Rok Lee, Young-Ho Kwak, Woo-Seok Choi, Byoung-Joo Yoo, Daeyun Shim, Chulwoo Kim, Deog-Kyoon Jeong |
250 Mbps-5 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 μ m CMOS. |
J. Solid-State Circuits |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Moo-young Kim, Jinwoo Kim, Tagjong Lee, Chulwoo Kim |
10-bit 100-MS/s Pipelined ADC Using Input-Swapped Opamp Sharing and Self-Calibrated V/I Converter. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jungmoon Kim, Jihwan Kim, Chulwoo Kim |
A Regulated Charge Pump With a Low-Power Integrated Optimum Power Point Tracking Algorithm for Indoor Solar Energy Harvesting. |
IEEE Trans. on Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sewook Hwang, Minyoung Song, Young-Ho Kwak, Inhwa Jung, Chulwoo Kim |
A 0.076mm2 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS. |
ISSCC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Shon, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung |
A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology. |
ISSCC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sunghwa Ok, Kyunghoon Chung, Jabeom Koo, Chulwoo Kim |
An Antiharmonic, Programmable, DLL-Based Frequency Multiplier for Dynamic Frequency Scaling. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Youngsun Han, Peter Harliman, Seon Wook Kim, Jong-Kook Kim, Chulwoo Kim |
A Novel Architecture for Block Interleaving Algorithm in MB-OFDM Using Mixed Radix System. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Ho Kwak, Inhwa Jung, Chulwoo Kim |
A ħbox Gb/s+ Slew-Rate/Impedance-Controlled Output Driver With Single-Cycle Compensation Time. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyun-Woo Lee, Yong-Hoon Kim, Won-Joo Yun, Eun Young Park, Kang Youl Lee, Jaeil Kim, Kwang Hyun Kim, Jongho Jung, Kyung Whan Kim, Nam Gyu Rye, Kwan-Weon Kim, Jun Hyun Chun, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung, Joong Sik Kih |
A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim |
A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jabeom Koo, Sunghwa Ok, Chulwoo Kim |
A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Inhwa Jung, Daejung Shin, Taejin Kim, Chulwoo Kim |
A 140-Mb/s to 1.82-Gb/s Continuous-Rate Embedded Clock Receiver for Flat-Panel Displays. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Phi-Hung Pham, Phuong Mau, Chulwoo Kim |
A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in Network-on-Chip based applications. |
CICC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kisoo Kim, Hokyu Lee, Sangdon Jung, Chulwoo Kim |
A 366kS/s 400uW 0.0013mm2 frequency-to-digital converter based CMOS temperature sensor utilizing multiphase clock. |
CICC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jabeom Koo, Gil-Su Kim, Junyoung Song, Kwan-Weon Kim, Young-Jung Choi, Chulwoo Kim |
Small-area high-accuracy ODT/OCD by calibration of global on-chip for 512M GDDR5 application. |
CICC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Minyoung Song, Young-Ho Kwak, Sunghoon Ahn, Wooseok Kim, ByeongHa Park, Chulwoo Kim |
A 10MHz to 315MHz cascaded hybrid PLL with piecewise linear calibrated TDC. |
CICC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongsuk Shin, Jabeom Koo, Won-Joo Yun, Young-Jung Choi, Chulwoo Kim |
A Fast-lock Synchronous Multi-phase Clock Generator based on a Time-to-digital Converter. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Inhwa Jung, Gunok Jung, Janghoon Song, Moo-young Kim, Junyoung Park, Sung-Bae Park, Chulwoo Kim |
A 0.004-mm2 Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Ho Kwak, Inhwa Jung, Chulwoo Kim |
A slew-rate controlled output driver with one-cycle tuning time. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Inhwa Jung, Moo-young Kim, Chulwoo Kim |
A 1.2GHz delayed clock generator for high-speed microprocessors. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongkyu Park, Seoksoo Yoon, Inhwa Jung, Chulwoo Kim |
Noise-Aware Split-Path Domino Logic and its Clock Delaying Scheme. |
Journal of Circuits, Systems, and Computers |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Inhwa Jung, Moo-young Kim, Chulwoo Kim |
Sptpl: a New Pulsed Latch Type Flip-Flop in High-Performance System-on-a-Chip (SOC). |
Journal of Circuits, Systems, and Computers |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Pilsung Choe, Mark R. Lehto, Jan P. Allebach |
Effect of Providing a Web-Based Collaboration Medium for Remote Customer Troubleshooting Tasks. |
HCI |
2007 |
DBLP DOI BibTeX RDF |
collaborative troubleshooting, web-based diagnostic tool, communication mode |
| 1 | Chulwoo Kim, Mark R. Lehto |
Decision Theoretic Perspective on Optimizing Intelligent Help. |
HCI |
2007 |
DBLP DOI BibTeX RDF |
intelligent help, decision theoretic perspective, help optimization, intelligent agent |
| 1 | Pilsung Choe, Chulwoo Kim, Mark R. Lehto, Jan P. Allebach |
Experimental Comparison of Adaptive vs. Static Thumbnail Displays. |
HCI |
2007 |
DBLP DOI BibTeX RDF |
static display, thumbnail display, print defect diagnosis, information retrieval, search, diagnosis, keyword search, troubleshooting, Adaptive display |
| 1 | Inhwa Jung, Moo-young Kim, Dongsuk Shin, Seon Wook Kim, Chulwoo Kim |
A New Energy x Delay-Aware Flip-Flop. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Pilsung Choe, Chulwoo Kim, Mark R. Lehto, Xinran Lehto, Jan P. Allebach |
Evaluating and Improving a Self-Help Technical Support Web Site: Use of Focus Group Interviews. |
Int. J. Hum. Comput. Interaction |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Phi-Hung Pham, Yogendera Kumar, Chulwoo Kim |
High Performance and Area-Efficient Circuit-Switched Network on Chip Design. |
CIT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Youngsun Han, Seon Kim, Chulwoo Kim |
Jaguar: A Compiler Infrastructure for Java Reconfigurable Computing. |
ICESS |
2005 |
DBLP DOI BibTeX RDF |
Java, FPGA, compiler, Reconfigurable computing, Verilog |
| 1 | Seoksoo Yoon, Seok-Ryong Yoon, Seon Wook Kim, Chulwoo Kim |
Charge-Sharing-Problem Reduced Split-Path Domino Logic. |
VLSI Design |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang |
Energy-efficient skewed static logic with dual Vt: design and synthesis. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Tae-Chan Kim, Meejoung Kim, Chulwoo Kim, Bong-Young Chung, Soo-Won Kim |
Low Power Response Time Accelerator with Full Resolution for LCD Panel. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Tae-Chan Kim, Chulwoo Kim, Bong-Young Chung, Soo-Won Kim |
Low Power Cache with Successive Tag Comparison Algorithm. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaegeun Oh, Seon Wook Kim, Chulwoo Kim |
OpenMP and Compilation Issue in Embedded Applications. |
WOMPAT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang |
New current-mode sense amplifiers for high density DRAM and PIM architectures. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang |
Energy-efficient skewed static logic design with dual Vt. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Sung-Mo Kang |
A low-power reduced swing single clock flip-flop. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang |
High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. (PDF / PS) |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Chulwoo Kim, Seung-Moon Yoo, Sung-Mo Kang |
NMOS Energy Recovery Logic. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
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