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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 16 occurrences of 15 keywords
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Results
Found 44 publication records. Showing 44 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chung-Ho Chen, Chih-Lun Lu |
Optimum profit model based on order quantity, product price, and process quality level.  |
Expert Syst. Appl.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Ying Tsai, Chung-Ho Chen |
Energy-Efficient Trace Reuse Cache for Embedded Processors.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee |
Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Chih-Lun Lu |
Optimum profit model considering production, quality and sale problem.  |
Int. J. Systems Science  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Li Lin, Wei-Tso Chen, Alvin W. Y. Su, Da-Wei Chang, Chung-Ho Chen |
A low cost, low power, high scalability and dependability processor-cluster platform.  |
SIES  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Wan-Lin Chang |
Optimal design of expected lifetime and warranty period for product with quality loss and inspection error.  |
Expert Syst. Appl.  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Shye-Tzeng Shen, Shin-Ying Lee, Chung-Ho Chen |
Full system simulation with QEMU: An approach to multi-view 3D GPU design.  |
ISCAS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Hui-Sung Kao |
The determination of optimum process mean and screening limits based on quality loss function.  |
Expert Syst. Appl.  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Michael B. C. Khoo |
Optimum process mean and manufacturing quantity settings for serial production system under the quality loss and rectifying inspection plan.  |
Computers & Industrial Engineering  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing-Wun Lin, Chen-Chieh Wang, Chin-Yao Chang, Chung-Ho Chen, Kuen-Jong Lee, Yuan-Hua Chu, Jen-Chieh Yeh, Ying-Chuan Hsiao |
Full System Simulation and Verification Framework.  |
IAS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen |
Economic Production Run Length and warranty Period for Product with Weibull Lifetime.  |
APJOR  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ming Chen, Chung-Ho Chen |
Configurable VLSI Architecture for Deblocking Filter in H.264/AVC.  |
IEEE Trans. VLSI Syst.  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Cheng Lin, Chung-Ho Chen |
Frame Buffer Access Reduction for MPEG Video Decoder.  |
IEEE Trans. Circuits Syst. Video Techn.  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee |
A hybrid software-based self-testing methodology for embedded processor.  |
SAC  |
2008 |
DBLP DOI BibTeX RDF |
embedded processor testing, fault coverage, functional testing, software-based self-test |
| 1 | Yi-Ying Tsai, Chia-Jung Hsu, Chung-Ho Chen |
Power-efficient and scalable load/store queue design via address compression.  |
SAC  |
2008 |
DBLP DOI BibTeX RDF |
address compression, load-store queue, scalable design, power-efficient |
| 1 | Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee |
A hybrid self-testing methodology of processor cores.  |
ISCAS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Cheng Lin, Chung-Ho Chen |
Avoiding unnecessary frame memory access and multi-frame motion estimation computation in H.264/AVC.  |
ISCAS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Ying Tsai, Chia-Jung Hsu, Chung-Ho Chen |
Address compression for scalable load/store queue implementation.  |
ISCAS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ming Chen, Chung-Ho Chen |
An Efficient Pipeline Architecture for Deblocking Filter in H.264/AVC.  |
IEICE Transactions  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Min-Tsai Lai |
Determining the optimum process mean based on quadratic quality loss function and rectifying inspection plan.  |
European Journal of Operational Research  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Min-Tsai Lai |
Economic manufacturing quantity, optimum process mean, and economic specification limits setting under the rectifying inspection plan.  |
European Journal of Operational Research  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Kuo-Su Hsiao |
Scalable Dynamic Instruction Scheduler through Wake-Up Spatial Locality.  |
IEEE Trans. Computers  |
2007 |
DBLP DOI BibTeX RDF |
CAM-based wakeup logic, matrix-based wakeup logic, scalable instruction scheduler, wakeup spatial locality, low power, issue logic |
| 1 | Chung-Ho Chen, Chih-Kai Wei, Tai-Hua Lu, Hsun-Wei Gao |
Software-Based Self-Testing With Multiple-Level Abstractions for Soft Processor Cores.  |
IEEE Trans. VLSI Syst.  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Cheng Lin, Chung-Ho Chen |
Reduction of Frame Memory Accesses and Motion Estimation Computations in MPEG Video Encoder.  |
ICCCN  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Yu Chou, Chun-Hua Chen, Chung-Ho Chen |
Economic design of variable sampling intervals T2 control charts using genetic algorithms.  |
Expert Syst. Appl.  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Yi-Cheng Chung, Chen-Hua Wang, Han-Chiang Chen |
Design of a Giga-bit Hardware Accelerator for the iSCSI Initiator.  |
LCN  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Cheng Lin, Chung-Ho Chen |
Exploring reusable frame buffer data for MPEG-4 video decoding.  |
ISCAS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Kuo-Su Hsiao, Chung-Ho Chen |
Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling.  |
ICCD  |
2006 |
DBLP BibTeX RDF |
|
| 1 | Kuo-Su Hsiao, Chung-Ho Chen |
An efficient wakeup design for energy reduction in high-performance superscalar processors.  |
Conf. Computing Frontiers  |
2005 |
DBLP DOI BibTeX RDF |
issue window, wakeup logic, low power, high performance |
| 1 | Chung-Ming Chen, Chung-Ho Chen |
An efficient VLSI architecture for edge filtering in H.264/AVC.  |
Circuits, Signals, and Systems  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Chung-Ming Chen, Chung-Ho Chen |
An Efficient Architecture for Deblocking Filter in H.264/AVC Video Coding.  |
Computer Graphics and Imaging  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Ming-Der Shieh, Ming-Hwa Sheu, Chung-Ho Chen, Hsin-Fu Lo |
A Systematic Approach for Parallel CRC Computations.  |
J. Inf. Sci. Eng.  |
2001 |
DBLP BibTeX RDF |
|
| 1 | Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen |
Parameterized MAC unit implementation.  |
ASP-DAC  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Feng-Fu Lin |
An Easy-to-Use Approach for Practical Bus-Based System Design.  |
IEEE Trans. Computers  |
1999 |
DBLP DOI BibTeX RDF |
Bus-based shared-memory multiprocessor, queuing delay model, system design, memory system design |
| 1 | Chung-Ho Chen, Arun K. Somani |
Fault Containment in Cache Memories for TMR Redundant Processor Systems.  |
IEEE Trans. Computers  |
1999 |
DBLP DOI BibTeX RDF |
error detection and recovery, Caches, transient faults, fault-containment, redundant systems |
| 1 | Chung-Ho Chen, Akida Wu |
Microarchitecture Support for Improving the Performance of Load Target Prediction.  |
MICRO  |
1997 |
DBLP BibTeX RDF |
load target prediction, load-use stall, speculative data access, superscalar procesor, pipeline |
| 1 | Chung-Ho Chen, Arun K. Somani |
Architecture Technique Trade-Offs Using Mean Memory Delay Time.  |
IEEE Trans. Computers  |
1996 |
DBLP DOI BibTeX RDF |
Bus width, cache hit ratio, memory cycle time, pipelined memory, read-bypassing write buffer, performance trade-off |
| 1 | Craig M. Wittenbrink, Arun K. Somani, Chung-Ho Chen |
Cache write generate for parallel image processing on shared memory architectures.  |
IEEE Transactions on Image Processing  |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert M. Haralick, Arun K. Somani, Craig M. Wittenbrink, Robert Johnson, Kenneth Cooper, Linda G. Shapiro, Ihsin T. Phillips, Jenq-Neng Hwang, William Cheung, Yung Hsi Yao, Chung-Ho Chen, Larry Yang, Brian Daugherty, Bob Lorbeski, Kent Loving, Tom Miller, Larye Parkins, Steve Soos |
Proteus: A reconfigurable computational network for computer vision.  |
Mach. Vis. Appl.  |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Arun K. Somani |
A Unified Architectural Tradeoff Methodology.  |
ISCA  |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Arun K. Somani |
A Cache Protocol for Error Detection and Recovery in Fault-Tolerant Computing Systems.  |
FTCS  |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ho Chen, Arun K. Somani |
Effects of Cache Traffic on Shared Bus Multiprocessor Systems.  |
ICPP  |
1992 |
DBLP BibTeX RDF |
|
| 1 | Arun K. Somani, Craig M. Wittenbrink, Robert M. Haralick, Linda G. Shapiro, Jenq-Neng Hwang, Chung-Ho Chen, Robert Johnson, Kenneth Cooper |
Proteus System Architecture and Organization.  |
IPPS  |
1991 |
DBLP BibTeX RDF |
|
| 1 | Chung-Ho Chen |
An Algebraic Model of Arithmetic Codes.  |
IEEE Trans. Computers  |
1982 |
DBLP DOI BibTeX RDF |
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