| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yung-Cheng Ma, Chung-Ping Chung, Tien-Fu Chen |
Load and storage balanced posting file partitioning for parallel information retrieval.  |
Journal of Systems and Software  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | I-Wei Wu, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration. |
J. Inf. Sci. Eng. |
2011 |
DBLP BibTeX RDF |
|
| 1 | Peter Deayton, Chung-Ping Chung |
Set Utilization Based Dynamic Shared Cache Partitioning. |
ICPADS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Walter Yuan-Hwa Li, Chin-Ling Huang, Chung-Ping Chung |
Tolerating Load Miss-Latency by Extending Effective Instruction Window with Low Complexity. |
ICPP |
2011 |
DBLP DOI BibTeX RDF |
Execute Ahead, Hardware Speculation, Instruction-Level Parallelism, Processor Architecture, Memory-Level Parallelism, Runahead Execution |
| 1 | Tsung-Hsi Weng, Yi-Ting Wang, Chung-Ping Chung |
Exploiting Parallelism in the H.264 Deblocking Filter by Operation Reordering. |
ICA3PP |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsiu-ching Hsieh, Chih-Chieh Hsiao, Hui-Chin Yang, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Methods for Precise False-Overlap Detection in Tile-Based Rendering. |
CSE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ping Chung, Tung-Lin Lu, Hui-Chin Yang |
H-Buffer: An Efficient History-Based and Overflow Sharing Transparent Fragment Storage Method. |
CSE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ping Chung, Hong-Wei Chen, Hui-Chin Yang |
Blocked-Z Test for Reducing Rasterization, Z Test and Shading Workloads. |
CSE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Chi Chen, Hui-Chin Yang, Chung-Ping Chung, Wei-Ting Wang |
Dynamic Reconfigurable Shaders with Load Balancing for Embedded Graphics Processing. |
CSE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Chieh Hsiao, Chung-Ping Chung, Hui-Chin Yang |
A Hierarchical Primitive Lists Structure for Tile-Based Rendering. |
CSE |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Oluwayomi Adamo, Afrin Naz, Tommy Janjusic, Krishna M. Kavi, Chung-Ping Chung |
Smaller Split L-1 Data Caches for Multi-core Processing Systems. |
ISPAN |
2009 |
DBLP DOI BibTeX RDF |
Split data cache, uniform cache access patterns, Cache memories |
| 1 | Wei-Hau Chiao, Chung-Ping Chung |
Filtering of Unnecessary Branch Predictor Lookups for Low-power Processor Architecture. |
J. Inf. Sci. Eng. |
2008 |
DBLP BibTeX RDF |
|
| 1 | Po-Chun Chang, I-Wei Wu, Jean Jyh-Jiun Shann, Chung-Ping Chung |
ETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
DVS multiprocessor system, task scheduling |
| 1 | Hui-Chin Yang, Li-Ming Wang, Chung-Ping Chung |
iAIM: An Intelligent Autonomous Instruction Memory with Branch Handling Capability. |
ICYCS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Instruction Set Extension Exploration in Multiple-Issue Architecture. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Ting Wang, Wai-Hong Tam, Yi-Chi Chen, Kuen-Cheng Chiang, Chung-Ping Chung |
Selecting Heterogeneous Computation Blocks for Reconfigurable JPEG Codec Computing. |
ERSA |
2007 |
DBLP BibTeX RDF |
|
| 1 | Wei-Ting Wang, Yi-Chi Chen, Chung-Ping Chung |
A Run-Time Reconfigurable Fabric for 3D Texture Filtering. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | I-Wei Wu, Shih-Chia Huang, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Instruction Set Extension Generation with Considering Physical Constraints. |
HiPEAC |
2007 |
DBLP DOI BibTeX RDF |
Pipestage Timing Constraint, ASIP, Instruction set extension, Extensible Processors |
| 1 | Cher-Sheng Cheng, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Unique-order interpolative coding for fast querying and space-efficient indexing in information retrieval systems. |
Inf. Process. Manage. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Cher-Sheng Cheng, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Fast query evaluation through document identifier assignment for inverted file-based information retrieval systems. |
Inf. Process. Manage. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui-Chin Yang, Chung-Ping Chung |
Autonomous Instruction Memory Equipped with Dynamic Branch Handling Capability. |
CDES |
2006 |
DBLP BibTeX RDF |
|
| 1 | Bin-Hua Tein, I-Wei Wu, Chung-Ping Chung |
Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer. |
CDES |
2006 |
DBLP BibTeX RDF |
|
| 1 | Wann-Yun Shieh, Chung-Ping Chung |
A statistics-based approach to incrementally update inverted files. |
Inf. Process. Manage. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ching-Wen Chen, Chung-Ping Chung |
Designing A Disjoint Paths Interconnection Network with Fault Tolerance and Collision Solving. |
The Journal of Supercomputing |
2005 |
DBLP DOI BibTeX RDF |
gamma interconnection networks, rerouting hops, collision ratio, multistage interconnection networks, disjoint paths, dynamic rerouting |
| 1 | Wei-Hao Chiao, Tsung-Hsi Weng, Jean Jyh-Jiun Shann, Chung-Ping Chung, Jimmy Lu |
Low-Power Data Address Bus Encoding Method. |
CDES |
2005 |
DBLP BibTeX RDF |
|
| 1 | Yau-Chong Hu, Wei-Hau Chiao, Jean Jyh-Jiun Shann, Chung-Ping Chung, Wen-Feng Chen |
Low-Power Branch Prediction. |
CDES |
2005 |
DBLP BibTeX RDF |
|
| 1 | Lee-Ren Ton, Lung-Chung Chang, Jean Jyh-Jiun Shann, Chung-Ping Chung |
A software/hardware cooperated stack operations folding model for Java processors. |
Journal of Systems and Software |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Kelvin Lin, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Code compression by register operand dependency. |
Journal of Systems and Software |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Cheng Ma, Tien-Fu Chen, Chung-Ping Chung |
Branch-and-bound task allocation with task clustering-based pruning. |
J. Parallel Distrib. Comput. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Cher-Sheng Cheng, Jean Jyh-Jiun Shann, Chung-Ping Chung |
A Unique-Order Interpolative Code for Fast Querying and Space-Efficient Indexing in Information Retrieval Systems. |
ITCC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Kelvin Lin, Chung-Ping Chung, Jean Jyh-Jiun Shann |
Compressing MIPS code by multiple operand dependencies. |
ACM Trans. Embedded Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
benchmarks, data compression, Code compression, instruction set architecture |
| 1 | Wann-Yun Shieh, Tien-Fu Chen, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Inverted file compression through document identifier reassignment. |
Inf. Process. Manage. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ching-Wen Chen, Neng-Pin Lu, Chung-Ping Chung |
3-Disjoint gamma interconnection networks. |
Journal of Systems and Software |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Cheng Ma, Jih-Ching Chiu, Tien-Fu Chen, Chung-Ping Chung |
Variable-size data item placement for load and storage balancing. |
Journal of Systems and Software |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Wann-Yun Shieh, Jean Jyh-Jiun Shann, Chung-Ping Chung |
An Inverted File Cache for Fast Information Retrieval. |
J. Inf. Sci. Eng. |
2003 |
DBLP BibTeX RDF |
|
| 1 | Wann-Yun Shieh, Tien-Fu Chen, Chung-Ping Chung |
A Tree-Based inverted File for Fast Ranked-Document Retrieval. |
IKE |
2003 |
DBLP BibTeX RDF |
|
| 1 | Wann-Yun Shieh, Chung-Ping Chung |
A Statistics-Based Approach to Incrementally Update Inverted Files. |
IKE |
2003 |
DBLP BibTeX RDF |
|
| 1 | Lee-Ren Ton, Lung-Chung Chang, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Design of an optimal folding mechanism for Java processors. |
Microprocessors and Microsystems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Lee-Ren Ton, Lung-Chung Chang, Chung-Ping Chung |
An analytical POC stack operations folding for continuous and discontinuous Java bytecodes. |
Journal of Systems Architecture |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Cheng Ma, Tien-Fu Chen, Chung-Ping Chung |
Posting file partitioning and parallel information retrieval. |
Journal of Systems and Software |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jih-Ching Chiu, Michael Jin-Yi Wang, Chung-Ping Chung |
Design of Instruction Address Queue for High Degree X86 Superscalar Architecture. |
J. Inf. Sci. Eng. |
2002 |
DBLP BibTeX RDF |
|
| 1 | Jih-Ching Chiu, Michael Jin-Yi Wang, Chung-Ping Chung |
Design of Instruction Address Queue for High Degree X86 Superscalar Architecture. |
J. Inf. Sci. Eng. |
2002 |
DBLP BibTeX RDF |
|
| 1 | Kelvin Lin, Jean Jyh-Jiun Shann, Chung-Ping Chung |
Code Compression by Register Operand Dependency. |
Interaction between Compilers and Computer Architectures |
2002 |
DBLP DOI BibTeX RDF |
Dictionary-based compression, Code compression |
| 1 | Ching-Wen Chen, Chung-Ping Chung |
Fault-tolerant gamma interconnection network without backtracking. |
Journal of Systems and Software |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Cheng Ma, Chung-Ping Chung |
A dominance relation enhanced branch-and-bound task allocation. |
Journal of Systems and Software |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | R.-Ming Shiu, Neng-Pin Lu, Chung-Ping Chung |
Applying stack simulation for branch target buffers. |
Journal of Systems and Software |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Lee-Ren Ton, Lung-Chung Chang, Chung-Ping Chung |
Exploiting Java Bytecode Parallelism by Enhanced POC Folding Model (Research Note). |
Euro-Par |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Jih-Ching Chiu, I-Huan Huang, Chung-Ping Chung |
Design of Instruction Stream Buffer with Trace Support for X86 Processors. (PDF / PS) |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
instruction stream buffer, x86 architecture, multiple instruction fetch, superscalar processor, ILP, Trace cache |
| 1 | Ruey-Liang Ma, Chung-Ping Chung |
Reducing Memory Traffic and Accelerting Prolog Execution in a Superscalar Prolog System. |
J. Inf. Sci. Eng. |
1999 |
DBLP BibTeX RDF |
|
| 1 | Lee-Ren Ton, Lung-Chung Chang, Min-Fu Kao, Han-Min Tseng, Shi-Sheng Shang, Ruey-Liang Ma, Dze-Chaung Wang, Chung-Ping Chung |
Instruction Folding in Java Processor. (PDF / PS) |
ICPADS |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung |
Instruction Cache Prefetching with Extended BTB. (PDF / PS) |
ICPADS |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Neng-Pin Lu, Chung-Ping Chung |
A Fault-Tolerant Multistage Combining Network. |
J. Parallel Distrib. Comput. |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Chang-Chung Liu, R.-Ming Shiu, Chung-Ping Chung |
Register renaming for x86 superscalar design. (PDF / PS) |
ICPADS |
1996 |
DBLP DOI BibTeX RDF |
Intel x86 superscalar design, storage conflicts, data lengths, register write, register read, hardware renaming schemes, aggressive superscalar machine model, parallel architectures, instruction level parallelism, simulation results, microprocessor chips, register renaming |
| 1 | Ren-Lianq Cheng, Chung-Ping Chung |
An Approximate Agreement Algorithm for Wraparound Meshes. |
International Journal of High Speed Computing |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Neng-Pin Lu, Chung-Ping Chung |
Memory System Design in Superscalar Processing. |
International Journal of High Speed Computing |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong Chich Chou, Chung-Ping Chung |
An Optimal Instruction Scheduler for Superscalar Processor. |
IEEE Trans. Parallel Distrib. Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruey-Liang Ma, Chung-Ping Chung |
Periodic Adaptive Branch Prediction and its Application in Superscalar Processing in Prolog. |
Comput. J. |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuh-Horng Shiau, Chung-Ping Chung |
Effects and Handling of Instruction Class Contention in Superscalar Processing. |
International Journal of High Speed Computing |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong Chich Chou, Chung-Ping Chung |
Optimal multiprocessor task scheduling using dominance and equivalence relations. |
Computers & OR |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruey-Liang Ma, Chung-Ping Chung |
Branch Prediction for Enhancing Fine-Grained Parallelism in Prolog. |
ICPADS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Ren-Lianq Cheng, Chung-Ping Chung |
Reaching Approximate Agreement on Hypercube. |
Parallel Computing |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong Chich Chou, Chung-Ping Chung |
Modeling of Superscalar Instruction Scheduling and Analysis of a Heuristic Scheduling Algorithm. |
BIT |
1993 |
DBLP BibTeX RDF |
|
| 1 | Hong Chich Chou, Chung-Ping Chung |
Upper Bound Analysis of Scheduling Arbitrary-Delay Instructions on Typed Pipelined Processors. |
International Journal of High Speed Computing |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Ping Chung, Wen-Yang Lin |
Vectorization of Sorting Algorithms. |
International Journal of High Speed Computing |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong Chich Chou, Chung-Ping Chung |
A bound analysis of scheduling instructions on pipelined processors with a maximal delay of one cycle. |
Parallel Computing |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuh-Horng Shiau, Chung-Ping Chung |
Adoptability and effectiveness of microcode compaction algorithms in superscalar processing. |
Parallel Computing |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Cheng Chen, Chung-Ping Chung, Cheng-Chin Chiang, Hsin-Chia Fu, S. J. Wang |
An Or-Parallel Inference Model Based on Multi RISC-Style Processing System. |
J. Inf. Sci. Eng. |
1991 |
DBLP BibTeX RDF |
|
| 1 | Chung-Ping Chung, Shyi-Chyi Jeng, Hong Chich Chou, Cheng Chen |
Design of Dual-ALU CRISC and Its Concurrent Execution . |
J. Inf. Sci. Eng. |
1989 |
DBLP BibTeX RDF |
|
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