| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Zue-Der Huang, Chung-Yu Wu |
The Design of a K-Band 0.8-V 9.2-mW Phase-Locked Loop.  |
IEICE Transactions  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Po-Hung Chen, Min-Chiao Chen, Chun-Lin Ko, Chung-Yu Wu |
An Integrated CMOS Front-End Receiver with a Frequency Tripler for V-Band Applications. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Su-Yung Tsai, Chi-Hsu Wang, Chung-Yu Wu |
Stability Analysis of Autonomous Ratio-Memory Cellular Nonlinear Networks for Pattern Recognition. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Sheng-Hao Chen, Yu Wu |
Design and Analysis of a CMOS Ratio-Memory Cellular Nonlinear Network (RMCNN) Requiring No Elapsed Time. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Chieh Wang, Zue-Der Huang, Geert Carchon, Abdelkarim Mercha, Stefaan Decoutere, Walter De Raedt, Chung-Yu Wu |
45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Chieh Wang, Chung-Yu Wu |
A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Sheng-Hao Chen |
The Design and Analysis of a CMOS Low-Power Large-Neighborhood CNN With Propagating Connections. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Fadi Riad Shahroury, Chung-Yu Wu |
A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Cheng Hsieh, Wei-Yu Chen, Chung-Yu Wu |
A High Performance Linear Current Mode Image Sensor. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Chieh Wang, Chang-Ping Liao, Yi-Kai Lo, Zue-Der Huang, Fadi Riad Shahroury, Chung-Yu Wu |
The design of integrated 3-GHz to 11-GHz CMOS transmitter for full-band ultra-wideband (UWB) applications. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Jong Tsai, Chao-Hsiang Feng, Chung-Yu Wu, Chang-Jung Juan |
An efficient Compensation Method for Improving Luminance Uniformity of Organic Light Emitting Diode Panels. |
CSC |
2007 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Shun-Wei Hsu, Wen-Chieh Wang |
A 24-GHz CMOS Current-Mode Power Amplifier with High PAE and Output Power. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Chien-Ta Huang |
A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Chi-Yao Yu |
A 0.8 V 5.9 GHz wide tuning range CMOS VCO using inversion-mode bandswitching varactors. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Felice Cheng, Cheng-Ta Chiang, Po-Kang Lin |
A low-power implantable Pseudo-BJT-based silicon retina with solar cells for artificial retinal prostheses. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Yu-Chuan Shih, Chung-Yu Wu |
An optimized CMOS pseudo-active-pixel-sensor structure for low-dark-current imager applications. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yun Chou, Chung-Yu Wu |
The design of a new wideband and low-power CMOS active polyphase filter for low-IF receiver applications. |
APCCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Wen-Chieh Wang, Tzung-Ming Chen |
A new high-performance CMOS GHz power amplifier design with common-mode signal cancellation technique. |
APCCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong-Sing Kao, Chung-Yu Wu |
An improved low-power CMOS direct-conversion transmitter for GHz wireless communication applications. |
APCCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Yee Liow, Chung-Yu Wu |
The design of high-speed pipelined analog-to-digital converters using voltage-mode sampling and current mode processing techniques. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Jui-Lin Lai |
Improvement of pattern learning and recognition capability in ratio-memory cellular neural networks with non-discrete-type Hebbian learning algorithm. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Chung-Yun Chou |
The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variations. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Hsin-Chin Jiang |
An improved BJT-based silicon retina with tunable image smoothing capability. |
IEEE Trans. VLSI Syst. |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Yu-Yee Liow |
A new dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS DRAMs. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Wen-Cheng Yen, Chung-Yu Wu |
A new compact neuron-bipolar cellular neural network structure with adjustable neighborhood layers and high integration level. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Chuan Shih, Chung-Yu Wu |
The design of high-performance 128×128 CMOS image sensors using new current-readout techniques. |
ISCAS |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Bing J. Sheu, Mohammed Ghanbari, Horng-Dar Lin, Chung-Yu Wu |
Guest Editorial. |
IEEE Trans. Circuits Syst. Video Techn. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Cheng Hsieh, Chung-Yu Wu, Far-Wen Jih, Tai-Ping Sun |
Focal-plane-arrays and CMOS readout techniques of infrared imaging systems. |
IEEE Trans. Circuits Syst. Video Techn. |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang |
Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC. |
IEEE Trans. VLSI Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Ron-Yi Liu |
CMOS current-mode implementation of spatiotemporal probabilistic neural networks for speech recognition. |
VLSI Signal Processing |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Heng-Shou Hsu |
The Design of New Low-Voltage CMOS VHF Continuous-Time Lowpass Biquaud Filters. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Ming-Dou Ker, Chung-Yu Wu, Hun-Hsien Chang, Tao Cheng, Tain-Shun Wu |
Complementary-LVTSCR ESD Protection Scheme for Submicron CMOS IC's. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Wei-Shinn Wey, Tsai-Chung Yu |
A 1.5V CMOS Balanced Differential Switched-Capacitor Filter with Internal Clock Boosters. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chih-Cheng Chen, Chung-Yu Wu, Jyh-Jer Cho |
A 1.5 V CMOS Current-Mode Cyclic Analog-to-Digital Converter with Digital Error Correction. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Jr-Houng Lu, Kuo-Hsing Cheng |
A New CMOS Current-Sensing Complementary Pass-Transistor Logic (CSCPTL) for High-Speed Low-Voltage Applications. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Hong-Yi Huang, Jinn-Shyan Wang, Yuan-Hua Chu, Tain-Shun Wu, Kuo-Hsing Cheng, Chung-Yu Wu |
Low-Voltage Low-Power CMOS True-Single-Phase Clocking Scheme with Locally Asynchronous Logic Circuits. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Jeng-Feng Lan, Chung-Yu Wu |
CMOS Current-Mode Outstar Neural Networks with Long-Period Analog Ratio Memory. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Shuo-Yuan Hsiao, Ron-Yi Liu |
A 3-V 1-GHz Low-Noise Bandpass Amplifier. |
ISCAS |
1995 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Heng-Shou Hsu |
The Continuous-Time VHF Lowpass Filter Design Using Finite-Gain Current and Voltage Amplifiers and Special Q-Enhancement Circuit. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Liang-Hung Lu, Chung-Yu Wu |
The Design of the CMOS Current-Mode General-Purpose Analog Processor. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Shu-Yuan Chin, Chung-Yu Wu |
An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Hong-Yi Huang, Chung-Yu Wu |
New CMOS Differential Logic Circuits for True-Single-Phase Pipelined Systems. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai |
VHF/UHF High-Q Bandpass Tunable Filters Design Using CMOS Inverter-Based Transresistnace Amplifiers. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Yuh-Kuang Tseng, Kuo-Hsing Cheng, Chung-Yu Wu |
Feedback-Controlled Enhance-Pull-Down BiCMOS for Sub-3-V Digital Circuit. |
ISCAS |
1994 |
DBLP BibTeX RDF |
|
| 1 | Hong-Yi Huang, Chung-Yu Wu |
Redundant Algebra and Integrated Circuit Implementation of Ternary Logic and Their Applications. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Ying-Hwi Chang, Chung-Yu Wu, Tsai-Chung Yu |
Chopper-stabilized Sigma-delta Modulator. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Shu-Yuan Chin, Chung-Yu Wu |
A Ratio-independent and Gain-insensitive Algorithmic Analog-to-digital Converter. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Ping-Hsing Lu, Chung-Yu Wu, Ming-Kai Tsai |
VHF Bandpass Filter Design Using CMOS Transresistance Amplifiers. |
ISCAS |
1993 |
DBLP BibTeX RDF |
|
| 1 | Chung-Yu Wu, Ming-Chuen Shiau |
Efficient physical timing models for CMOS AND-OR-inverter and OR-AND-inverter gates and their applications. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Yu Wu, Jen-Sheng Hwang, Chih Chang, Ching-Chu Chang |
An Efficient Timing Model for CMOS Combinational Logic Gates. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1985 |
DBLP DOI BibTeX RDF |
|
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