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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 60 occurrences of 44 keywords
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Results
Found 80 publication records. Showing 80 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano |
OSCAR: An Optimization Methodology Exploiting Spatial Correlation in Multicore Design Spaces.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano |
Evaluating Run-time Resource Management Policies for Multi-core Embedded Platforms with the EMME Evaluation Framework.  |
ARCS Workshops  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Giovanni Mariani, Vlad Mihai Sima, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano, Koen Bertels |
Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures.  |
DATE  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Chantal Ykman-Couvreur, Prabhat Avasare, Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Linking run-time resource management of embedded multi-core platforms with automated design-time exploration.  |
IET Computers & Digital Techniques  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mladen Berekovic, William Fornaciari, Uwe Brinkschulte, Cristina Silvano (eds.) |
Architecture of Computing Systems - ARCS 2011 - 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings  |
ARCS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Gianluca Palermo, Cristina Silvano |
Two-levels of adaptive buffer for virtual channel router in NoCs.  |
VLSI-SoC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout |
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.  |
ReCoSoC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristina Silvano, William Fornaciari, Gianluca Palermo, Vittorio Zaccaria, Fabrizio Castro, Marcos Martínez, Sara Bocchio, Roberto Zafalon, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Maryse Wouters, Carlos Kavka, Luka Onesti, Alessandro Turco, Umberto Bondi, Giovanni Mariani, Hector Posadas, Eugenio Villar, Chris Wu, Dongrui Fan, Zhang Hao, Shibin Tang |
MULTICUBE: Multi-objective Design Space Exploration of Multi-core Architectures.  |
ISVLSI  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout |
2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.  |
ISVLSI  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Vittorio Zaccaria, Gianluca Palermo, Fabrizio Castro, Cristina Silvano, Giovanni Mariani |
Multicube Explorer: An Open Source Framework for Design Space Exploration of Chip Multi-Processors.  |
ARCS Workshops  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Giovanni Mariani, Aleksandar Brankovic, Gianluca Palermo, Jovana Jovic, Vittorio Zaccaria, Cristina Silvano |
A correlation-based design space exploration methodology for multi-processor systems-on-chip.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
design space exploration, kriging, response surface, multi-processor systems-on-chip |
| 1 | Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria, Adrian Florea, Lucian N. Vintan, Cristina Silvano |
Energy-performance design space exploration in SMT architectures exploiting selective load value predictions.  |
DATE  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Giovanni Mariani, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
An industrial design space exploration framework for supporting run-time resource management on multi-core systems.  |
DATE  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
ReSPIR: A Response Surface-Based Pareto Iterative Refinement for Application-Specific Design Space Exploration.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Koen Bertels, Nikitas J. Dimopoulos, Cristina Silvano, Stephan Wong (eds.) |
Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Multi-processor system-on-chip Design Space Exploration based on multi-level modeling techniques.  |
ICSAMOS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip.  |
DSD  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Variability-aware robust design space exploration of chip multiprocessor architectures.  |
ASP-DAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
A design space exploration methodology supporting run-time resource management for multi-processor Systems-on-chip.  |
SASP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Fiorin, Gianluca Palermo, Cristina Silvano |
MPSoCs run-time monitoring through Networks-on-Chip.  |
DATE  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic, V. Catalano, Cristina Silvano |
Secure Memory Accesses on Networks-on-Chip.  |
IEEE Trans. Computers  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
An efficient design space exploration methodology for multiprocessor SoC architectures based on response surface methods.  |
ICSAMOS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Martino Sykora, Giovanni Agosta, Cristina Silvano |
Dynamic configuration of application-specific implicit instructions for embedded pipelined processors.  |
SAC  |
2008 |
DBLP DOI BibTeX RDF |
implicit issue, reconfiguration, pipelined architecture |
| 1 | Oreste Villa, Gianluca Palermo, Cristina Silvano |
Efficiency and scalability of barrier synchronization on NoC based many-core architectures.  |
CASES  |
2008 |
DBLP DOI BibTeX RDF |
scalability, synchronization, efficiency, Multicore, NoC, barrier, Manycore |
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints.  |
SASP  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Robust optimization of SoC architectures: A multi-scenario approach.  |
ESTImedia  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Fiorin, Gianluca Palermo, Cristina Silvano |
A security monitoring service for NoCs.  |
CODES+ISSS  |
2008 |
DBLP DOI BibTeX RDF |
MultiProcessor System-on-Chip (MP-SoC), security, embedded systems, Network-on-Chip (NoC) |
| 1 | Cristina Silvano, Giovanni Agosta, Gianluca Palermo |
Efficient architecture/compiler co-exploration using analytical models.  |
Design Autom. for Emb. Sys.  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Exploration of distributed shared memory architectures for NoC-based multiprocessors.  |
Journal of Systems Architecture  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Beltrame, Donatella Sciuto, Cristina Silvano |
Multi-Accuracy Power and Performance Transaction-Level Modeling.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Giovanni Mariani, Riccardo Locatelli, Marcello Coppola |
Application-Specific Topology Design Customization for STNoC.  |
DSD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Fiorin, Cristina Silvano, Mariagiovanna Sami |
Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations.  |
DSD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Giovanni Mariani, Cristina Silvano, Riccardo Locatelli, Marcello Coppola |
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs.  |
ASAP  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic, Cristina Silvano |
A data protection unit for NoC-based architectures.  |
CODES+ISSS  |
2007 |
DBLP DOI BibTeX RDF |
multiprocessor system-on-chip (MPSoC), security, embedded systems, data protection, network-on-chip (NoC) |
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
An efficient synchronization technique for multiprocessor systems on-chip.  |
SIGARCH Computer Architecture News  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Efficient Synchronization for Embedded On-Chip Multiprocessors.  |
IEEE Trans. VLSI Syst.  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors.  |
ICSAMOS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Beltrame, Donatella Sciuto, Cristina Silvano, Pierre G. Paulin, Essaid Bensoudane |
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures.  |
VLSI-SoC  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa |
Power/performance hardware optimization for synchronization intensive applications in MPSoCs.  |
DATE  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Beltrame, Donatella Sciuto, Cristina Silvano, Damien Lyonnard, Chuck Pilkington |
Exploiting TLM and object introspection for system-level simulation.  |
DATE  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Beltrame, Dario Bruschi, Donatella Sciuto, Cristina Silvano |
Decision-theoretic exploration of multiProcessor platforms.  |
CODES+ISSS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrea Bona, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Reducing the complexity of instruction-level power models for VLIW processors.  |
Design Autom. for Emb. Sys.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Multi-objective design space exploration of embedded systems.  |
J. Embedded Computing  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach.  |
Integration  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano |
PIRATE: A Framework for Power/Performance Exploration of Network-on-Chip Architectures.  |
PATMOS  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors.  |
ACM Great Lakes Symposium on VLSI  |
2004 |
DBLP DOI BibTeX RDF |
low-power design, branch prediction, VLIW processors |
| 1 | Giovanni Agosta, Gianluca Palermo, Cristina Silvano |
Multi-objective co-exploration of source code transformations and design space architectures for low-power embedded systems.  |
SAC  |
2004 |
DBLP DOI BibTeX RDF |
hardware/software co-exploration, embedded systems, low-power design, source code transformations |
| 1 | Giovanni Beltrame, Gianluca Palermo, Donatella Sciuto, Cristina Silvano |
Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs.  |
CASES  |
2004 |
DBLP DOI BibTeX RDF |
multiprocessor, network on chip, low-power design, platform based design |
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems.  |
PATMOS  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, S. Valsecchi, Vittorio Zaccaria |
A system-level methodology for fast multi-objective design space exploration.  |
ACM Great Lakes Symposium on VLSI  |
2003 |
DBLP DOI BibTeX RDF |
system-level methodologies, embedded systems, low-power design, design space exploration |
| 1 | Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Branch prediction techniques for low-power VLIW processors.  |
ACM Great Lakes Symposium on VLSI  |
2003 |
DBLP DOI BibTeX RDF |
low-power design, branch prediction, VLIW processors |
| 1 | Lorenzo Salvemini, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems.  |
SAC  |
2003 |
DBLP BibTeX RDF |
|
| 1 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture.  |
DATE  |
2003 |
DBLP DOI BibTeX RDF |
Embedded Systems, Low-Power, Design Space Exploration |
| 1 | Luca Benini, Davide Bruni, Mauro Chinosi, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-Based Embedded Systems.  |
Design Autom. for Emb. Sys.  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems.  |
Design Autom. for Emb. Sys.  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
An instruction-level energy model for embedded VLIW architectures.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Low-power data forwarding for VLIW embedded architectures.  |
IEEE Trans. VLSI Syst.  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon |
Energy estimation and optimization of embedded VLIW processors based on instruction clustering.  |
DAC  |
2002 |
DBLP DOI BibTeX RDF |
power estimation, vliw architectures |
| 1 | Andrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon |
An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores.  |
DATE  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon |
Exploiting data forwarding to reduce the power budget of VLIW embedded processors.  |
DATE  |
2001 |
DBLP DOI BibTeX RDF |
VLIW embedded architectures, low-power, pipeline processors, forwarding |
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
Fast system-level exploration of memory architectures driven by energy-delay metrics.  |
ISCAS  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
A design framework to efficiently explore energy-delay tradeoffs.  |
CODES  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
Power Exploration for Embedded VLIW Architectures.  |
ICCAD  |
2000 |
DBLP BibTeX RDF |
|
| 1 | Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria |
Instruction-level power estimation for embedded VLIW cores.  |
CODES  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, M. Polentarutti, Donatella Sciuto, Cristina Silvano |
Power optimization of system-level address buses based on software profiling.  |
CODES  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano |
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems.  |
DATE  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano |
Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study.  |
ICCD  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Donatella Sciuto, Cristina Silvano |
Power estimation for architectural exploration of HW/SW communication on system-level buses.  |
CODES  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Franco Fummi, Donatella Sciuto, Cristina Silvano |
Automatic generation of error control codes for computer applications.  |
IEEE Trans. VLSI Syst.  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | William Fornaciari, Paolo Gubian, Donatella Sciuto, Cristina Silvano |
Power estimation of embedded systems: a hardware/software codesign approach.  |
IEEE Trans. VLSI Syst.  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Dragone, Roberto Zafalon, Carlo Guardiani, Cristina Silvano |
Power invariant vector compaction based on bit clustering and temporal partitioning.  |
ISLPED  |
1998 |
DBLP DOI BibTeX RDF |
low power VLSI design, vector compaction, Markov chains, power estimation |
| 1 | Luca Benini, Giovanni De Micheli, Donatella Sciuto, Enrico Macii, Cristina Silvano |
Address Bus Encoding Techniques for System-Level Power Optimization.  |
DATE  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Donatella Sciuto, Cristina Silvano, Renato Stefanelli |
Systematic AUED Codes for Self-Checking Architectures. (PDF / PS)  |
DFT  |
1998 |
DBLP DOI BibTeX RDF |
AUED Codes, Self-Checking Combinational Circuits, Stuck-at Faults, Unidirectional Errors |
| 1 | William Fornaciari, Paolo Gubian, Donatella Sciuto, Cristina Silvano |
A VHDL-based approach for power estimation of embedded systems.  |
Journal of Systems Architecture  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Benini, Giovanni De Micheli, Enrico Macii, Donatella Sciuto, Cristina Silvano |
Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems.  |
Great Lakes Symposium on VLSI  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Penzo, Donatella Sciuto, Cristina Silvano |
Construction techniques for systematic SEC-DED codes with single byte error detection and partial correction capability for computer memory systems.  |
IEEE Transactions on Information Theory  |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Penzo, Donatella Sciuto, Cristina Silvano |
VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes.  |
VLSI Design  |
1995 |
DBLP DOI BibTeX RDF |
odd-weight-column byte error detection, SEC-DED codes, single error correction, double error detection, single byte error detection, SEC-DED-SBD codes, high performances VLSI implementations, high speed encoding/decoding circuits, parallel data manipulation, VHSIC Hardware Description Language, VHDL description, parallel processing, VLSI, software tool, error correction codes, application specific integrated circuits, logic CAD, decoding, VLSI design, error detection codes, hardware description languages, integrated logic circuits, digital integrated circuits |
| 1 | Luca Penzo, Donatella Sciuto, Cristina Silvano |
GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications.  |
ISCAS  |
1995 |
DBLP BibTeX RDF |
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