Search results for "DAC"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Azalia Mirhoseini, Miodrag Potkonjak, Farinaz Koushanfar	Coding-based energy minimization for phase change memory.	DAC	2012	DBLP DOI BibTeX RDF
1	Patrick Groeneveld, Donatella Sciuto, Soha Hassoun (eds.)	The 49th Annual Design Automation Conference 2012, DAC '12, San Francisco, CA, USA, June 3-7, 2012	DAC	2012	DBLP BibTeX RDF
1	Martin C. Rinard	Obtaining and reasoning about good enough software.	DAC	2012	DBLP DOI BibTeX RDF
1	Adwait Jog, Asit K. Mishra, Cong Xu, Yuan Xie, Vijaykrishnan Narayanan, Ravishankar Iyer, Chita R. Das	Cache revive: architecting volatile STT-RAM caches for enhanced performance in CMPs.	DAC	2012	DBLP DOI BibTeX RDF
1	Valeria Bertacco	Humans for EDA and EDA for humans.	DAC	2012	DBLP DOI BibTeX RDF
1	Jilong Kuang, Laxmi N. Bhuyan, Raymond Klefstad	Traffic-aware power optimization for network applications on multicore servers.	DAC	2012	DBLP DOI BibTeX RDF
1	Shashikanth Bobba, Michele De Marchi, Yusuf Leblebici, Giovanni De Micheli	Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors.	DAC	2012	DBLP DOI BibTeX RDF
1	Zhenman Fang, Qinghao Min, Keyong Zhou, Yi Lu, Yibin Hu, Weihua Zhang, Haibo Chen, Jian Li, Binyu Zang	Transformer: a functional-driven cycle-accurate multicore simulator.	DAC	2012	DBLP DOI BibTeX RDF
1	Deokwoo Jung, Andreas Savvides, Athanasios Bamis	Tracking appliance usage information in residential settings using off-the-shelf low-frequency meters.	DAC	2012	DBLP DOI BibTeX RDF
1	Xiang Chen, Jian Zheng, Yiran Chen, Mengying Zhao, Chun Jason Xue	Quality-retaining OLED dynamic voltage scaling for video streaming applications on mobile devices.	DAC	2012	DBLP DOI BibTeX RDF
1	Jin Sun, Priyank Gupta, Janet Meiling Wang Roveda	A new uncertainty budgeting based method for robust analog/mixed-signal design.	DAC	2012	DBLP DOI BibTeX RDF
1	Frank Liu, Ben R. Hodges	Dynamic river network simulation at large scale.	DAC	2012	DBLP DOI BibTeX RDF
1	Robinson E. Pino, Hai Helen Li, Yiran Chen, Miao Hu, Beiye Liu	Statistical memristor modeling and case study in neuromorphic computing.	DAC	2012	DBLP DOI BibTeX RDF
1	Debjit Sinha, Chandu Visweswariah, Natesan Venkateswaran, Jinjun Xiong, Vladimir Zolotov	Reversible statistical max/min operation: concept and applications to timing.	DAC	2012	DBLP DOI BibTeX RDF
1	Po-Wei Lee, Hsu-Chieh Lee, Yuan-Kai Ho, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen	Obstacle-avoiding free-assignment routing for flip-chip designs.	DAC	2012	DBLP DOI BibTeX RDF
1	Diego Melpignano, Luca Benini, Eric Flamand, Bruno Jego, Thierry Lepley, Germain Haugou, Fabien Clermidy, Denis Dutoit	Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications.	DAC	2012	DBLP DOI BibTeX RDF
1	Rei-Fu Huang, Hao-Yu Yang, Mango Chia-Tso Chao, Shih-Chin Lin	Alternate hammering test for application-specific DRAMs and an industrial case study.	DAC	2012	DBLP DOI BibTeX RDF
1	Xueqian Zhao, Zhuo Feng	Towards efficient SPICE-accurate nonlinear circuit simulation with on-the-fly support-circuit preconditioners.	DAC	2012	DBLP DOI BibTeX RDF
1	Daniel Grissom, Philip Brisk	Path scheduling on digital microfluidic biochips.	DAC	2012	DBLP DOI BibTeX RDF
1	Xuehui Zhang, Nicholas Tuzzio, Mohammad Tehranipoor	Identification of recovered ICs using fingerprints from a light-weight on-chip sensor.	DAC	2012	DBLP DOI BibTeX RDF
1	Giovanni Agosta, Alessandro Barenghi, Gerardo Pelosi	A code morphing methodology to automate power analysis countermeasures.	DAC	2012	DBLP DOI BibTeX RDF
1	Shi-Yu Huang, Yu-Hsiang Lin, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter, Yung-Fa Chou, Ding-Ming Kwai	Small delay testing for TSVs in 3-D ICs.	DAC	2012	DBLP DOI BibTeX RDF
1	Wayne Burleson, Shane S. Clark, Benjamin Ransford, Kevin Fu	Design challenges for secure implantable medical devices.	DAC	2012	DBLP DOI BibTeX RDF
1	Jeyavijayan Rajendran, Youngok Pino, Ozgur Sinanoglu, Ramesh Karri	Security analysis of logic obfuscation.	DAC	2012	DBLP DOI BibTeX RDF
1	Jason Cong, Peng Zhang, Yi Zou	Optimizing memory hierarchy allocation with loop transformations for high-level synthesis.	DAC	2012	DBLP DOI BibTeX RDF
1	Bo Liu, Hadi Aliakbarian, Soheil Radiom, Guy A. E. Vandenbosch, Georges G. E. Gielen	Efficient multi-objective synthesis for microwave components based on computational intelligence techniques.	DAC	2012	DBLP DOI BibTeX RDF
1	Yanheng Zhang, Chris Chu	GDRouter: interleaved global routing and detailed routing for ultimate routability.	DAC	2012	DBLP DOI BibTeX RDF
1	Saurabh Sinha, Greg Yeric, Vikas Chandra, Brian Cline, Yu Cao	Exploring sub-20nm FinFET design with predictive technology models.	DAC	2012	DBLP DOI BibTeX RDF
1	Jyothi Bhaskarr Velamala, Ketul Sutaria, Takashi Sato, Yu Cao	Physics matters: statistical aging prediction under trapping/detrapping.	DAC	2012	DBLP DOI BibTeX RDF
1	Johnathan York, Derek Chiou	On the asymptotic costs of multiplexer-based reconfigurability.	DAC	2012	DBLP DOI BibTeX RDF
1	Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim	PowerField: a transient temperature-to-power technique based on Markov random field theory.	DAC	2012	DBLP DOI BibTeX RDF
1	Yang Zhang, Haotian Liu, Qing Wang, Neric Fong, Ngai Wong	Fast nonlinear model order reduction via associated transforms of high-order volterra transfer functions.	DAC	2012	DBLP DOI BibTeX RDF
1	Yan Luo, Krishnendu Chakrabarty	Design of pin-constrained general-purpose digital microfluidic biochips.	DAC	2012	DBLP DOI BibTeX RDF
1	Miao Hu, Hai Li, Qing Wu, Garrett S. Rose	Hardware realization of BSB recall function using memristor crossbar arrays.	DAC	2012	DBLP DOI BibTeX RDF
1	Michael Gester, Dirk Müller 0003, Tim Nieberg, Christian Panten, Christian Schulte 0002, Jens Vygen	Algorithms and data structures for fast and good VLSI routing.	DAC	2012	DBLP DOI BibTeX RDF
1	Arie Meir, Jaijeet S. Roychowdhury	BLAST: efficient computation of nonlinear delay sensitivities in electronic and biological networks using barycentric Lagrange enabled transient adjoint analysis.	DAC	2012	DBLP DOI BibTeX RDF
1	Wujie Wen, Yaojun Zhang, Yiran Chen, Yu Wang 0002, Yuan Xie	PS3-RAM: a fast portable and scalable statistical STT-RAM reliability analysis method.	DAC	2012	DBLP DOI BibTeX RDF
1	Joseph Crop, Robert Pawlowski, Patrick Chiang	Regaining throughput using completion detection for error-resilient, near-threshold logic.	DAC	2012	DBLP DOI BibTeX RDF
1	Moongon Jung, David Z. Pan, Sung Kyu Lim	Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs.	DAC	2012	DBLP DOI BibTeX RDF
1	Hamid Reza Ghasemi, Abhishek A. Sinkar, Michael J. Schulte, Nam Sung Kim	Cost-effective power delivery to support per-core voltage domains for power-constrained processors.	DAC	2012	DBLP DOI BibTeX RDF
1	Feng Yuan, Xiao Liu, Qiang Xu	X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug.	DAC	2012	DBLP DOI BibTeX RDF
1	Junchul Choi, Hyunok Oh, Sungchan Kim, Soonhoi Ha	Executing synchronous dataflow graphs on a SPM-based multicore architecture.	DAC	2012	DBLP DOI BibTeX RDF
1	Zahra Sasanian, Robert Wille, D. Michael Miller	Realizing reversible circuits using a new class of quantum gates.	DAC	2012	DBLP DOI BibTeX RDF
1	Ivan Beretta, Francisco J. Rincón, Nadia Khaled, Paolo Roberto Grassi, Vincenzo Rana, David Atienza	Design exploration of energy-performance trade-offs for wireless sensor networks.	DAC	2012	DBLP DOI BibTeX RDF
1	Muhammad Shafique, Bruno Zatt, Fabio Leandro Walter, Sergio Bampi, Jörg Henkel	Adaptive power management of on-chip video memory for multiview video coding.	DAC	2012	DBLP DOI BibTeX RDF
1	Georgios Karakonstantis, Christoph Roth, Christian Benkeser, Andreas Burg	On the exploitation of the inherent error resilience of wireless systems under unreliable silicon.	DAC	2012	DBLP DOI BibTeX RDF
1	Karthik V. Aadithya, Jaijeet S. Roychowdhury	DAE2FSM: automatic generation of accurate discrete-time logical abstractions for continuous-time circuit dynamics.	DAC	2012	DBLP DOI BibTeX RDF
1	Yu-Hung Huang, Yi-Shan Lu, Hsin-I. Wu, Ren-Song Tsay	A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.	DAC	2012	DBLP DOI BibTeX RDF
1	Yi-Ting Chung, Jie-Hong Roland Jiang	Functional timing analysis made fast and general.	DAC	2012	DBLP DOI BibTeX RDF
1	Marcela Zuluaga, Peter A. Milder, Markus Püschel	Computer generation of streaming sorting networks.	DAC	2012	DBLP DOI BibTeX RDF
1	Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David Blaauw, Trevor N. Mudge	Process variation in near-threshold wide SIMD architectures.	DAC	2012	DBLP DOI BibTeX RDF
1	Carven Chan, Daniel Schwartz-Narbonne, Divjyot Sethi, Sharad Malik	Specification and synthesis of hardware checkpointing and rollback mechanisms.	DAC	2012	DBLP DOI BibTeX RDF
1	Daniel Morris, David Bromberg, Jian-Gang (Jimmy) Zhu, Larry T. Pileggi	mLogic: ultra-low voltage non-volatile logic circuits using STT-MTJ devices.	DAC	2012	DBLP DOI BibTeX RDF
1	Aaron Dingler, Steve Kurtz, Michael T. Niemier, Xiaobo Sharon Hu, György Csaba, Joseph Nahas, Wolfgang Porod, Gary H. Bernstein, Peng Li, Vjiay Karthik Sankar	Making non-volatile nanomagnet logic non-volatile.	DAC	2012	DBLP DOI BibTeX RDF
1	Sanjit A. Seshia	Sciduction: combining induction, deduction, and structure for verification and synthesis.	DAC	2012	DBLP DOI BibTeX RDF
1	Sheng Wei, Kai Li, Farinaz Koushanfar, Miodrag Potkonjak	Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry.	DAC	2012	DBLP DOI BibTeX RDF
1	Chin-Cheng Kuo, Wei-Yi Hu, Yi-Hung Chen, Jui-Feng Kuan, Yi-Kan Cheng	Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits.	DAC	2012	DBLP DOI BibTeX RDF
1	Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang 0002	Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors.	DAC	2012	DBLP DOI BibTeX RDF
1	Mohammed El-Shambakey, Binoy Ravindran	STM concurrency control for embedded real-time software with tighter time bounds.	DAC	2012	DBLP DOI BibTeX RDF
1	Lars Middendorf, Christophe Bobda, Christian Haubelt	Hardware synthesis of recursive functions through partial stream rewriting.	DAC	2012	DBLP DOI BibTeX RDF
1	Kai Huang, Gang Chen, Christian Buckl, Alois Knoll	Conforming the runtime inputs for hard real-time embedded systems.	DAC	2012	DBLP DOI BibTeX RDF
1	Yaoguang Wei, Cliff C. N. Sze, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Lakshmi N. Reddy, Andrew D. Huber, Gustavo E. Téllez, Douglas Keller, Sachin S. Sapatnekar	GLARE: global and local wiring aware routability evaluation.	DAC	2012	DBLP DOI BibTeX RDF
1	Arkadeb Ghosal, Rhishikesh Limaye, Kaushik Ravindran, Stavros Tripakis, Ankita Prasad, Guoqiang Wang, Trung N. Tran, Hugo A. Andrade	Static dataflow with access patterns: semantics and analysis.	DAC	2012	DBLP DOI BibTeX RDF
1	Christoph M. Kirsch, Hannes Payer	Incorrect systems: it's not the problem, it's the solution.	DAC	2012	DBLP DOI BibTeX RDF
1	Fu-Wei Chen, TingTing Hwang	Clock tree synthesis with methodology of re-use in 3D IC.	DAC	2012	DBLP DOI BibTeX RDF
1	Yoshi Shih-Chieh Huang, Yu-Chi Chang, Tsung-Chan Tsai, Yuan-Ying Chang, Chung-Ta King	Attackboard: a novel dependency-aware traffic generator for exploring NoC design space.	DAC	2012	DBLP DOI BibTeX RDF
1	Jing Guo, Fan Yang, Subarna Sinha, Charles Chiang, Xuan Zeng	Improved tangent space based distance metric for accurate lithographic hotspot classification.	DAC	2012	DBLP DOI BibTeX RDF
1	Brian Jeff	Big.LITTLE system architecture from ARM: saving power through heterogeneous multiprocessing and task context migration.	DAC	2012	DBLP DOI BibTeX RDF
1	Wenchao Li, Sanjit A. Seshia, Somesh Jha	CrowdMine: towards crowdsourced human-assisted verification.	DAC	2012	DBLP DOI BibTeX RDF
1	Fangming Ye, Krishnendu Chakrabarty	TSV open defects in 3D integrated circuits: characterization, test, and optimal spare allocation.	DAC	2012	DBLP DOI BibTeX RDF
1	Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim	Exploiting die-to-die thermal coupling in 3D IC placement.	DAC	2012	DBLP DOI BibTeX RDF
1	Ian G. Harris	Extracting design information from natural language specifications.	DAC	2012	DBLP DOI BibTeX RDF
1	Sheng Chou, Meng-Kai Hsu, Yao-Wen Chang	Structure-aware placement for datapath-intensive circuit designs.	DAC	2012	DBLP DOI BibTeX RDF
1	Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin	Courteous cache sharing: being nice to others in capacity management.	DAC	2012	DBLP DOI BibTeX RDF
1	Kai-Hui Chang, Chris Browy	Improving gate-level simulation accuracy when unknowns exist.	DAC	2012	DBLP DOI BibTeX RDF
1	Xiang Qiu, Malgorzata Marek-Sadowska	Can pin access limit the footprint scaling?	DAC	2012	DBLP DOI BibTeX RDF
1	Po-Chun Huang, Yuan-Hao Chang, Tei-Wei Kuo	Joint management of RAM and flash memory with access pattern considerations.	DAC	2012	DBLP DOI BibTeX RDF
1	Jason Cong, Bin Liu	A metric for layout-friendly microarchitecture optimization in high-level synthesis.	DAC	2012	DBLP DOI BibTeX RDF
1	Farinaz Koushanfar, Saverio Fazzari, Carl McCants, William Bryson, Matthew Sale, Peilin Song, Miodrag Potkonjak	Can EDA combat the rise of electronic counterfeiting?	DAC	2012	DBLP DOI BibTeX RDF
1	Henry Hoffmann, Jim Holt, George Kurian, Eric Lau, Martina Maggio, Jason E. Miller, Sabrina M. Neuman, Mahmut E. Sinangil, Yildiz Sinangil, Anant Agarwal, Anantha P. Chandrakasan, Srinivas Devadas	Self-aware computing in the Angstrom processor.	DAC	2012	DBLP DOI BibTeX RDF
1	Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien	A semiempirical model for wakeup time estimation in power-gated logic clusters.	DAC	2012	DBLP DOI BibTeX RDF
1	Giovanni De Micheli, Cristina Boero, Camilla Baj-Rossi, Irene Taurino, Sandro Carrara	Integrated biosensors for personalized medicine.	DAC	2012	DBLP DOI BibTeX RDF
1	Luis Angel D. Bathen, Nikil Dutt	HaVOC: a hybrid memory-aware virtualization layer for on-chip distributed ScratchPad and non-volatile memories.	DAC	2012	DBLP DOI BibTeX RDF
1	Shao-Yun Fang, Yao-Wen Chang	Simultaneous flare level and flare variation minimization with dummification in EUVL.	DAC	2012	DBLP DOI BibTeX RDF
1	Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy	Cognitive computing with spin-based neural networks.	DAC	2012	DBLP DOI BibTeX RDF
1	Rouwaida Kanj, Rajiv V. Joshi, Zhuo Li, Jerry Hayes, Sani R. Nassif	Yield estimation via multi-cones.	DAC	2012	DBLP DOI BibTeX RDF
1	G. Reza Chaji, Javid Jaffari	Generic low-cost characterization of Vth and mobility variations in LTPS TFTs for non-uniformity calibration of active-matrix OLED displays.	DAC	2012	DBLP DOI BibTeX RDF
1	Ofer Shacham, Sameh Galal, Sabarish Sankaranarayanan, Megan Wachs, John Brunhaver, Artem Vassiliev, Mark Horowitz, Andrew Danowitz, Wajahat Qadeer, Stephen Richardson	Avoiding game over: bringing design to the next level.	DAC	2012	DBLP DOI BibTeX RDF
1	Yangfeng Su, Fan Yang, Xuan Zeng	AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits.	DAC	2012	DBLP DOI BibTeX RDF
1	Karthik Chandrasekar 0001, Benny Akesson, Kees Goossens	Run-time power-down strategies for real-time SDRAM memory controllers.	DAC	2012	DBLP DOI BibTeX RDF
1	Joonho Kong, Sung Woo Chung	Exploiting narrow-width values for process variation-tolerant 3-D microprocessors.	DAC	2012	DBLP DOI BibTeX RDF
1	Juri Ranieri, Alessandro Vincenzi, Amina Chebira, David Atienza, Martin Vetterli	EigenMaps: algorithms for optimal thermal maps extraction and sensor placement on multicore processors.	DAC	2012	DBLP DOI BibTeX RDF
1	Daniel Lo, G. Edward Suh	Worst-case execution time analysis for parallel run-time monitoring.	DAC	2012	DBLP DOI BibTeX RDF
1	Xin Zhao, Michael Scheuermann, Sung Kyu Lim	Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs.	DAC	2012	DBLP DOI BibTeX RDF
1	Nikolai Ryzhenko, Steven Burns	Standard cell routing via boolean satisfiability.	DAC	2012	DBLP DOI BibTeX RDF
1	Bo Liu, Maryam Ashouei, Jos Huisken, José Pineda de Gyvez	Standard cell sizing for subthreshold operation.	DAC	2012	DBLP DOI BibTeX RDF
1	Sanghamitra Roy, Koushik Chakraborty	Predicting timing violations through instruction-level path sensitization analysis.	DAC	2012	DBLP DOI BibTeX RDF
1	Jerónimo Castrillón, Andreas Tretter, Rainer Leupers, Gerd Ascheid	Communication-aware mapping of KPN applications onto heterogeneous MPSoCs.	DAC	2012	DBLP DOI BibTeX RDF
1	Xiaofei Guo, Ramesh Karri	Invariance-based concurrent error detection for advanced encryption standard.	DAC	2012	DBLP DOI BibTeX RDF
1	Andrew B. Kahng, Seokhyeong Kang	Accuracy-configurable adder for approximate arithmetic designs.	DAC	2012	DBLP DOI BibTeX RDF

Publications at "DAC"( http://dblp.L3S.de/Venues/DAC )