| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Vladimir Pasca, Saif-Ur Rehman, Lorena Anghel, Mounir Benabdenbi |
Efficient link-level error resilience in 3D NoCs.  |
DDECS  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Vladimir Petrovic, Marko Ilic, Günter Schoof, Zoran Stamenkovic |
Design methodology for fault tolerant ASICs. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Pavol Korcek, Martin Zádník |
Lightweight benchmarking of platforms for network traffic processing. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin (eds.) |
IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012 |
DDECS |
2012 |
DBLP BibTeX RDF |
|
| 1 | Georg Hofferek |
Automated synthesis and design-error repair of systems. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Mauderer, Marvin Freier, Jan-Hendrik Oetjens, Wolfgang Rosenstiel |
Efficient digital design for automotive mixed-signal ASICs using simulink. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Raimund Ubar, Sergei Kostin, Jaan Raik |
Multiple stuck-at-fault detection theorem. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Atef Mohamed, Robert Swoboda, Horst Zimmermann |
A gigabit fully integrated plastic optical fiber receiver for a RC-LED source. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Erik Larsson, Konstantin Sibin |
Fault management in an IEEE P1687 (IJTAG) environment. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed Naif M. Alahmadi, Gordon Russell, Alex Yakovlev |
Reconfigurable time interval measurement circuit incorporating a programmable gain time difference amplifier. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz |
LC-VCO design automation tool for nanometer CMOS technology. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Giuseppe Di Guglielmo, Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli |
On the use of assertions for embedded-software dynamic verification. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoyuan Ying, Ashok Jaiswal, Mohamed A. Abd El-Ghany, Thomas Hollstein, Klaus Hofmann |
A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Straka, Lukas Miculka, Jan Kastil, Zdenek Kotásek |
Test platform for fault tolerant systems design properties verification. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaan Raik, Vineeth Govind |
Low-area boundary BIST architecture for mesh-like network-on-chip. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda |
On-line test of embedded systems: Which role for functional test? |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans G. Kerkhoff, Yong Zhao |
The design of dependable flexible multi-sensory System-on-Chips for security applications. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Péter Földesy, Domonkos Gergelyi, Csaba Fuzy, Gergely Károlyi |
Test and configuration architecture of a sub-THz CMOS detector array. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi |
Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexander Wold, Dirk Koch, Jim Tørresen |
Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Arthur Ceratti, Thiago Copetti, Letícia Maria Bolzani Poehls, Fabian Vargas |
On-chip aging sensor to monitor NBTI effect in nano-scale SRAM. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Thilo Vörtler, Steffen Rülke, Petra Hofstedt |
Bounded model checking of Contiki applications. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid |
System side-channel leakage emulation for HW/SW security coverification of MPSoCs. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Ruzicka, Vaclav Simek |
NAND/NOR gate polymorphism in low temperature environment. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jacek Gradzki |
Low power balun Design for 1.575 GHz in 90 nm CMOS rechnology. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Parisa Kabiri, Zainalabedin Navabi |
Effective RT-level software-based self-testing of embedded processor cores. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaroslav Sykora, Lukas Kohout, Roman Bartosinski, Leos Kafka, Martin Danek, Petr Honzík |
The architecture and the technology characterization of an FPGA-based customizable Application-Specific Vector Processor. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Said Hamdioui |
TSV based 3D stacked ICs: Opportunities and challenges. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominik Macko, Katarina Jelemenska |
VHDLVisualizer: HDL model visualization with simulation-based verification. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Eckhard Grass, Milos Krstic, Xin Fan, Steffen Zeidler |
Asynchronous circuit design: From basics to practical applications. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Taskin Kocak, Preeti Patil |
Design and implementation of high-performance high-valency ling adders. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuelian Liu, Aamir Zia, Mitchell R. LeRoy, Srikumar Raman, Ryan Clarke, Russell P. Kraft, John F. McDonald |
A three-dimensional DRAM using floating body cell in FDSOI devices. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Efi Arvaniti, Yiorgos Tsiatouhas |
Low power scan by partitioning and scan hold. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jakub Korczyc, Andrzej Krasniewski |
Evaluation of susceptibility of FPGA-based circuits to fault injection attacks based on clock glitching. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf |
A low-overhead monitoring ring interconnect for MPSoC parameter optimization. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehdi Dehbashi, Görschwin Fey |
Automated debugging from pre-silicon to post-silicon. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus |
Combining on-line fault detection and logic self repair. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jan Pospísil, Martin Novotný |
Lightweight cipher resistivity against brute-force attack: Analysis of PRESENT. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilias Pappas, Stilianos Siskos, Alkis A. Hatzopoulos |
A new analog output buffer for data driver of active matrix displays using low-temperature polycrystalline silicon thin-film transistors. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsuan-Ling Kao, S. P. Shih, Chih-Sheng Yeh, Li-Chun Chang |
A low phase noise Ka-band voltage controlled oscillator using 0.15 µm GaAs pHEMT technology. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Rozkovec, Jiri Jenícek, Ondrej Novák |
An evaluation of the application dependent FPGA test method. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Knut Wold, Slobodan Petrovic |
Security properties of oscillator rings in true random number generators. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ronald Spilka, Gerald Hilber, Andreas Rauchenecker, Dominik Gruber, Michael Sams, Timm Ostermann |
Generation of non-overlapping clock signals without using a feedback loop. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Tomas Napravnik, Vlastimil Kote, Vladimir Molata, Jiri Jakovenko |
Differential evolutionary optimization algorithm applied to ESD MOSFET model fitting problem. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Emad Samuel Malki Ebeid, Davide Quaglia, Franco Fummi |
Generation of SystemC/TLM code from UML/MARTE sequence diagrams for verification. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Josef Strnadel |
Monitoring-driven HW/SW interrupt overload prevention for embedded real-time systems. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Ping Cheng, Jen-Chieh Liu, Kuo-Hsing Cheng |
Auto-calibration techniques in built-in jitter measurement circuit. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Guang, Ethiopia Nigussie, Juha Plosila, Jouni Isoaho, Hannu Tenhunen |
HLS-DoNoC: High-level simulator for dynamically organizational NoCs. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Pospisilik, Milan Adamek |
Optimised Power Supply Unit Design. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Chloupek, Ondrej Novák, Jiri Jenícek |
On test time reduction using pattern overlapping, broadcasting and on-chip decompression. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Hsiang Juan, Ching-Hsing Luo, Hong-Yi Huang |
A low voltage sigma delta modulator for temperature sensor. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Liberis Voudouris, Spiridon Nikolaidis, Abdoul Rjoub |
High speed FPGA implementation of hough transform for real-time applications. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Varadan Savulimedu Veeravalli, Andreas Steininger |
Radiation-tolerant combinational gates - an implementation based comparison. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Uwe Knöchel |
3D integration: Opportunities, design challenges and approaches. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Lyl M. Ciganda, Michelangelo Grosso, Ernesto Sánchez, Matteo Sonza Reorda |
A SBST strategy to test microprocessors' Branch Target Buffer. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hamid Mushtaq, Zaid Al-Ars, Koen Bertels |
A user-level library for fault tolerance on shared memory multicore systems. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Arkadiusz Bukowiec, Marian Adamski |
Synthesis of Petri nets into FPGA with operation flexible memories. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Roland Dobai, Marcel Baláz |
Genetic method for compressed skewed-load delay test generation. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková |
OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Behzad Mesgarzadeh, Ingemar Söderquist Saab, Atila Alvandpour |
Reliability challenges in avionics due to silicon aging. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Lukás Nagy, Viera Stopjaková |
Current sensing completion detection in dual-rail asynchronous systems. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Gag, Tim Wegner, Ansgar Waschki, Dirk Timmermann |
Temperature and on-chip crosstalk measurement using ring oscillators in FPGA. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Stephan Eggersglüß, Rene Krenz-Baath, Andreas Glowatz, Friedrich Hapke, Rolf Drechsler |
A new SAT-based ATPG for generating highly compacted test sets. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Kohlík, Hana Kubátová |
Reduction of complex safety models based on Markov chains. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková |
Application of IDDT test towards increasing SRAM reliability in nanometer technologies. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus |
An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Petr Fiser, Jan Schmidt |
Improving the iterative power of resynthesis. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ralph Görgen, Jan-Hendrik Oetjens, Wolfgang Nebel |
Automatic integration of hardware descriptions into system-level models. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiang Zheng, Ming Liu, Hong Chen, Huamin Cao, Cong Wang, Zhiqiang Gao |
A 512 kb SRAM in 65nm CMOS with divided bitline and novel two-stage sensing technique. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrzej Pfitzner |
Vertical Slit Transistor based Integrated Circuits (VeSTICs). |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hagen Sämrow, Claas Cornelius, Philipp Gorski, Andreas Tockhorn, Dirk Timmermann |
Selective redundancy to improve reliability and to slow down delay degradation due to gate oxide breakdown. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Maksim Gorev, Vadim Pesonen, Peeter Ellervee |
Multisine signal generation method for a bioimpedance measurement device. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie |
CIVA: Custom instruction vulnerability analysis framework. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ping-Liang Lai, Der-Chen Huang |
Online self-checking and correction for crosstalk-induced timing errors on VLSI interconnects. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Matej Hlatký, Valter Martinek, Elena Gramatová |
D&T Presenter - electronic interactive system for design and test education. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Rouhollah Feghhi, Sasan Naseh |
A 1V, low power, high-gain, 3 - 11 GHz double-balanced CMOS sub-harmonic mixer. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | George Kornaros, Ioannis Christoforakis, Maria Astrinaki |
An automated infrastructure for real-time monitoring of multi-core Systems-on-Chip. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Saber Izadpanah Tous, E. Mohamadi, M. Mousavi, R. Darvish Khalil Abadi, Ehsan Kargaran, Hooman Nabovati |
Developing a new phase noise estimation technique based on time varying model. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Krzysztof Marcinek, Witold A. Pleskacz |
AGATE - towards designing a low-power chip multithreading processor for mobile software defined radio systems. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Vladimir Milovanovic, Horst Zimmermann |
Complementary edge alignment and digital output signal speed-up CMOS positive feedback latches. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Wirnshofer, Leonhard Heiß, Anil Narayan Kakade, Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel |
Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmed A. El Badry, Mohamed A. Abd El-Ghany |
CDMA technique for Network-on-Chip. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Gürkan Uygur, Sebastian Sattler |
Digital-driven formal analog verification for asynchronously feed-backed circuitries. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Gordon Russell, Frank P. Burns, Alex Yakovlev |
VARMA - VARiability modelling and analysis tool. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor |
BTI impact on logical gates in nano-scale CMOS technology. |
DDECS |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Oscar Ruano, Juan Antonio Maestro, Pedro Reviriego |
Validation and optimization of TMR protections for circuits in radiation environments. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad A. Khan, Hans G. Kerkhoff |
A system-level platform for dependability enhancement and its analysis for mixed-signal SoCs. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michal Lukaszewicz, Tomasz Borejko, Witold A. Pleskacz |
A resistorless current reference source for 65 nm CMOS technology with low sensitivity to process, supply voltage and temperature variations. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiri Jenícek, Martin Rozkovec, Ondrej Novák |
Test vector overlapping based compression tool for narrow test access mechanism. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Farid Lahrach, Abderrahim Doumar, Eric Châtelet |
Fault tolerance of SRAM-based FPGA via configuration frames. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jirí Matousek, Pavol Korcek |
Precise IPv4/IPv6 packet generator based on NetCOPE platform. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Miroslav Manik, Elena Gramatová |
Efficient diagnostics algorithms for regular computing structures. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Oliver Stecklina, Frank Vater, Thomas Basmer, Erik Bergmann, Hannes Menzel |
Hybrid Simulation Environment for rapid MSP430 system design test and validation using MSPsim and SystemC. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hagen Sämrow, Claas Cornelius, Philipp Gorski, Jakob Salzmann, Andreas Tockhorn, Dirk Timmermann |
Functional enhancements of TMR for power efficient and error resilient ASIC designs. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mihkel Tagel, Peeter Ellervee, Thorsten Hollstein, Gert Jervan |
Communication modelling and synthesis for NoC-based systems with real-time constraints. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Sterpone, Davide Sabena, Salvatore Campagna, Matteo Sonza Reorda |
Fault injection analysis of transient faults in clustered VLIW processors. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pawel Dabal, Ryszard Pelka |
A chaos-based pseudo-random bit generator implemented in FPGA device. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Gábor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjaková |
Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Thilo Ohlemueller, Markus Petri |
Sample synchronization of multiple multiplexed DA and AD converters in FPGAs. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Arbet, Juraj Brenkus, Gábor Gyepes, Viera Stopjaková |
Increasing the efficiency of analog OBIST using on-chip compensation of technology variations. |
DDECS |
2011 |
DBLP DOI BibTeX RDF |
|
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