Search results for "DELTA"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Thinh Ngoc Tran, Surin Kittitornkun	Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPS.	DELTA	2010	DBLP DOI BibTeX RDF	NIDS/NIPS, FPGA, Pattern Matching, Massively Parallel Processing, Cuckoo Hashing
1	Hans G. Kerkhoff, Xiao Zhang	Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor.	DELTA	2010	DBLP DOI BibTeX RDF	DfX, reliability, SoC, dependability, reconfiguration, availability, BIST, many-core processors
1	Abhishek Pathak, Sushanta K. Mandal, Raj Kumar Nagpal, Rakesh Malik	Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design.	DELTA	2010	DBLP BibTeX RDF
1	Peter J. Green, Desmond P. Taylor	FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform.	DELTA	2010	DBLP DOI BibTeX RDF	Alamouti, maximum likelihood decoder, software radio test platform, FPGA, MIMO, real-time implementation
1	Tezaswi Raja, Samiha Mourad	Digital Logic Implementation in Memristor-Based Crossbars - A Tutorial.	DELTA	2010	DBLP DOI BibTeX RDF	memristor, crossbar, logical implication
1	Wei-Yuan Chiu, Jiun-Wei Horng, Hung Lee, Chen-Chuan Huang	DVCC-Based Voltage-Mode Biquadratic Filter with High-Input Impedance.	DELTA	2010	DBLP DOI BibTeX RDF	universal biquad, current conveyor, active filter
1	Jongwoo Jun, Jinyi Lee, Jaesun Lee	The Discrimination of Metallic Coins Using a Scan Type Magnetic Camera.	DELTA	2010	DBLP DOI BibTeX RDF	discrimination of metallic coin, Hall sensor array, magnetic flux leakage, induced current
1	Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas	(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems.	DELTA	2010	DBLP DOI BibTeX RDF
1	Byung Hoon Na, Kwang Mo Park, Sooraj R., Bong Kyu Jeong, Young Min Song, Yong Tak Lee, Chang-Soo Park	Design, Fabrication and Characterization of Asymmetric Fabry-Perot Modulator for Large Size Optical Shutter.	DELTA	2010	DBLP DOI BibTeX RDF	Electroabsorption modulator, quantum confined Stark effect, asymmetric Fabry-Perot cavity, multiple quantum well, 3D image
1	Amara Amara, Bastien Giraud, Olivier Thomas	An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology.	DELTA	2010	DBLP DOI BibTeX RDF	SRAM cell, Planar Double-Gate (DG), Fully Depleted SOI (FD-SOI), read and write tradeoffs, Ultra Low Voltage (ULV)
1	Paul Beckett, Heiko Rudolph	Run.	DELTA	2010	DBLP DOI BibTeX RDF	low power computer architecture, modeling, SOI, VHDL-AMS, double gate
1	Yannick Bornat, Matthieu Raoux, Youssef Boutaib, Fabrice Morin, Gilles Charpentier, Jochen Lang, Sylvie Renaud	Detection of Electrical Activity of Pancreatic Beta-cells Using Micro-electrode Arrays.	DELTA	2010	DBLP DOI BibTeX RDF	Micro-electrode arrays, Closed-loop insulin delivery, Biosensors
1	Stephen Paul van der Velden, Jugdutt Singh	Reconfigurable multivariable MEMS sensor array.	DELTA	2010	DBLP DOI BibTeX RDF	SHM, sensor, reconfigurable, UAV, array, MEMS
1	Dinh Sy Hien	Development of Quantum Device Simulator, NEMO-VN2.	DELTA	2010	DBLP DOI BibTeX RDF	quantum device simulator, phonon scattering, planar CNTFET, coaxial CNTFET
1	Julien Villemejane, Guillaume Mottet, Olivier Français, Bruno Le Pioufle, Jean-Pierre Lefevre, Marion Woytasik, Elisabeth Dufour-Gergam, Lluis M. Mir	Nanomanipulation of Living Cells on a Chip Using Electric Field: General Concepts and Microdevices.	DELTA	2010	DBLP DOI BibTeX RDF	electric field, electropermeabilization, dielectrophoresis, cell therapy, biochip
1	Chih-Sheng Hou, Jin-Fu Li, Che-Wei Chou	Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs.	DELTA	2010	DBLP DOI BibTeX RDF	test, test scheduling, repair, RAM, built-in self-repair
1	Thuong Le-Tien, Dien Vo-Ngoc, Lan Ngo-Hoang, Sungyoung Lee	Independent Component Analysis Applied to Watermark Extraction and its Implemented Model on FPGAs.	DELTA	2010	DBLP DOI BibTeX RDF	Psychoacoustic masking, Spartan-3, FPGA, ICA, Audio watermarking, LSB
1	Jian Wei Cheng, Melanie Po-Leen Ooi, Chris Chan, Ye Chow Kuang, Serge N. Demidenko	Evaluating the Performance of Different Classification Algorithms for Fabricated Semiconductor Wafers.	DELTA	2010	DBLP DOI BibTeX RDF	data mining, clusters, classification, recognition, feature, classifier, defects
1	Young Jin Park, Hong Jun Choi, Cheol Hong Kim, Jong-Myon Kim	Energy-aware Filter Cache Architecture for Multicore Processors.	DELTA	2010	DBLP DOI BibTeX RDF	energy consumption, multicore processor, instruction cache, victim cache, filter cache
1	Tomoo Inoue, Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara	A Fast Threshold Test Generation Algorithm Based on 5-Valued Logic.	DELTA	2010	DBLP DOI BibTeX RDF	acceptable faults, threshold test generation, error significance, 5-valued logic, PODEM
1		Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010	DELTA	2010	DBLP BibTeX RDF
1	Gustavo P. Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang Nam Nguyen	Low Frequency Test for RF MEMS Switches.	DELTA	2010	DBLP DOI BibTeX RDF	RF MEMS, low frequency test, switch, S-Parameters
1	Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine	Impact of Resistive-Bridging Defects in SRAM Core-Cell.	DELTA	2010	DBLP DOI BibTeX RDF	core-cell, resistive-bridging defects, SRAM
1	Dalila Salhi, Balwant Godara	A 75dB-gain Low-power, Low-noise Amplifier for Low-frequency Bio-signal Recording.	DELTA	2010	DBLP DOI BibTeX RDF	bio-amplifier, bio-signals, low frequency, low-power, Analog design, biomedical application, OTA, low-noise
1	Hoang-Anh Pham, Van-Hieu Bui, Anh-Vu Dinh-Duc	An Adaptive Huffman Decoding Algorithm for MP3 Decoder.	DELTA	2010	DBLP DOI BibTeX RDF	Huffman decoding, Single-side growing Huffman coding
1	Ka Lai Lau, Sylvain Léomant, Amine Bermak	A Hybrid CMOS DPS with Conditional Data Readout Scheme.	DELTA	2010	DBLP DOI BibTeX RDF	DPS, conditional readout, PWM
1	David Fitrio, Goran Panjkovic, Suhardi Tjoa, Andrew Berry	Modelling, Simulation and Design of Front End Electronics for Radiation Detectors.	DELTA	2010	DBLP BibTeX RDF
1	Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada	Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis.	DELTA	2010	DBLP DOI BibTeX RDF	static single assignment transformation, high-level synthesis, multiplexer
1	Thuong Le-Tien, Vu Phung-The	Routing and Tracking System for Mobile Vehicles in Large Area.	DELTA	2010	DBLP DOI BibTeX RDF	ARM Cortex M3, WMP100, YAS529, KXSC72050, GPS, GSM, Google Map
1	Zwikamu Dubani, Ben Soh, Chris Seeling	A Novel Design Framework for Business Process Modelling in Automotive Industry.	DELTA	2010	DBLP DOI BibTeX RDF	Business Process Modelling, BPEL
1	Fang Tang, Amine Bermak	Read-out Circuit Analysis for High-speed Low-noise VCO Based APS CMOS Image Sensor.	DELTA	2010	DBLP DOI BibTeX RDF	APS imager, high speed, CMOS image sensor, low noise
1	Chun Wei Lin, Sheng-Feng Lin, Chi Fu Wang	Wide Band Linear Voltage-to-Current Converter Design.	DELTA	2010	DBLP DOI BibTeX RDF	voltage to current converter (VIC), mobility degradation, transconductance, PSRR
1	Raghu Sunnadkal, Ben Soh, Hien Phan	A Four-Stage Design Approach Towards Securing a Vehicular Ad Hoc Networks Architecture.	DELTA	2010	DBLP DOI BibTeX RDF	Security, VANETs
1	A. Price, R. Rimington, Moi-Tin Chew, Serge N. Demidenko	Project-Based Learning in Robotics and Electronics in Undergraduate Engineering Program Setting.	DELTA	2010	DBLP DOI BibTeX RDF	electrical and electronic design, instrumentation and measurement, robotics competition, robotics, sensing
1	Adam Burdeniuk, Kiet N. To, Cheng-Chew Lim, Michael J. Liebelt	An Event-Assisted Sequencer to Accelerate Matrix Algorithms.	DELTA	2010	DBLP DOI BibTeX RDF	macroinstructions, event mechanism, sequencing, acceleration, Matrix
1	Linwei Niu	Leakage-Aware Scheduling for (m, k)-Firm Real-Time Systems.	DELTA	2010	DBLP BibTeX RDF
1	Janusz Sosnowski, Lukasz Tupaj	CPU Testability in Embedded Systems.	DELTA	2010	DBLP DOI BibTeX RDF	CPU testing, embedded systems, testability, software-based-self-test
1	Andreas Habegger, Andreas Stahel, Josef Goette, Marcel Jacomet	An Efficient Hardware Implementation for a Reciprocal Unit.	DELTA	2010	DBLP DOI BibTeX RDF	Arithmetic inversion, polynomial initialization, Nelder-Mead, reciprocal, hardware algorithm, Newton-Raphson
1	Chacko John Deepu, Xiaoyuan Xu, Xiaodan Zou, Libin Yao, Yong Lian	An ECG-on-Chip for Wearable Cardiac Monitoring Devices.	DELTA	2010	DBLP DOI BibTeX RDF	QRS detection, ECG-on-Chip, Low Power design, Wearable devices, Electrocardiography
1	Hiroshi Iwata, Satoshi Ohtake, Hideo Fujiwara	Enabling False Path Identification from RTL for Reducing Design and Test Futileness.	DELTA	2010	DBLP DOI BibTeX RDF	path mapping, false path, functional equivalence, high level testing
1	Trong Tu Bui, Tadashi Shibata	A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques.	DELTA	2010	DBLP DOI BibTeX RDF	time-domain techniques, ROF, Hamming distance, CAM, associative processor
1	Xuan-Thang Vu, Nguyen Anh Duc, Trinh Anh Vu	16-QAM Transmitter and Receiver Design Based on FPGA.	DELTA	2010	DBLP DOI BibTeX RDF	FGPA design, Carrier Synchronization, Symbol Recovery, 16-QAM Modulation
1	Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson	Estimating Error-probability and its Application for Optimizing Roll-back Recovery with Checkpointing.	DELTA	2010	DBLP DOI BibTeX RDF	roll-back recovery with checkpointing, error-probability estimation, optimization
1	Qingzheng Li, Guixuan Liang, Amine Bermak	A High-speed 32-bit Signed/Unsigned Pipelined Multiplier.	DELTA	2010	DBLP DOI BibTeX RDF	signed/unsigned multiplier, fast adder, Booth Encoding, Wallace Tree
1	Zeng Lertmanorat, Dominique M. Durand	Integrated Multiplexer for Nerve Electrodes.	DELTA	2010	DBLP DOI BibTeX RDF	Flat interface nerve electrode (FINE), functional electrical stimulation (FES), neural prostheses, selective stimulation
1	Donald G. Bailey, Christopher T. Johnston	Algorithm Transformation for FPGA Implementation.	DELTA	2010	DBLP DOI BibTeX RDF	FPGA, algorithm, architecture, compilation, hardware description languages, automated design
1	Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Arun Bhanu	Modeling of Probabilistic Ripple-Carry Adders.	DELTA	2010	DBLP DOI BibTeX RDF	ripple-carry adder, noies modeling, error propagation, Probabilistic computation
1	Ho Pham Huy Anh, Nguyen Huu Phuc	Inverse Neural MIMO NARX Model Identification of Nonlinear System Optimized with PSO.	DELTA	2010	DBLP DOI BibTeX RDF	pneumatic artificial muscle (PAM), 2-axes PAM robot arm, neural Inverse Dynamic MIMO NARX (Neural IDMN) model, modelling and identification, Particle Swarm optimisation (PSO) algorithm
1	Loren Nolan, Moi-Tin Chew, Serge N. Demidenko, Melanie Po-Leen Ooi	Virtual Instrumentation Based IC Parametric Tester for Engineering Education.	DELTA	2010	DBLP DOI BibTeX RDF	Electronic education, functional testing, data acquisition, virtual instrumentation, parametric testing
1	Melanie Po-Leen Ooi, Chris Chan, Wey Jean Tee, Ye Chow Kuang, Lindsay Kleeman, Serge N. Demidenko	Fast and Accurate Automatic Defect CLuster Extraction for Semiconductor Wafers.	DELTA	2010	DBLP DOI BibTeX RDF	data mining, clusters, segmentation, detection, defects
1	Huu Phu Bui, Le Khoa Dang, Anh Vinh Nguyen	Channel Auto-Correlation and Doppler Spectrum of MIMO Systems Using Circular Array.	DELTA	2010	DBLP DOI BibTeX RDF	Doppler spectrum, Channel correlation, Circular array, MIMO systems
1	Christopher T. Johnston, Donald G. Bailey, Paul J. Lyons	Notations for Multiphase Pipelines.	DELTA	2010	DBLP DOI BibTeX RDF	FPGA, Visual Languages, Hardware Description Languages
1	Diem Tran, Thi To, Thuan Huynh, Phuong Nguyen	Designing a Harware Accelerator for Face Recognition Using Vector Quantization and Principal Component Analysis as a Component of SoPC.	DELTA	2010	DBLP DOI BibTeX RDF	DSP using FPGA, Face Recognition, PCA, Vector Quantization, Hardware Accelerator, SoPC
1	Tsuyoshi Iwagaki, Mineo Kaneko	A Pseudo-Boolean Technique for Generating Compact Transition Tests with All-Output-Propagation Properties.	DELTA	2010	DBLP DOI BibTeX RDF	pseudo-Boolean model, all-output-propagation (AOP), test set reduction, transition fault
1	Andrew Gilman, Donald G. Bailey, Stephen Marsland	Least-squares Optimal Interpolation for Fast Image Super-resolution.	DELTA	2010	DBLP DOI BibTeX RDF	non-uniform interpolation, image reconstruction, least squares, super-resolution, image fusion, resampling
1	Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman	Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits.	DELTA	2010	DBLP DOI BibTeX RDF	extended fault classes, parallel exact critical path tracing, fault simulation, digital circuits, fault analysis
1	Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda	An Exact and Efficient Critical Path Tracing Algorithm.	DELTA	2010	DBLP DOI BibTeX RDF	Fault models, Fault Simulation, Critical Path Tracing
1	Yuan Cao, Fang Tang, Amine Bermak, Thinh Le	A Smart CMOS Image Sensor with On-chip Hot Pixel Correcting Readout Circuit for Biomedical Applications.	DELTA	2010	DBLP DOI BibTeX RDF	hot pixel correction, biomedical applications, CMOS image sensor
1	Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers.	DELTA	2010	DBLP DOI BibTeX RDF	DPA Robustness Evaluation, Design of secure devices
1	Arun Bhanu, Mark S. K. Lau, Keck Voon Ling, Vincent John Mooney III, Anshul Singh	A More Precise Model of Noise Based PCMOS Errors.	DELTA	2010	DBLP DOI BibTeX RDF
1	Cuong Pham-Quoc, Anh-Vu Dinh-Duc	Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA.	DELTA	2010	DBLP DOI BibTeX RDF
1	N. Khalid, Jugdutt Singh, Hai Phuong Le, Kriyang Shah, John Devlin, Z. Sauli	Very High Q, NEMS Inductor for 12GHz Wireless Sensor Applications.	DELTA	2010	DBLP DOI BibTeX RDF	High Q inductor, Micro/Nano Electro-Mechanical Systems (MEMS/NEMS), Silicon-on-sapphire
1	Soheil Ziabakhsh, Majid Ebrahimian	A 1.5-V, 2.4-GHz-Band CMOS Low-Noise Amplifier with Modified Input Matching Network.	DELTA	2010	DBLP BibTeX RDF
1	Oliver A. Pfänder, Reinhard Nopper, Hans-Jörg Pfleiderer, Shun Zhou, Amine Bermak	Configurable Blocks for Multi-precision Multiplication.	DELTA	2008	DBLP DOI BibTeX RDF	reconfigurable multipliers, embedded blocks, multi-precision, FPGA, multiplication
1	Raimund Ubar, Sergei Devadze, Maksim Jenihhin, Jaan Raik, Gert Jervan, Peeter Ellervee	Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance.	DELTA	2008	DBLP DOI BibTeX RDF	high-level decision diagrams, fault tolerance, fault simulation
1	Jian Ruan, Chung-Len Lee	A Fast Two-Stage Sample-and-Hold Amplifier for Pipelined ADC Application.	DELTA	2008	DBLP DOI BibTeX RDF	Sample-and-hold amplifier, Two-stage structure, Bootstrapped switch, Bottom-plate sampling, Pipelined ADC
1	Jianhua Feng, Guoliang Li	A Test Data Compression Method for System-on-a-Chip.	DELTA	2008	DBLP DOI BibTeX RDF	FDR code, Hybrid Run-length code, MFDR code, Test data compression
1	Jongsoo Yim, Gunbae Kim, Incheol Nam, Sangki Son, Jonghyoung Lim, Hwacheol Lee, Sangseok Kang, Byungheon Kwak, Jinseok Lee, Sungho Kang	A Prevenient Voltage Stress Test Method for High Density Memory.	DELTA	2008	DBLP DOI BibTeX RDF	voltage stress test, acceleration factor, burn-in test, junction temperature, constant voltage stress, voltage ramp stress, reliability
1	Ngok-Man Sze, Wing-Hung Ki, Chi-Ying Tsui	Threshold Voltage Start-up Boost Converter for Sub-mA Applications.	DELTA	2008	DBLP DOI BibTeX RDF	Boost converter, PFM, energy harvesting, DC-DC converter, start up
1	Hsin-Chou Chi, Chia-Ming Wu, Jun-Hui Lee	Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures.	DELTA	2008	DBLP DOI BibTeX RDF	network-on-chip architectures, scheduling, mapping, circuit-switched networks
1	M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre	AES-Based BIST: Self-Test, Test Pattern Generation and Signature Analysis.	DELTA	2008	DBLP DOI BibTeX RDF	AES core, BIST, secure systems
1	Nagarajan Venkateswaran, Karthik Chandrasekar 0001, Shrikanth Ganapathy	Design for Testability of Functional Cores in High Performance Node Architectures.	DELTA	2008	DBLP DOI BibTeX RDF	Integrated Memory and Logic, Memory-in-Logic Cells, Higher Level Functional Units, Performance Consistency, Reliabilty, Heterogenous Multi-Core
1	Taehoon Kim, Dongchul Kim, Jung-A Lee, Yungseon Eo	Compact Models for Signal Transient and Crosstalk Noise of Coupled RLC Interconnect Lines with Ramp Inputs.	DELTA	2008	DBLP DOI BibTeX RDF	inductance effect, signal transient, crosstalk, transmission lines
1	Yantu Mo, Suge Yue	An Efficient Design of Single Event Transients Tolerance for Logic Circuits.	DELTA	2008	DBLP DOI BibTeX RDF	integrated circuit, Single Event Upset, Single Event Transients
1	Hans G. Kerkhoff, Jarkko J. M. Huijts	Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications.	DELTA	2008	DBLP DOI BibTeX RDF	reconfigurable multi-processor-cores SoC, embedded system test, dependable SoCs, ATPG, Design-for-Test, self-repair
1	Ka Nang Leung, Yanqi Zheng	Compensation-Capacitor Free Pseudo Three-Stage Amplifier with Large Capacitive Loads.	DELTA	2008	DBLP DOI BibTeX RDF	frequency compensation, large capacitive load, Amplifier
1	Bei Cao, Liyi Xiao, Yongsheng Wang	A Low Power Deterministic Test Pattern Generator for BIST Based on Cellular Automata.	DELTA	2008	DBLP DOI BibTeX RDF
1	Bastien Giraud, Amara Amara	Read Stability and Write Ability Tradeoff for 6T SRAM Cells in Double-Gate CMOS.	DELTA	2008	DBLP DOI BibTeX RDF	SRAM cell, Double Gate (DG), Static Noise Margin (SNM), Write Margin (WM)
1	Laurent Gatet, Hélène Tap-Béteille, Daniel Roviras, Francis Gizard	Integrated CMOS Analog Neural Network Ability to Linearize the Distorted Characteristic of HPA Embedded in Satellites.	DELTA	2008	DBLP DOI BibTeX RDF	CMOS Analog Integrated Circuits, Nonlinear Distortion, Predistorsion, Multi-Layer Perceptrons, Neural Network Architecture
1	Moi-Tin Chew, Tatt-Huong Tham, Ye Chow Kuang	Electrical Power Monitoring System Using Thermochron Sensor and 1-Wire Communication Protocol.	DELTA	2008	DBLP DOI BibTeX RDF	electrical power monitoring, silicon themperature sensors, 1-wire data communication, datalogging
1	Hyun Min Choi, Chun Pyo Hong, Chang Hoon Kim	High Performance Elliptic Curve Cryptographic Processor Over GF(2^163).	DELTA	2008	DBLP DOI BibTeX RDF	Cryptographic Processor, VLSI, Finite Field, Elliptic Curve Cryptosystem, Gaussian Normal Basis
1	Christopher T. Johnston, Paul J. Lyons, Donald G. Bailey	A Visual Notation for Processor and Resource Scheduling.	DELTA	2008	DBLP DOI BibTeX RDF	Hardware design Languages, FPGA, Image Processing, Finite state machines, Visual Languages
1	Maxime Ambard, Bin Guo, Dominique Martinez, Amine Bermak	A Spiking Neural Network for Gas Discrimination Using a Tin Oxide Sensor Array.	DELTA	2008	DBLP DOI BibTeX RDF	Tin Oxide, Gas Sensor Array, Spike TimingComputation, Supervised Learning
1	Allen C. Cheng	A Software-to-Hardware Self-Mapping Technique to Enhance Program Throughput for Portable Multimedia Workloads.	DELTA	2008	DBLP DOI BibTeX RDF	Instruction Fusion, Mobile Embedded SoC, Portable Multimedia, Energy Efficiency
1	Chi-Hao Wu	Multi-Phase Charge Pump Generating Positive and Negative High Voltages for TFT-LCD Gate Driving.	DELTA	2008	DBLP DOI BibTeX RDF	regulated charge pump, TFT-LCD gate driver
1	Jiang Shi, Ricky Smith	Built-In Self-Test for Embedded Voltage Regulator.	DELTA	2008	DBLP DOI BibTeX RDF	voltage output, current loading, built-in, embedded, manufacturing, regulator, self-test
1	Marcel Jacomet, Josef Goette, Andreas Eicher	On Using Fingerprint-Sensors for PIN-Pad Entry.	DELTA	2008	DBLP DOI BibTeX RDF	fingerprint sensors, PIN-pad entry, security, smart-cards, exception handling, pressure sensing
1	Liang Shangquan, Gao Minglun, Yin Yongsheng, Deng Honghui	A 14-bit 320 MSPS Segmented Current-Steering D/A Converter for High-Speed Applications.	DELTA	2008	DBLP DOI BibTeX RDF	segmented current-steering, pseudorandom switching sequence, current switch driving circuit, unit current-cell
1	Zsófia Ruttkay, Ton J. Mouthaan	CreaTe: A New Programme to Attract Engineers as Design Artists.	DELTA	2008	DBLP DOI BibTeX RDF	creative technology, education, interaction design, industrial design
1	Tero Vallius, Juha Röning	Low Cost Arbitration Method for Arbitrarily Scalable Multiprocessor Systems.	DELTA	2008	DBLP DOI BibTeX RDF	Embedded Object Concept, Atomi, Embedded System, Scalable, Modular, Arbitration
1	Sang Gyun Kim, Woo Sik Kim, Seung Ho Ok, Byung In Moon	High-Speed Priority Queue Architecture for Multiple Out Links.	DELTA	2008	DBLP DOI BibTeX RDF	Quality of Service, Priority Queue
1	Jihai Cao, Ning Zhang, Lin Song	A Fast Algorithm for the Chirp Rate Estimation.	DELTA	2008	DBLP DOI BibTeX RDF	Chirp rate, CPT, asymptotic statistical result, MSE
1	Te-Jen Su, Chun-Hsiang Kuo, Wen-Pin Tsai, Cheng-Chih Hou	A Hybrid of Clonal Selection Algorithm and Frequency Sampling Method for Designing a 2-D FIR Filter.	DELTA	2008	DBLP DOI BibTeX RDF	Clonal Selection Algorithm (CSA), Finite-impulse response (FIR) filters, Frequency Sampling Method (FSM)
1	Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel	Improving Diagnosis Resolution without Physical Information.	DELTA	2008	DBLP DOI BibTeX RDF	Logic Diagnosis, Fault Modeling, Path Tracing
1	Wei-Yuan Chiu, Jiun-Wei Horng, Shyuan-Shenq Yang	High-Input Impedance Voltage-Mode Universal Biquadratic Filter with One input and Five Outputs Using DDCCs.	DELTA	2008	DBLP DOI BibTeX RDF	universal biquad, current conveyor, analogue circuit, active filter
1	Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert	A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM.	DELTA	2008	DBLP DOI BibTeX RDF	dummy bitline driver, self-timed memory, low power, SRAM, statistical design
1	Helene Schilke, Achim Rettberg, Florian Dittmann	Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs.	DELTA	2008	DBLP DOI BibTeX RDF	Model-based Design Flow, FPGA, Petri-net, Dynamic Reconfiguration
1	Jia Li, Qiang Xu, Yu Hu, Xiaowei Li	Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction.	DELTA	2008	DBLP DOI BibTeX RDF	NoC channel utilization, test wrapper, interleaved test scheduling
1	Isabell Jahnich, Ina Podolski, Achim Rettberg	Integrating Dynamic Load Balancing Strategies into the Car-Network.	DELTA	2008	DBLP DOI BibTeX RDF	Load Balancing, Middleware, Automotive Systems, Task Distribution
1	Philip Heng Wai Leong	Recent Trends in FPGA Architectures and Applications.	DELTA	2008	DBLP DOI BibTeX RDF	FPGA, applications

Publications at "DELTA"( http://dblp.L3S.de/Venues/DELTA )