Search results for "DFT"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Hans A. R. Manhaeve, Stefaan Kerckenaere	An On-Chip Detection Circuit for the Verification of IC Supply Connections. (PDF / PS)	DFT	2001	DBLP DOI BibTeX RDF	IC connections, connection verification, supply current measurements, on-chip monitor, reliability, DFT, CMOS, Scan, Boundary Scan, IP core, Current monitor
1	Mario Schölzel	Fine-Grained Software-Based Self-Repair of VLIW Processors.	DFT	2011	DBLP DOI BibTeX RDF
1	Muhammad A. Khan, Hans G. Kerkhoff	SoC Mixed-Signal Dependability Enhancement: A Strategy from Design to End-of-Life.	DFT	2011	DBLP DOI BibTeX RDF
1	Sven Eisenhardt, Anja Küster, Thomas Schweizer, Tommy Kuhn, Wolfgang Rosenstiel	Spatial and Temporal Data Path Remapping for Fault-Tolerant Coarse-Grained Reconfigurable Architectures.	DFT	2011	DBLP DOI BibTeX RDF
1	Rance Rodrigues, Israel Koren, Sandip Kundu	An Architecture to Enable Life Cycle Testing in CMPs.	DFT	2011	DBLP DOI BibTeX RDF
1	Dan Alexandrescu, Enrico Costenaro, Michael Nicolaidis	A Practical Approach to Single Event Transients Analysis for Highly Complex Designs.	DFT	2011	DBLP DOI BibTeX RDF
1	Zahra Lak, Nicola Nicolici	A New Algorithm for Post-Silicon Clock Measurement and Tuning.	DFT	2011	DBLP DOI BibTeX RDF
1	Masato Inoue, Haruhiko Kaneko	Deletion/Insertion/Reversal Error Correcting Codes for Bit-Patterned Media Recording.	DFT	2011	DBLP DOI BibTeX RDF
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	Reliable Hardware Architectures for the Third-Round SHA-3 Finalist Grostl Benchmarked on FPGA Platform.	DFT	2011	DBLP DOI BibTeX RDF
1	Masoud Zamani, Hossein Pedram, Fabrizio Lombardi	Templated-Based Asynchronous Design for Testable and Fail-Safe Operation.	DFT	2011	DBLP DOI BibTeX RDF
1	Hiroshi Kutami, Yusuke Fukushima, Masaru Fukushi, Ikuko Eguchi Yairi, Takeshi Hattori	Route-Aware Task Mapping Method for Fault-Tolerant 2D-Mesh Network-on-Chips.	DFT	2011	DBLP DOI BibTeX RDF
1	Amlan Ganguly, Partha Pratim Pande, Benjamin Belzer, Alireza Nojeh	A Unified Error Control Coding Scheme to Enhance the Reliability of a Hybrid Wireless Network-on-Chip.	DFT	2011	DBLP DOI BibTeX RDF
1	Geunho Cho, Fabrizio Lombardi	On the Delay Analysis of Defective CNTFETs with Undeposited CNTs.	DFT	2011	DBLP DOI BibTeX RDF
1	Mohammad Hossein Neishaburi, Zeljko Zilic	A Fault Tolerant Hierarchical Network on Chip Router Architecture.	DFT	2011	DBLP DOI BibTeX RDF
1	Rudrajit Datta, Nur A. Touba	X-Stacking - A Method for Reducing Control Data for Output Compaction.	DFT	2011	DBLP DOI BibTeX RDF
1	Mohammad Hossein Neishaburi, Zeljko Zilic	Debug Aware AXI-based Network Interface.	DFT	2011	DBLP DOI BibTeX RDF
1	Paolo Bernardi, Matteo Sonza Reorda, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch	On the Modeling of Gate Delay Faults by Means of Transition Delay Faults.	DFT	2011	DBLP DOI BibTeX RDF
1	Rodrigo P. Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies.	DFT	2011	DBLP DOI BibTeX RDF
1	Costas Argyrides, Ronaldo Rodrigues Ferreira, Carlos Arthur Lang Lisbôa, Luigi Carro	Decimal Hamming: A Software-Implemented Technique to Cope with Soft Errors.	DFT	2011	DBLP DOI BibTeX RDF
1	Jorge Luis Lagos-Benites, Michelangelo Grosso, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini, V. A. Avantaggiati	An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems.	DFT	2011	DBLP DOI BibTeX RDF
1	Seyab Khan, Nor Zaidi Haron, Said Hamdioui, Francky Catthoor	NBTI Monitoring and Design for Reliability in Nanoscale Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Vijay K. Jain, Glenn H. Chapman	Enhanced Defect Tolerance through Matrixed Deployment of Intelligent Sensors for the Smart Power Grid.	DFT	2011	DBLP DOI BibTeX RDF
1	Tobias Koal, Daniel Scheit, Mario Schölzel, Heinrich Theodor Vierhaus	On the Feasibility of Built-In Self Repair for Logic Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Ahmed Awad, Abdallatif S. Abu-Issa, Said Hamdioui	Reducing Test Power for Embedded Memories.	DFT	2011	DBLP DOI BibTeX RDF
1		2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011, Vancouver, BC, Canada, October 3-5, 2011	DFT	2011	DBLP BibTeX RDF
1	Uljana Reinsalu, Jaan Raik, Raimund Ubar, Peeter Ellervee	Fast RTL Fault Simulation Using Decision Diagrams and Bitwise Set Operations.	DFT	2011	DBLP DOI BibTeX RDF
1	N. M. Nayeem, J. E. Rice	Online Fault Detection in Reversible Logic.	DFT	2011	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura, Yusuke Akamine, Yusuke Matsunaga	A Soft Error Tolerance Estimation Method for Sequential Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra	Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition.	DFT	2011	DBLP DOI BibTeX RDF
1	Masashi Imai, Tomohiro Yoneda	Duplicated Execution Method for NoC-based Multiple Processor Systems with Restricted Private Memories.	DFT	2011	DBLP DOI BibTeX RDF
1	Paolo Roberto Grassi, Mariagiovanna Sami, Ettore Speziale, Michele Tartara	Analyzing the Sensitivity to Faults of Synchronization Primitives.	DFT	2011	DBLP DOI BibTeX RDF
1	Gabriel L. Nazar, Luigi Carro	An Area Effective Parity-Based Fault Detection Technique for FPGAs.	DFT	2011	DBLP DOI BibTeX RDF
1	J. Seol, Noh-Jin Park, K. M. George, Nohpill Park	Modeling Yield of Self-Healing Carbon Nanotubes/Silicon-Nanowire FET-based Nanoarray.	DFT	2011	DBLP DOI BibTeX RDF
1	Glenn H. Chapman, Bonnie L. Gray, Vijay K. Jain	Creating Defect Tolerance in Microfluidic Capacitive/Photonic Biosensors.	DFT	2011	DBLP DOI BibTeX RDF
1	Glenn H. Chapman, Jenny Leung, Ana Namburete, Israel Koren, Zahava Koren	Predicting Pixel Defect Rates Based on Image Sensor Parameters.	DFT	2011	DBLP DOI BibTeX RDF
1	Khalid Latif 0002, Amir-Mohammad Rahmani, Ethiopia Nigussie, Hannu Tenhunen, Tiberiu Seceleanu	A Novel Topology-Independent Router Architecture to Enhance Reliability and Performance of Networks-on-Chip.	DFT	2011	DBLP DOI BibTeX RDF
1	Mohammad Hossein Neishaburi, Zeljko Zilic	Hierarchical Embedded Logic Analyzer for Accurate Root-Cause Analysis.	DFT	2011	DBLP DOI BibTeX RDF
1	Joon-Sung Yang, Rudrajit Datta	Efficient Function Mapping in Nanoscale Crossbar Architecture.	DFT	2011	DBLP DOI BibTeX RDF
1	Daniel B. Limbrick, Suge Yue, William H. Robinson, Bharat L. Bhuva	Impact of Synthesis Constraints on Error Propagation Probability of Digital Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Nachiket Rajderkar, Marco Ottavi, Salvatore Pontarelli, Jie Han, Fabrizio Lombardi	On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS.	DFT	2011	DBLP DOI BibTeX RDF
1	Chandra Babu Dara, Spyros Tragoudas, Themistoklis Haniotakis	A Metric for Weight Assignment to Optimize the Performance of MOBILE Threshold Logic Gate.	DFT	2011	DBLP DOI BibTeX RDF
1	Xun Tang, Wu-Tung Cheng, Ruifeng Guo, Huaxing Tang, Sudhakar M. Reddy	Diagnosis of Multiple Faults Based on Fault-Tuple Equivalence Tree.	DFT	2011	DBLP DOI BibTeX RDF
1	Rudrajit Datta, Nur A. Touba	Generating Burst-Error Correcting Codes from Orthogonal Latin Square Codes - A Graph Theoretic Approach.	DFT	2011	DBLP DOI BibTeX RDF
1	E. MacLean, V. K. Jain	A Power Transmission Line Fault Distance Estimation VLSI Chip: Design and Defect Tolerance.	DFT	2011	DBLP DOI BibTeX RDF
1	Jinghang Liang, Jie Han, Fabrizio Lombardi	On the Reliable Performance of Sequential Adders for Soft Computing.	DFT	2011	DBLP DOI BibTeX RDF
1	Luca Amati, Cristiana Bolchini, Fabio Salice	Optimal Test Set Selection for Fault Diagnosis Improvement.	DFT	2011	DBLP DOI BibTeX RDF
1	Luigi Dilillo, Alberto Bosio, Miroslav Valka, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel	Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector.	DFT	2011	DBLP DOI BibTeX RDF
1	Hao Chen, Jie Han, Fabrizio Lombardi	A Transistor-Level Stochastic Approach for Evaluating the Reliability of Digital Nanometric CMOS Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Antonio Miele	An Application-Level Dependability Analysis Framework for Embedded Systems.	DFT	2011	DBLP DOI BibTeX RDF
1	Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella	Impact of Aging Phenomena on Soft Error Susceptibility.	DFT	2011	DBLP DOI BibTeX RDF
1	Md. Muwyid U. Khan, Pritish Narayanan, Priyamvada Vijayakumar, Israel Koren, C. Mani Krishna, Csaba Andras Moritz	Biased Voting for Improved Yield in Nanoscale Fabrics.	DFT	2011	DBLP DOI BibTeX RDF
1	Sreenivas Gangadhar, Spyros Tragoudas	A Probabilistic Approach to Diagnose SETs.	DFT	2011	DBLP DOI BibTeX RDF
1	Masoud Zamani, Mehdi Baradaran Tahoori	Online Missing/Repeated Gate Faults Detection in Reversible Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Chiara Sandionigi	A Reliability-Aware Partitioner for Multi-FPGA Platforms.	DFT	2011	DBLP DOI BibTeX RDF
1	Behnam Ghavami, Mohsen Raji, Hossein Pedram, Omid Naghshineh Arjmand	CNT-count Failure Characteristics of Carbon Nanotube FETs under Process Variations.	DFT	2011	DBLP DOI BibTeX RDF
1	Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro	Control-Flow Recovery Validation Using Microarchitectural Invariants.	DFT	2011	DBLP DOI BibTeX RDF
1	Shuai Wang	Characterizing System-Level Vulnerability for Instruction Caches against Soft Errors.	DFT	2011	DBLP DOI BibTeX RDF
1	Nivesh Rai, Hamidreza Hashempour, Yizi Xing, Bram Kruseman, Said Hamdioui	A Schematic-Based Extraction Methodology for Dislocation Defects in Analog/Mixed-Signal Devices.	DFT	2011	DBLP DOI BibTeX RDF
1	Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu	DfT Architecture for 3D-SICs with Multiple Towers.	European Test Symposium	2011	DBLP DOI BibTeX RDF	three-dimensional stacking, 3D-SIC, multi-tower, DfT, wrapper, design-for-test, TSV, through-silicon via
1	S. Saqib Khursheed, Sheng Yang, Bashir M. Al-Hashimi, Xiaoyu Huang, David Flynn	Improved DFT for Testing Power Switches.	European Test Symposium	2011	DBLP DOI BibTeX RDF	power switch, leakage power management, test time overhead, DFT, design for test, Sleep transistor
1	Xiaoqing Wang, Jintao Wang, Zhaocheng Wang, Zhixing Yang, Jian Song	Improved DFT-based channel estimation for OFDM systems over multipath channels.	IWCMC	2010	DBLP DOI BibTeX RDF	CE, DFT, wavelet decomposition, multipath channel
1	Jiancheng Zou, Xin Yang, Shaozhang Niu	A Novel Robust Watermarking Method for Certificates Based on DFT and Hough Transforms.	IIH-MSP	2010	DBLP DOI BibTeX RDF	certificate security, digital watermark, DFT, Hough transformations
1	Raghavendra Adiga, Gandhi Arpit, Virendra Singh, Kewal K. Saluja, Hideo Fujiwara, Adit D. Singh	On Minimization of Test Application Time for RAS.	VLSI Design	2010	DBLP DOI BibTeX RDF	Random Access Scan (RAS), DFT, Scan Design
1	Yiorgos Makris	Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors.	DFT	2009	DBLP DOI BibTeX RDF
1	Bo Fu, Paul Ampadu	Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects.	DFT	2009	DBLP DOI BibTeX RDF
1	Snehal Udar, Dimitri Kagaris	Minimizing Observation Points for Fault Location.	DFT	2009	DBLP DOI BibTeX RDF
1	Jianwei Dai, Lei Wang 0003	A Study of Side-Channel Effects in Reliability-Enhancing Techniques.	DFT	2009	DBLP DOI BibTeX RDF
1	Xiaojun Ma, Masoud Hashempour, Yong-Bin Kim, Fabrizio Lombardi	Errors in DNA Self-Assembly by Synthesized Tile Sets.	DFT	2009	DBLP DOI BibTeX RDF
1	Yusuke Fukushima, Masaru Fukushi, Susumu Horiguchi	Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels.	DFT	2009	DBLP DOI BibTeX RDF
1	Meng Zhang, Anita Lungu, Daniel J. Sorin	Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms.	DFT	2009	DBLP DOI BibTeX RDF
1	Mingjing Chen, Alex Orailoglu	Flip-Flop Hardening and Selection for Soft Error and Delay Fault Resilience.	DFT	2009	DBLP DOI BibTeX RDF
1	Irith Pomeranz, Sudhakar M. Reddy	On-chip Generation of the Second Primary Input Vectors of Broadside Tests.	DFT	2009	DBLP DOI BibTeX RDF
1	Takumi Hoshi, Kazuteru Namba, Hideo Ito	Testing of Switch Blocks in Three-Dimensional FPGA.	DFT	2009	DBLP DOI BibTeX RDF
1	Aaron Dingler, M. Jafar Siddiq, Michael T. Niemier, Xiaobo Sharon Hu, M. Tanvir Alam, Gary H. Bernstein, Wolfgang Porod	Controlling Magnetic Circuits: How Clock Structure Implementation will Impact Logical Correctness and Power.	DFT	2009	DBLP DOI BibTeX RDF
1	Nor Zaidi Haron, Said Hamdioui	Using RRNS Codes for Cluster Faults Tolerance in Hybrid Memories.	DFT	2009	DBLP DOI BibTeX RDF
1	Yehua Su, Wenjing Rao	Defect-Tolerant Logic Mapping on Nanoscale Crossbar Architectures and Yield Analysis.	DFT	2009	DBLP DOI BibTeX RDF
1	Nastaran Nemati, Amirhossein Simjour, Amirali Ghofrani, Zainalabedin Navabi	Optimizing Parametric BIST Using Bio-inspired Computing Algorithms.	DFT	2009	DBLP DOI BibTeX RDF
1	Hans-Joachim Wunderlich	Software-Based Hardware Fault Tolerance for Many-Core Architectures.	DFT	2009	DBLP DOI BibTeX RDF
1	Yueran Gao, Haibo Wang	A Reconfigurable ADC Circuit with Online-Testing Capability and Enhanced Fault Tolerance.	DFT	2009	DBLP DOI BibTeX RDF
1	Adit D. Singh	A Defect Tolerant and Performance Tunable Gate Architecture for End-of-Roadmap CMOS.	DFT	2009	DBLP DOI BibTeX RDF
1	Norman P. Jouppi	Resilience Challenges for Exascale Systems.	DFT	2009	DBLP DOI BibTeX RDF
1	Jenny Leung, Glenn H. Chapman, Israel Koren, Zahava Koren	Characterization of Gain Enhanced In-Field Defects in Digital Imagers.	DFT	2009	DBLP DOI BibTeX RDF
1	Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis	An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs.	DFT	2009	DBLP DOI BibTeX RDF
1	Zahra Mashreghian Arani, Masoud Hashempour, Fabrizio Lombardi	Coded DNA Self-Assembly for Error Detection/Location.	DFT	2009	DBLP DOI BibTeX RDF
1	Marcelo Lubaszewski	Can Functional Test Achieve Low-cost Full Coverage of NoC Faults?	DFT	2009	DBLP DOI BibTeX RDF
1	Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici	Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR).	DFT	2009	DBLP DOI BibTeX RDF
1	Nader Alawadhi, Ozgur Sinanoglu	Improving the Effectiveness of XOR-based Decompressors through Horizontal/Vertical Move of Stimulus Fragments.	DFT	2009	DBLP DOI BibTeX RDF
1	Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz	Improving the Detectability of Resistive Open Faults in Scan Cells.	DFT	2009	DBLP DOI BibTeX RDF
1	Giuseppe Di Guglielmo, Franco Fummi, Graziano Pravadelli, Mark Hampton, Florian Letombe	On the Functional Qualification of a Platform Model.	DFT	2009	DBLP DOI BibTeX RDF
1	Naveed A. Sherwani	Dreams, Plans, and Journey of Reaching Perfect Predictability and Reliability in ASICs.	DFT	2009	DBLP DOI BibTeX RDF
1	David Wolpert, Paul Ampadu	A Sensor to Detect Normal or Reverse Temperature Dependence in Nanoscale CMOS Circuits.	DFT	2009	DBLP DOI BibTeX RDF
1	George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, Foster F. Dai, Victor P. Nelson	Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems.	DFT	2009	DBLP DOI BibTeX RDF
1	Martin Omaña, Daniele Rossi, Cecilia Metra	Novel High Speed Robust Latch.	DFT	2009	DBLP DOI BibTeX RDF
1	Dimitris Gizopoulos, Susumu Horiguchi, Spyros Tragoudas, Mohammad Tehranipoor (eds.)	24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2009, 7-9 October 2009, Chicago, Illinois, USA	DFT	2009	DBLP BibTeX RDF
1	Hyoung-Kook Kim, Wen-Ben Jone, Laung-Terng Wang	Analysis of Resistive Open Defects in a Synchronizer.	DFT	2009	DBLP DOI BibTeX RDF
1	Syed Zafar Shazli, Mehdi Baradaran Tahoori	Transient Error Detection and Recovery in Processor Pipelines.	DFT	2009	DBLP DOI BibTeX RDF
1	Stelios Neophytou, Maria K. Michael, Kyriakos Christou	Generating Diverse Test Sets for Multiple Fault Detections Based on Fault Cone Partitioning.	DFT	2009	DBLP DOI BibTeX RDF
1	Souheib Baarir, Cécile Braunstein, Renaud Clavel, Emmanuelle Encrenaz, Jean-Michel Ilié, Régis Leveugle, Isabelle Mounier, Laurence Pierre, Denis Poitrenaud	Complementary Formal Approaches for Dependability Analysis.	DFT	2009	DBLP DOI BibTeX RDF
1	Muhammad Tauseef Rab, Asad Amin Bawa, Nur A. Touba	Improving Memory Repair by Selective Row Partitioning.	DFT	2009	DBLP DOI BibTeX RDF
1	Li-C. Wang	Data Learning Techniques for Functional/System Fmax Prediction.	DFT	2009	DBLP DOI BibTeX RDF