| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Michal Bryk, Lech Józwiak, Wieslaw Kuzmicz |
Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits.  |
DSD  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Maryam Kamali, Luigia Petre, Kaisa Sere, Masoud Daneshtalab |
Formal Modeling of Multicast Communication in 3D NoCs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Takieddine Majdoub, Sébastien LeNours, Olivier Pasquier, Fabienne Nouvel |
Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Bardine, Pierfrancesco Foglia, Francesco Panicucci, Marco Solinas, Julio Sahuquillo |
Energy Behaviour of NUCA Caches in CMPs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Fataneh Jafari, Mahdi Mosaffa, Siamak Mohammadi |
Designing Robust Asynchronous Circuits Based on FinFET Technology. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Awais, Ashwani Singh, Emmanuel Boutillon, Guido Masera |
A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Farid Lahrach, Abderrahim Doumar, Eric Châtelet |
Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nima Aghaee, Zebo Peng, Petru Eles |
Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Apostolos P. Fournaris, Odysseas G. Koufopavlou |
Efficient CRT RSA with SCA Countermeasures. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yohei Nakata, Yukihiro Takeuchi, Hiroshi Kawaguchi, Masahiko Yoshimoto |
A Process-Variation-Adaptive Network-on-Chip with Variable-Cycle Routers. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alfio Lombardo, Carla Panarello, Diego Reforgiato Recupero, Enrico Santagati, Giovanni Schembra |
A Module for Packet Hijacking in NetFPGA Platform. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard Ruzicka, Vaclav Simek |
Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alireza Rohani, Hans G. Kerkhoff |
A Technique for Accelerating Injection of Transient Faults in Complex SoCs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | George Provelengios, Nikolaos S. Voros, Paris Kitsos |
Low Power FPGA Implementations of JH and Fugue Hash Functions. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | A. N. Nagamani, S. Nishchai |
Quaternary High Performance Arithmetic Logic Unit Design. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Harmke de Groot, Maryam Ashouei, Julien Penders, Valer Pop, Maja Vidojkovic, Bert Gyselinckx, Refet Firat Yazicioglu |
Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa |
Binary-to-RNS Conversion Units for moduli {2^n ± 3}. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Straka, Jan Kastil, Zdenek Kotásek |
SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Xin, Jens-Peter Kaps, Kris Gaj |
A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Abbasinasab, Mehdi Mohammadi, Siamak Mohammadi, Svetlana N. Yanushkevich, Michael Smith |
Mutant Fault Injection in Functional Properties of a Model to Improve Coverage Metrics. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Simon Yuan, Li Hsien Yoong, Partha S. Roop |
Compiling Esterel for Multi-core Execution. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kris Gaj |
Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract). |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras |
An FPGA Implementation of the ZUC Stream Cipher. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lina Sawalha, Sonya Wolff, Monte P. Tull, Ronald D. Barnes |
Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen |
LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Maistri, Régis Leveugle |
10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Gerards, Christiaan Baaij, Jan Kuper, Matthijs Kooijman |
Higher-Order Abstraction in Hardware Descriptions with C?aSH. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Václav Dvorák, Petr Mikusek |
On the Cascade Implementation of Multiple-Output Sparse Logic Functions. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Rohit Datta, Gerhard Fettweis, Zsolt Kollar, Péter Horváth 0002 |
FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alice M. Tokarnia, Pedro C. F. Pepe, Leandro D. Pagotto |
Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tao Xie, Wolfgang Müller 0003, Florian Letombe |
HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Fahimeh Jafari, Shuo Li, Ahmed Hemani |
Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiri Balcarek, Petr Fiser, Jan Schmidt |
Techniques for SAT-Based Constrained Test Pattern Generation. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Choong Geun Lee, Vasily G. Moshnyaga, Koji Hashimoto |
Embedded System for Camera-Based TV Power Reduction. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Khalid Latif 0002, Amir-Mohammad Rahmani, Kameswar Rao Vaddina, Tiberiu Seceleanu, Pasi Liljeberg, Hannu Tenhunen |
Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu |
An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmet Aris, Siddika Berna Örs, Gökay Saldamli |
Architectures for Fast Modular Multiplication. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen |
Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Johannes Grinschgl, Armin Krieg, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid |
Modular Fault Injector for Multiple Fault Dependability and Security Evaluations. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Aqeel Wahlah, Kees Goossens |
PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Vejda, Johann Großschädl, Dan Page |
A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Karthik Chandrasekar 0001, Benny Akesson, Kees Goossens |
Improved Power Modeling of DDR SDRAMs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens |
Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehdi Dehbashi, André Sülflow, Görschwin Fey |
Automated Design Debugging in a Testbench-Based Verification Environment. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mansour Shafaei, Ahmad Patooghy, Seyed Ghassem Miremadi |
Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Junfeng Chu, Mohammed Benaissa |
A Novel Architecture of Implementing Error Detecting AES Using PRNS. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Michel Chabloz, Ahmed Hemani |
Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Anton Tsertov, Raimund Ubar, Artur Jutman, Sergei Devadze |
SoC and Board Modeling for Processor-Centric Board Testing. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | |
14th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2011, August 31 - September 2, 2011, Oulu, Finland |
DSD |
2011 |
DBLP BibTeX RDF |
|
| 1 | Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor |
An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido, Miguel Morales-Sandoval |
Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Evangelos Vassalos, Dimitris Bakalis, Haridimos T. Vergos |
Modulo 2^n+1 Arithmetic Units with Embedded Diminished-to-Normal Conversion. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Charly Bechara, Nicolas Ventroux, Daniel Etiemble |
Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Menno Lindwer |
The Future of Data-Parallel Embedded Systems (Abstract). |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Georgios Keramidas, Nikolaos Strikos, Stefanos Kaxiras |
Multicore Cache Simulations Using Heterogeneous Computing on General Purpose and Graphics Processors. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Danese, Francesco Leporati, Alessandra Majani, Giulia Matrone, Enrico Merlino |
A Wearable Intelligent System for the Health of Expectant Mom's and of Their Children. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sergey Ostroumov, Leonidas Tsiopoulos |
VHDL Code Generation from Formal Event-B Models. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Aqeel Wahlah, Kees Goossens |
A Non-Intrusive Online FPGA Test Scheme Using a Hardwired Network on Chip. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chetan Kumar V., Sai Phaneendra P., Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
A Unified Architecture for BCD and Binary Adder/Subtractor. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Weiyun Lu, Martin Radetzki |
Efficient Fault Simulation of SystemC Designs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Mueller-Gritschneder, Kun Lu, Ulf Schlichtmann |
Control-Flow-Driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Cor Meenderinck, Ben H. H. Juurlink |
Nexus: Hardware Support for Task-Based Programming. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Bai, Weidong Kuang |
Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Hossein Neishaburi, Zeljko Zilic |
On Failure Rate Assessment Using an Executable Model of the System. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Nelson, Orlando Moreira, Anca Mariana Molnos, Sander Stuijk, Ba Thang Nguyen, Kees Goossens |
Power Minimisation for Real-Time Dataflow Applications. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kameswar Rao Vaddina, Amir-Mohammad Rahmani, Khalid Latif 0002, Pasi Liljeberg, Juha Plosila |
Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaroslav Borecky, Martin Kohlik, Pavel Kubalík, Hana Kubatova |
Fault Models Usability Study for On-line Tested FPGA. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ran Manevich, Israel Cidon, Avinoam Kolodny, Isask'har Walter, Shmuel Wimer |
A Cost Effective Centralized Adaptive Routing for Networks-on-Chip. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yang Yang, Marc Geilen, Twan Basten, Sander Stuijk, Henk Corporaal |
Iteration-Based Trade-Off Analysis of Resource-Aware SDF. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Behzad Salami, Morteza Saheb Zamani, Ali Jahanian |
VMAP: A Variation Map-Aware Placement Algorithm for Leakage Power Reduction in FPGAs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França |
Hardware Reuse in Modern Application-Specific Processors and Accelerators. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos |
On the Design of Modulo 2^n+1 Multipliers. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Luka B. Daoud, M. El-Sayed Ragab, Victor Goulart |
Faster Processor Allocation Algorithms for Mesh-Connected CMPs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas Kohout |
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Martti Forsell, Ville Leppänen, Martti Penttonen |
Cost of Sparse Mesh Layouts Supporting Throughput Computing. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Leandro Fiorin, Laura Micconi, Mariagiovanna Sami |
Design of Fault Tolerant Network Interfaces for NoCs. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Plos, Martin Feldhofer |
Hardware Implementation of a Flexible Tag Platform for Passive RFID Devices. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Caglar Kalaycioglu, Ilker Hamzaoglu |
Dynamic Power Estimation for Motion Estimation Hardware. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Satoru Nakano, Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi |
A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Harmke de Groot |
Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care (Abstract). |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierre-Henri Horrein, Christine Hennebert, Frédéric Pétrot |
An Environment for (re)configuration and Execution Managenment of Flexible Radio Platforms. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Philip Hodgers, Keanhong Boey, Máire O'Neill |
Power Spectral Density Side Channel Attack Overlapping Window Method. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Isaza, Ernst Houtgast, Georgi Gaydadjiev |
HMMER Performance Model for Multicore Architectures. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Petr Stembera, Martin Novotný |
Breaking Hitag2 with Reconfigurable Hardware. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tolga Ovatman, Feza Buzluca |
Model Driven Cache-Aware Scheduling of Object Oriented Software for Chip Multiprocessors. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdul Naeem, Axel Jantsch, Xiaowen Chen, Zhonghai Lu |
Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Roland Dobai, Marcel Balaz |
SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jia Huang, Jan Olaf Blech, Andreas Raabe, Christian Buckl, Alois Knoll |
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tom Van Leeuwen 0002, Rene van Leuken |
A Scalable Distributed Asynchronous Control Network for High Level Synthesis of Digital Circuits. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pablo Ituero, Marisa López-Vallejo, M. A. S. Marcos, Carlos Gómez Osuna |
On-chip Monitoring: A Light-Weight Interconnection Network Approach. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Maghsoudloo, Hamid R. Zarandi, Saadat Pour-Mozafari, Navid Khoshavi |
Soft Error Detection Technique in Multi-threaded Architectures Using Control-Flow Monitoring. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Morteza Damavandpeyma, Sander Stuijk, Twan Basten, Marc Geilen, Henk Corporaal |
Hybrid Code-Data Prefetch-Aware Multiprocessor Task Graph Scheduling. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ghazaleh Nazarian, Christos Strydis, Georgi Gaydadjiev |
Compatibility Study of Compile-Time Optimizations for Power and Reliability. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michal Rumplík, Josef Strnadel |
On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mojtaba Valinataj |
Evaluation of Fault-Tolerant Routing Methods for NoC Architectures. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Guido Matrella, Davide Marani |
An Embedded Video Sensor for a Smart Traffic Light. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Barenghi, Guido Bertoni, Fabrizio De Santis, Filippo Melzani |
On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashkan Beyranvand Nejad, Anca Mariana Molnos, Kees G. W. Goossens |
A Unified Execution Model for Data-Driven Applications on a Composable MPSoC. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Farshad Firouzi, Amir Yazdanbakhsh, Hamed Dorosti, Sied Mehdi Fakhraie |
Dynamic Soft Error Hardening via Joint Body Biasing and Dynamic Voltage Scaling. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Vahid Khorasani, Bijan Vosoughi Vahdat, Mohammad Mortazavi |
Analyzing Area Penalty of 32-Bit Fault Tolerant ALU Using BCH Code. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
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