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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 9 occurrences of 9 keywords
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Results
Found 22 publication records. Showing 22 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Daniel Geist, Mark Ginzburg, Yoad Lustig, Ishai Rabinovitz, Ohad Shacham, Rachel Tzoref |
Supporting SAT based BMC on Finite Path Models.  |
Electr. Notes Theor. Comput. Sci.  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Baruch Schieber, Daniel Geist, Ayal Zaks |
Computing the minimum DNF representation of Boolean functions defined by intervals.  |
Discrete Applied Mathematics  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Anat Dahan, Daniel Geist, Leonid Gluhovsky, Dmitry Pidan, Gil Shapir, Yaron Wolfsthal, Lyes Benalycherif, Romain Kamdem, Younes Lahbib |
Combining System Level Modeling with Assertion Based Verification.  |
ISQED  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Shoham Ben-David, Cindy Eisner, Daniel Geist, Yaron Wolfsthal |
Model Checking at IBM.  |
Formal Methods in System Design  |
2003 |
DBLP DOI BibTeX RDF |
model checking, formal methods, formal verification |
| 1 | Daniel Geist, Enrico Tronci (eds.) |
Correct Hardware Design and Verification Methods, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings  |
CHARME  |
2003 |
DBLP BibTeX RDF |
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| 1 | Daniel Geist |
The PSL/Sugar Specification Language A Language for all Seasons.  |
CHARME  |
2003 |
DBLP DOI BibTeX RDF |
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| 1 | Tamir Heyman, Daniel Geist, Orna Grumberg, Assaf Schuster |
A Scalable Parallel Algorithm for Reachability Analysis of Very Large Circuits.  |
Formal Methods in System Design  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Sharon Barner, Daniel Geist, Anna Gringauze |
Symbolic Localization Reduction with Reconstruction Layering and Backtracking.  |
CAV  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Yael Abarbanel-Vinov, Neta Aizenbud-Reshef, Ilan Beer, Cindy Eisner, Daniel Geist, Tamir Heyman, Iris Reuveni, Eran Rippel, Irit Shitsevalov, Yaron Wolfsthal, Tali Yatzkar-Haham |
On the Effective Deployment of Functional Formal Verification.  |
Formal Methods in System Design  |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Julia Dushina, Mike Benjamin, Daniel Geist |
Semi-Formal Test Generation with Genevieve.  |
DAC  |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Julia Dushina, Mike Benjamin, Daniel Geist |
Semi-Formal Test Generation for a Block of Industrial DSP.  |
VTS  |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Tamir Heyman, Daniel Geist, Orna Grumberg, Assaf Schuster |
Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits.  |
CAV  |
2000 |
DBLP DOI BibTeX RDF |
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| 1 | Mike Benjamin, Daniel Geist, Alan Hartman, Gérard Mas, Ralph Smeets, Yaron Wolfsthal |
A Study in Coverage-Driven Test Generation.  |
DAC  |
1999 |
DBLP DOI BibTeX RDF |
transition coverage, test generation, formal models, functional verification |
| 1 | Daniel Geist, Giora Biran, Tamarah Arons, Michael Slavkin, Yvgeny Nustov, Monica Farkas, Karen Holtz, Andy Long, Dave King, Steve Barret |
A Methodology for the Verification of a ``System on Chip''.  |
DAC  |
1999 |
DBLP DOI BibTeX RDF |
verification, systems on chip, test and debugging |
| 1 | Sagi Katz, Orna Grumberg, Daniel Geist |
"Have I written enough Properties?" - A Method of Comparison between Specification and Implementation.  |
CHARME  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Ilan Beer, Shoham Ben-David, Cindy Eisner, Daniel Geist, Leonid Gluhovsky, Tamir Heyman, Avner Landver, P. Paanah, Yoav Rodeh, G. Ronin, Yaron Wolfsthal |
RuleBase: Model Checking at IBM.  |
CAV  |
1997 |
DBLP DOI BibTeX RDF |
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| 1 | Daniel Geist, Monica Farkas, Avner Landver, Yossi Lichtenstein, Shmuel Ur, Yaron Wolfsthal |
Coverage-Directed Test Generation Using Symbolic Techniques.  |
FMCAD  |
1996 |
DBLP DOI BibTeX RDF |
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| 1 | Ashok K. Chandra, Vijay S. Iyengar, D. Jameson, R. V. Jawalekar, Indira Nair, Barry K. Rosen, Michael P. Mullen, J. Yoon, R. Armoni, Daniel Geist, Yaron Wolfsthal |
AVPGEN-A test generator for architecture verification.  |
IEEE Trans. VLSI Syst.  |
1995 |
DBLP DOI BibTeX RDF |
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| 1 | Daniel Geist, Ilan Beer |
Efficient Model Checking by Automated Ordering of Transition Relation Partitions.  |
CAV  |
1994 |
DBLP DOI BibTeX RDF |
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| 1 | Ilan Beer, Shoham Ben-David, Daniel Geist, Raanan Gewirtzman, Michael Yoeli |
Methodology and System for Practical Formal Verification of Reactive Hardware.  |
CAV  |
1994 |
DBLP DOI BibTeX RDF |
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| 1 | Daniel Geist, Ervin Y. Rodin |
Adjacency of the 0-1 knapsack problem.  |
Computers & OR  |
1992 |
DBLP DOI BibTeX RDF |
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| 1 | Daniel Geist, Michael W. Vannier |
PC-based 3-D reconstruction of medical images.  |
Computers & Graphics  |
1989 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #22 of 22 (100 per page; Change: )
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