Search results for "David Blaauw"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester	A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS.	J. Solid-State Circuits	2012	DBLP DOI BibTeX RDF
1	Andrew DeOrio, David Fick, Valeria Bertacco, Dennis Sylvester, David Blaauw, Jin Hu, Gregory K. Chen	A Reliable Routing Architecture and Algorithm for NoCs.	IEEE Trans. on CAD of Integrated Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Mingoo Seok, Scott Hanson, David Blaauw, Dennis Sylvester	Sleep Mode Analysis and Optimization With Minimal-Sized Power Gating Switch for Ultra-Low ${V}_{\rm dd}$ Operation.	IEEE Trans. VLSI Syst.	2012	DBLP DOI BibTeX RDF
1	David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David Blaauw	Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald G. Dreslinski, Dennis Sylvester, Trevor N. Mudge, David Blaauw	A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David Blaauw, Dennis Sylvester	Bubble Razor: An architecture-independent approach to timing-error detection and correction.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Dongmin Yoon, Dennis Sylvester, David Blaauw	A 5.58nW 32.768kHz DLL-assisted XO for real-time clocks in wireless sensing applications.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Yoonmyung Lee, Gyouho Kim, Suyoung Bang, Yejoong Kim, Inhee Lee, Prabal Dutta, Dennis Sylvester, David Blaauw	A modular 1mm3 die-stacked sensing platform with optical communication and multi-modal energy harvesting.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Pat Pannuto, Yoonmyung Lee, Benjamin P. Kempke, Dennis Sylvester, David Blaauw, Prabal Dutta	Ultra-constrained sensor platform interfacing.	IPSN	2012	DBLP DOI BibTeX RDF
1	Hassan Ghaed, Gregory K. Chen, David Blaauw, Dennis Sylvester	Analysis and measurement of the stability of dual-resonator oscillators.	RWS	2012	DBLP DOI BibTeX RDF
1	David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David Blaauw	Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation".	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David Blaauw	A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Jae-sun Seo, David Blaauw, Dennis Sylvester	Crosstalk-Aware PWM-Based On-Chip Links With Self-Calibration in 65 nm CMOS.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Cheng Zhuo, Kaviraj Chopra, Dennis Sylvester, David Blaauw	Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Vineeth Veetil, Kaviraj Chopra, David Blaauw, Dennis Sylvester	Fast Statistical Static Timing Analysis Using Smart Monte Carlo Techniques.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Himanshu Kaul, Ram Krishnamurthy, Dennis Sylvester, David Blaauw	A Robust Edge Encoding Technique for Energy-Efficient Multi-Cycle Interconnect.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Prashant Singh, Eric Karl, Dennis Sylvester, David Blaauw	Dynamic NBTI Management Using a 45 nm Multi-Degradation Sensor.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Michael Wieckowski, Gregory K. Chen, Daeyeon Kim, David Blaauw, Dennis Sylvester	A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers.	ISQED	2011	DBLP DOI BibTeX RDF
1	Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester	Energy-optimized high performance FFT processor.	ICASSP	2011	DBLP DOI BibTeX RDF
1	Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David Blaauw, Dennis Sylvester	Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs.	ISLPED	2011	DBLP BibTeX RDF
1	Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester	Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design.	DAC	2011	DBLP DOI BibTeX RDF
1	Gregory K. Chen, Hassan Ghaed, Razi-Ul Haque, Michael Wieckowski, Yejoong Kim, Gyouho Kim, David Fick, Daeyeon Kim, Mingoo Seok, Kensall Wise, David Blaauw, Dennis Sylvester	A cubic-millimeter energy-autonomous wireless intraocular pressure monitor.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Yoonmyung Lee, Bharan Giridhar, Zhiyoong Foo, Dennis Sylvester, David Blaauw	A 660pW multi-stage temperature-compensated timer for ultra-low-power wireless sensor node synchronization.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester	A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David Blaauw, Trevor N. Mudge	Low power interconnects for SIMD computers.	DATE	2011	DBLP BibTeX RDF
1	Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David Blaauw, Dennis Sylvester, H. Naeimi, S. Sandhu	A confidence-driven model for error-resilient computing.	DATE	2011	DBLP DOI BibTeX RDF
1	Gregory K. Chen, Michael Wieckowski, Daeyeon Kim, David Blaauw, Dennis Sylvester	A dense 45nm half-differential SRAM with lower minimum operating voltage.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Daeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David Blaauw, Dennis Sylvester	A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Scott Hanson, Zhiyoong Foo, David Blaauw, Dennis Sylvester	A 0.5 V Sub-Microwatt CMOS Image Sensor With Pulse-Width Modulation Read-Out.	J. Solid-State Circuits	2010	DBLP DOI BibTeX RDF
1	Carlos Tokunaga, David Blaauw	Securing Encryption Systems With a Switched Capacitor Current Equalizer.	J. Solid-State Circuits	2010	DBLP DOI BibTeX RDF
1	Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal	Mechanical Stress Aware Optimization for Leakage Power Reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Ravikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester	Victim Alignment in Crosstalk-Aware Timing Analysis.	IEEE Trans. on CAD of Integrated Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Gregory K. Chen, Dennis Sylvester, David Blaauw, Trevor N. Mudge	Yield-Driven Near-Threshold SRAM Design.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Mingoo Seok, David Blaauw, Dennis Sylvester	Clock network design for ultra-low power applications.	ISLPED	2010	DBLP DOI BibTeX RDF	ultra-low power, robust design, clock network
1	Prashant Singh, Eric Karl, Dennis Sylvester, David Blaauw	Dynamic NBTI management using a 45nm multi-degradation sensor.	CICC	2010	DBLP DOI BibTeX RDF
1	Vivek Joshi, Michael Wieckowski, Gregory K. Chen, David Blaauw, Dennis Sylvester	Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS.	CICC	2010	DBLP DOI BibTeX RDF
1	Yoonmyung Lee, Gregory K. Chen, Scott Hanson, Dennis Sylvester, David Blaauw	Ultra-low power circuit techniques for a new class of sub-mm3 sensor nodes.	CICC	2010	DBLP DOI BibTeX RDF
1	Vivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David Blaauw	Closed-form modeling of layout-dependent mechanical stress.	DAC	2010	DBLP DOI BibTeX RDF	mechanical stress, modeling, mobility
1	Vineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David Blaauw	Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization.	DAC	2010	DBLP DOI BibTeX RDF	graphics processing units, Monte Carlo, statistical timing
1	Jae-sun Seo, Ron Ho, Jon Lexau, Michael Dayringer, Dennis Sylvester, David Blaauw	High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Gregory K. Chen, Matthew Fojtik, Daeyeon Kim, David Fick, Junsun Park, Mingoo Seok, Mao-Ter Chen, Zhiyoong Foo, Dennis Sylvester, David Blaauw	Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells.	ISSCC	2010	DBLP DOI BibTeX RDF
1	David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David Blaauw	A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Prashant Singh, Zhiyoong Foo, Michael Wieckowski, Scott Hanson, Matthew Fojtik, David Blaauw, Dennis Sylvester	Early detection of oxide breakdown through in situ degradation sensing.	ISSCC	2010	DBLP DOI BibTeX RDF
1	David Fick, Nurrachman Liu, Zhiyoong Foo, Matthew Fojtik, Jae-sun Seo, Dennis Sylvester, David Blaauw	In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Vivek Joshi, Kanak Agarwal, Dennis Sylvester, David Blaauw	Analyzing electrical effects of RTA-driven local anneal temperature variation.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Cheng Zhuo, Yung-Hsu Chang, Dennis Sylvester, David Blaauw	Design time body bias selection for parametric yield improvement.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Cheng Zhuo, Dennis Sylvester, David Blaauw	Process variation and temperature-aware reliability management.	DATE	2010	DBLP BibTeX RDF
1	Michael Wieckowski, Dennis Sylvester, David Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken	A black box method for stability analysis of arbitrary SRAM cell structures.	DATE	2010	DBLP BibTeX RDF
1	Mingoo Seok, Scott Hanson, Michael Wieckowski, Gregory K. Chen, Yu-Shiang Lin, David Blaauw, Dennis Sylvester	Circuit design advances to enable ubiquitous sensing environments.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Zhiyoong Foo, D. Devecsery, T. Schmid, N. Clark, R. Frank, M. Ghaed, Y. Kuo, I. Lee, Y. Park, Z. Renner, N. Slottow, V. Vinay, Michael Wieckowski, Dongmin Yoon, C. Schmidt, David Blaauw, P. Chen, Prabal Dutta	A case for custom silicon in enabling low-cost information technology for developing regions.	ACM DEV	2010	DBLP DOI BibTeX RDF
1	Vivek Joshi, Kanak Agarwal, David Blaauw, Dennis Sylvester	Analysis and optimization of SRAM robustness for double patterning lithography.	ICCAD	2010	DBLP DOI BibTeX RDF
1	Cheng Zhuo, Kanak Agarwal, David Blaauw, Dennis Sylvester	Active learning framework for post-silicon variation extraction and test cost reduction.	ICCAD	2010	DBLP DOI BibTeX RDF
1	Vineeth Veetil, Dennis Sylvester, David Blaauw	A lower bound computation method for evaluation of statistical design techniques.	ICCAD	2010	DBLP DOI BibTeX RDF
1	Rajeev R. Rao, Vivek Joshi, David Blaauw, Dennis Sylvester	Circuit optimization techniques to mitigate the effects of soft errors in combinational logic.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF
1	Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd M. Austin, Dennis Sylvester, David Blaauw	Energy-Efficient Subthreshold Processor Design.	IEEE Trans. VLSI Syst.	2009	DBLP DOI BibTeX RDF
1	Prashant Singh, Cheng Zhuo, Eric Karl, David Blaauw, Dennis Sylvester	Sensor-Driven Reliability and Wearout Management.	IEEE Design & Test of Computers	2009	DBLP DOI BibTeX RDF
1	Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor N. Mudge	Reconfigurable Multicore Server Processors for Low Power Operation.	SAMOS	2009	DBLP DOI BibTeX RDF	Server Architectures, Low Power, Reconfigurable
1	Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw	Low power circuit design based on heterojunction tunneling transistors (HETTs).	ISLPED	2009	DBLP DOI BibTeX RDF	SRAM design, low power applications, tunneling transistor
1	Mingoo Seok, Gyouho Kim, Dennis Sylvester, David Blaauw	A 0.5V 2.2pW 2-transistor voltage reference.	CICC	2009	DBLP DOI BibTeX RDF
1	Yu-Shiang Lin, Dennis Sylvester, David Blaauw	Near-field communication using phase-locking and pulse signaling for millimeter-scale systems.	CICC	2009	DBLP DOI BibTeX RDF
1	Ravikishore Gandikota, Li Ding 0002, Peivand Tehrani, David Blaauw	Worst-case aggressor-victim alignment with current-source driver models.	DAC	2009	DBLP DOI BibTeX RDF	CSM, delay noise, crosstalk
1	Vineeth Veetil, Dennis Sylvester, David Blaauw, Saumil Shah, Steffen Rochel	Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence.	DAC	2009	DBLP DOI BibTeX RDF	statistical leakage, Monte Carlo, variance reduction
1	David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David Blaauw, Dennis Sylvester	Vicis: a reliable network for unreliable silicon.	DAC	2009	DBLP DOI BibTeX RDF	hard faults, fault tolerance, built-in-self-test, Network-on-Chip, reconfiguration, torus, N-modular redundancy
1	Shidhartha Das, David Blaauw, David M. Bull, Krisztián Flautner, Rob Aitken	Addressing design margins through error-tolerant circuits.	DAC	2009	DBLP DOI BibTeX RDF
1	Carlos Tokunaga, David Blaauw	Secure AES engine with a local switched-capacitor current equalizer.	ISSCC	2009	DBLP DOI BibTeX RDF
1	David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David Blaauw	A highly resilient routing algorithm for fault-tolerant NoCs.	DATE	2009	DBLP BibTeX RDF
1	Shidhartha Das, David Blaauw	Adaptive Design for Nanometer Technology.	ISCAS	2009	DBLP DOI BibTeX RDF
1	Cheng Zhuo, David Blaauw, Dennis Sylvester	Post-fabrication measurement-driven oxide breakdown reliability prediction and management.	ICCAD	2009	DBLP BibTeX RDF
1	Ravikishore Gandikota, David Blaauw, Dennis Sylvester	Interconnect performance corners considering crosstalk noise.	ICCD	2009	DBLP DOI BibTeX RDF
1	Yu-Shiang Lin, Dennis Sylvester, David T. Blaauw	A 150pW program-and-hold timer for ultra-low-power sensor platforms.	ISSCC	2009	DBLP DOI BibTeX RDF
1	Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David Blaauw	A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	David Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer	Statistical Timing Analysis: From Basic Principles to State of the Art.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Prashant Singh, Jae-sun Seo, David Blaauw, Dennis Sylvester	Self-Timed Regenerators for High-Speed and Low-Power On-Chip Global Interconnect.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Eric Karl, David Blaauw, Dennis Sylvester, Trevor N. Mudge	Multi-Mechanism Reliability Modeling and Management in Dynamic Systems.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Eric Karl, Dennis Sylvester, David Blaauw	Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures.	ISQED	2008	DBLP DOI BibTeX RDF
1	Vineeth Veetil, Dennis Sylvester, David Blaauw	Fast and Accurate Waveform Analysis with Current Source Models.	ISQED	2008	DBLP DOI BibTeX RDF	weibull, bicubic spline, current source model
1	Mingoo Seok, Dennis Sylvester, David Blaauw	Optimal technology selection for minimizing energy and variability in low voltage applications.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Cheng Zhuo, David Blaauw, Dennis Sylvester	Variation-aware gate sizing and clustering for post-silicon optimized circuits.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal	Stress aware layout optimization.	ISPD	2008	DBLP DOI BibTeX RDF
1	Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David Blaauw, Dennis Sylvester, Krisztián Flautner	Reconfigurable energy efficient near threshold cache architectures.	MICRO	2008	DBLP DOI BibTeX RDF
1	Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal	Leakage power reduction using stress-enhanced layouts.	DAC	2008	DBLP DOI BibTeX RDF	performance, mobility, layout, leakage, stress
1	Ravikishore Gandikota, David Blaauw, Dennis Sylvester	Modeling crosstalk in statistical static timing analysis.	DAC	2008	DBLP DOI BibTeX RDF	delay noise, crosstalk, SSTA
1	Vineeth Veetil, Dennis Sylvester, David Blaauw	Efficient Monte Carlo based incremental statistical timing analysis.	DAC	2008	DBLP DOI BibTeX RDF	Monte Carlo, variance reduction, statistical timing
1	Brian Cline, Kaviraj Chopra, David Blaauw, Andres Torres, Savithri Sundareswaran	Transistor-Specific Delay Modeling for SSTA.	DATE	2008	DBLP DOI BibTeX RDF
1	Yu-Shiang Lin, Scott Hanson, Fabio Albano, Carlos Tokunaga, Razi-Ul Haque, Kensall Wise, Ann Marie Sastry, David Blaauw, Dennis Sylvester	Low-voltage circuit design for widespread sensing applications.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Kaviraj Chopra, Cheng Zhuo, David Blaauw, Dennis Sylvester	A statistical approach for full-chip gate-oxide reliability analysis.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Brian Cline, Vivek Joshi, Dennis Sylvester, David Blaauw	STEEL: a technique for stress-enhanced standard cell library design.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw	On the decreasing significance of large standard cells in technology mapping.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw	Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Aseem Agarwal, Kaviraj Chopra, David Blaauw	Statistical Timing Based Optimization using Gate Sizing	CoRR	2007	DBLP BibTeX RDF
1	Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin	DVS for On-Chip Bus Designs Based on Timing Error Correction	CoRR	2007	DBLP BibTeX RDF
1	Sanjay Pant, Eli Chiprout, David Blaauw	Power Grid Physics and Implications for CAD.	IEEE Design & Test of Computers	2007	DBLP DOI BibTeX RDF	R, L(di/dt), decap, locality, resonance, power supply networks
1	Mini Nanua, David Blaauw	Investigating Crosstalk in Sub-Threshold Circuits.	ISQED	2007	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Prashant Singh, Dennis Sylvester, David Blaauw	Self-Time Regenerators for High-Speed and Low-Power Interconnect.	ISQED	2007	DBLP DOI BibTeX RDF
1	Mini Nanua, David Blaauw	Crosstalk Waveform Modeling Using Wave Fitting.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Dennis Sylvester, David Blaauw, Himanshu Kaul, Ram Krishnamurthy	A robust edge encoding technique for energy-efficient multi-cycle interconnect.	ISLPED	2007	DBLP DOI BibTeX RDF	multi-cycle interconnect, interconnect, encoding, repeaters
1	Bo Zhai, Ronald G. Dreslinski, David Blaauw, Trevor N. Mudge, Dennis Sylvester	Energy efficient near-threshold chip multi-processing.	ISLPED	2007	DBLP DOI BibTeX RDF	near-threshold, energy efficient, CMP, subthreshold
1	Ronald G. Dreslinski, Bo Zhai, Trevor N. Mudge, David Blaauw, Dennis Sylvester	An Energy Efficient Parallel Architecture Using Near Threshold Operation.	PACT	2007	DBLP DOI BibTeX RDF
1	Scott Hanson, Mingoo Seok, Dennis Sylvester, David Blaauw	Nanometer Device Scaling in Subthreshold Circuits.	DAC	2007	DBLP DOI BibTeX RDF
1	Mingoo Seok, Scott Hanson, Dennis Sylvester, David Blaauw	Analysis and Optimization of Sleep Modes in Subthreshold Circuit Design.	DAC	2007	DBLP DOI BibTeX RDF

Publications of David Blaauw David T. Blaauw ( http://dblp.L3S.de/Authors/David_Blaauw )