| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Kun Yuan, Bei Yu, David Z. Pan |
E-Beam Lithography Stencil Planning and Optimization With Overlapped Characters.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Samuel I. Ward, Myung-Chul Kim, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Earl E. Swartzlander Jr., David Z. Pan |
Keep it straight: teaching placement how to better handle designs with datapaths. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jhih-Rong Gao, David Z. Pan |
Flexible self-aligned double patterning aware detailed routing with prescribed layout planning. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Vijay Janapa Reddi, David Z. Pan, Sani R. Nassif, Keith A. Bowman |
Robust and resilient designs from the bottom-up: Technology, CAD, circuit, and system issues. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang |
Design for manufacturability and reliability for TSV-based 3D ICs. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Duo Ding, Bei Yu, David Z. Pan |
GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Duo Ding, Bei Yu, Joydeep Ghosh, David Z. Pan |
EPIC: Efficient prediction of IC manufacturing hotspots with a unified meta-classification formulation. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Rajaram, David Z. Pan |
Robust Chip-Level Clock Tree Synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Duo Ding, J. Andres Torres, David Z. Pan |
High Performance Lithography Hotspot Detection With Successively Refined Pattern Identifications and Machine Learning. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooyoung Jang, David Z. Pan |
Application-Aware NoC Design for Efficient SDRAM Access. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun Yuan, David Z. Pan |
E-beam lithography stencil planning and optimization with overlapped characters. |
ISPD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan |
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Kyu Lim |
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongchan Ban, Kevin Lucas, David Z. Pan |
Flexible 2D layout decomposition framework for spacer-type double pattering lithography. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Chakraborty, David Z. Pan |
Controlling NBTI degradation during static burn-in testing. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jae-Seok Yang, Jiwoo Pak, Xin Zhao, Sung Kyu Lim, David Z. Pan |
Robust Clock Tree Synthesis with timing yield optimization for 3D-ICs. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli |
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chul-Hong Park, David Z. Pan, Kevin Lucas |
Exploration of VLSI CAD researches for early design rule evaluation. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Duo Ding, Andres J. Torres, Fedor G. Pikus, David Z. Pan |
High performance lithographic hotspot detection using hierarchically refined machine learning. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooyoung Jang, Ou He, Jae-Seok Yang, David Z. Pan |
Chemical-mechanical polishing aware application-specific 3D NoC design. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Hung Lin, Yongchan Ban, David Z. Pan, Yih-Lang Li |
Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancing. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan |
Layout decomposition for triple patterning lithography. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim |
Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Moongon Jung, Xi Liu, Suresh K. Sitaraman, David Z. Pan, Sung Kyu Lim |
Full-chip through-silicon-via interfacial crack analysis and optimization for 3D IC. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan, Minsik Cho, Kun Yuan |
Manufacturability Aware Routing in Nanometer VLSI. |
Foundations and Trends in Electronic Design Automation |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooyoung Jang, David Z. Pan |
An SDRAM-Aware Router for Networks-on-Chip. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun Yuan, Jae-Seok Yang, David Z. Pan |
Double Patterning Layout Decomposition for Simultaneous Conflict and Stitch Minimization. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Rajaram, David Z. Pan |
MeshWorks: A Comprehensive Framework for Optimized Clock Mesh Network Synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Chakraborty, Sean X. Shi, David Z. Pan |
Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Chakraborty, David Z. Pan |
PASAP: power aware structured ASIC placement. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
structured ASICS, low power, placement, regular fabrics |
| 1 | Ashutosh Chakraborty, David Z. Pan |
Skew management of NBTI impacted gated clock trees. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
clock skew, clock gating, NBTI |
| 1 | Yongchan Ban, Savithri Sundareswaran, David Z. Pan |
Total sensitivity based dfm optimization of standard library cells. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, sensitivity, DFM, lithography |
| 1 | Wooyoung Jang, David Z. Pan |
Application-aware NoC design for efficient SDRAM access. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
QoS, memory, flow control, router, NoC, on-chip communication |
| 1 | Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan |
TSV stress aware timing analysis with applications to 3D-IC layout optimization. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
mobility variation, timing analysis, stress, TSV, 3DIC |
| 1 | Yongchan Ban, David Z. Pan |
Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, DFM, variation, lithography, contact |
| 1 | Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, David Z. Pan |
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooyoung Jang, David Z. Pan |
A3MAP: architecture-aware analytic mapping for networks-on-chip. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun Yuan, David Z. Pan |
WISDOM: Wire spreading enhanced decomposition of masks in Double Patterning Lithography. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, David Z. Pan, Ruchir Puri |
Novel binary linear programming for high performance clock mesh synthesis. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Krit Athikulwongse, Ashutosh Chakraborty, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim |
Stress-driven 3D-IC placement with TSV keep-out zone and regularity study. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan |
BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
VLSI, physical design, congestion, integer linear programming, global routing, routability, layer assignment |
| 1 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: Efficient Lithography Aware Detailed Routing Algorithm With Compact and Macro Post-OPC Printability Prediction. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Chakraborty, David Z. Pan |
On stress aware active area sizing, gate sizing, and repeater insertion. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
performance, buffer, sizing, stress, repeater |
| 1 | Kun Yuan, Jae-Seok Yang, David Z. Pan |
Double patterning layout decomposition for simultaneous conflict and stitch minimization. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
double patterning lithography, layout decomposition, integer linear programming |
| 1 | Duo Ding, David Z. Pan |
OIL: a nano-photonics optical interconnect library for a new photonic networks-on-chip architecture. |
SLIP |
2009 |
DBLP DOI BibTeX RDF |
photonic networks-on-chip, low power, computer aided design, high performance |
| 1 | Kun Yuan, Katrina Lu, David Z. Pan |
Double patterning lithography friendly detailed routing with redundant via consideration. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
double patterning, redundant via, detailed routing |
| 1 | Wooyoung Jang, David Z. Pan |
An SDRAM-aware router for Networks-on-Chip. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
Networks-on-Chip, memory, flow control, router |
| 1 | Ashutosh Chakraborty, Anurag Kumar, David Z. Pan |
RegPlace: a high quality open-source placement framework for structured ASICs. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
global placement, regular ASIC, FPGA, placement, legalization, structured ASIC |
| 1 | Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, David Z. Pan |
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
low power nanophotonic integration, optical routing, integer linear programming |
| 1 | Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram, David Z. Pan |
Analysis and optimization of NBTI induced clock skew in gated clock trees. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan |
Track Routing and Optimization for Yield. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, David Z. Pan |
A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan, Gi-Joon Nam |
Guest Editorial. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen Chang |
Metal-Density-Driven Placement for CMP Variation and Routability. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick H. Madden, David Z. Pan |
Guest Editorial. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, David Z. Pan |
Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan |
Synergistic modeling and optimization for nanometer IC design/manufacturing integration. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
design for manufacturing |
| 1 | David Z. Pan |
Lithography friendly routing: from construct-by-correction to correct-by-construction. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
routing |
| 1 | Minsik Cho, David Z. Pan |
A high-performance droplet router for digital microfluidic biochips. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
routing, synthesis, microfluidics, biochip |
| 1 | David Z. Pan, Gi-Joon Nam (eds.) |
Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008 |
ISPD |
2008 |
DBLP BibTeX RDF |
|
| 1 | Tung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen Chang |
Metal-density driven placement for cmp variation and routability. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
VLSI, placement, physical design, manufacturability |
| 1 | Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pan |
An integrated nonlinear placement framework with congestion and porosity aware buffer planning. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
VLSI, placement, physical design, buffer |
| 1 | Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan |
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
routing, VLSI, manufacturability, OPC, lithography |
| 1 | Anand Rajaram, David Z. Pan |
Robust chip-level clock tree synthesis for SOC designs. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
chip-level CTS, physical design, clock network |
| 1 | Tao Luo, David Newmark, David Z. Pan |
Total power optimization combining placement, sizing and multi-Vt through slack distribution management. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan, Minsik Cho |
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Rajaram, David Z. Pan |
MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tao Luo, David Z. Pan |
DPlace2.0: A stable and efficient analytical placement based on diffusion. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Yu, Xi Chen, David Z. Pan, Andrew D. Ellington |
Synthetic Biology Design and Analysis: A Case Study of Frequency Entrained Biological Clock. |
BIBM |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Chakraborty, Sean X. Shi, David Z. Pan |
Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sean X. Shi, Anand Ramalingam, Daifeng Wang, David Z. Pan |
Latch Modeling for Statistical Timing Analysis. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooyoung Jang, Duo Ding, David Z. Pan |
A voltage-frequency island aware energy optimization framework for networks-on-chip. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tao Luo, David A. Papa, Zhuo Li, Chin-Ngai Sze, Charles J. Alpert, David Z. Pan |
Pyramids: an efficient computational geometry-based approach for timing-driven placement. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, Yongchan Ban, David Z. Pan |
Double patterning technology friendly detailed routing. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jae-Seok Yang, David Z. Pan |
Overlay aware interconnect and timing variation modeling for double patterning technology. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Z. Pan, Stephen Renwick, Vivek Singh, Judy Huckabay |
Nanolithography and CAD challenges for 32nm/22nm and beyond. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramalingam, Anirudh Devgan, David Z. Pan |
Wakeup Scheduling in MTCMOS Circuits Using Successive Relaxation to Minimize Ground Bounce. |
J. Low Power Electronics |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam |
Diffusion-Based Placement Migration With Application on Legalization. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, David Z. Pan |
BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Chen, David Z. Pan |
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Patrick H. Madden, David Z. Pan (eds.) |
Proceedings of the 2007 International Symposium on Physical Design, ISPD 2007, Austin, Texas, USA, March 18-21, 2007 |
ISPD |
2007 |
DBLP BibTeX RDF |
|
| 1 | Gi-Joon Nam, Mehmet Can Yildiz, David Z. Pan, Patrick H. Madden |
ISPD placement contest updates and ISPD 2007 global routing contest. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramalingam, Giri Devarayanadurg, David Z. Pan |
Accurate power grid analysis with behavioral transistor network modeling. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
RC model of transistor, behavioral modeling of switch, power grid |
| 1 | Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan |
TROY: Track Router with Yield-driven Wire Planning. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Michael Orshansky, David Z. Pan |
Accurate Waveform Modeling using Singular Value Decomposition with Applications to Timing Analysis. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia |
Hippocrates: First-Do-No-Harm Detailed Placement. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
synthesis optimizations, Hippocrates, first-do-no-harm detailed placement, pin-based timing constraint, electrical constraints, reduced wire-length |
| 1 | Peng Yu, David Z. Pan |
TIP-OPC: a new topological invariant paradigm for pixel based optical proximity correction. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan |
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Yu, David Z. Pan |
A novel intensity based optical proximity correction algorithm with speedup in lithography simulation. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Havlir, David Z. Pan |
Simultaneous Statistical Delay and Slew Optimization for Interconnect Pipelines. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Rajaram, David Z. Pan |
Fast Incremental Link Insertion in Clock Networks for Skew Variability Reduction. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramalingam, David Z. Pan, Frank Liu, Sani R. Nassif |
Accurate Thermal Analysis Considering Nonlinear Thermal Conductivity. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Rajaram, David Z. Pan |
Variation tolerant buffered clock network synthesis with cross links. |
ISPD |
2006 |
DBLP DOI BibTeX RDF |
non-tree clocks, physical design, VLSI CAD, clock network |
| 1 | Minsik Cho, David Z. Pan |
BoxRouter: a new global router based on box expansion and progressive ILP. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
VLSI, congestion, global routing |
| 1 | Peng Yu, Sean X. Shi, David Z. Pan |
Process variation aware OPC with variational lithography modeling. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
lithography modeling, process variation, OPC |
| 1 | Tao Luo, David Newmark, David Z. Pan |
A new LP based incremental timing driven placement for high performance designs. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, Hongjoong Shin, David Z. Pan |
Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan |
Robust analytical gate delay modeling for low voltage circuits. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sean X. Shi, David Z. Pan |
Wire sizing with scattering effect for nanoscale interconnection. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsik Cho, David Z. Pan |
PEAKASO: Peak-Temperature Aware Scan-Vector Optimization. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
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