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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 16 occurrences of 15 keywords
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Results
Found 18 publication records. Showing 18 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 3 | Sreejit Chakravarty |
A sampling technique for diagnostic fault simulation.  |
VTS  |
1996 |
DBLP DOI BibTeX RDF |
diagnostic fault simulation, diagnostic test sets, EC/IC Sampling, indistinguishable classes, approximation algorithm, fault diagnosis, integrated circuit testing, circuit analysis computing, set theory, equivalence classes, equivalence classes, sampling technique |
| 2 | Irith Pomeranz, Sudhakar M. Reddy, Srikanth Venkataraman |
z-Diagnosis: A Framework for Diagnostic Fault Simulation and Test Generation Utilizing Subsets of Outputs.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2007 |
DBLP DOI BibTeX RDF |
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| 2 | Bharath Seshadri, Xiaoming Yu, Srikanth Venkataraman |
Accelerating Diagnostic Fault Simulation Using Z-diagnosis and Concurrent Equivalence Identification.  |
VTS  |
2006 |
DBLP DOI BibTeX RDF |
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| 2 | Xiaoming Yu, Enamul Amyeen, Srikanth Venkataraman, Ruifeng Guo, Irith Pomeranz |
Concurrent Execution of Diagnostic Fault Simulation and Equivalence Identification During Diagnostic Test Generation.  |
VTS  |
2003 |
DBLP DOI BibTeX RDF |
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| 2 | Srikanth Venkataraman, W. Kent Fuchs, Janak H. Patel |
Diagnostic Simulation of Sequential Circuits Using Fault Sampling.  |
VLSI Design  |
1998 |
DBLP DOI BibTeX RDF |
Diagnostic fault simulation, Sampling, Diagnosis, Sequential circuits |
| 2 | Shung-Chih Chen, Jer-Min Jou |
Diagnostic fault simulation for synchronous sequential circuits.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
1997 |
DBLP DOI BibTeX RDF |
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| 1 | Min Li, Michael S. Hsiao |
High-Performance Diagnostic Fault Simulation on GPUs.  |
European Test Symposium  |
2011 |
DBLP DOI BibTeX RDF |
diagnostic faut simulation, general-purpose computing on graphics processing unit (GPGPU), parallel algorithm, compute unified device architecture (CUDA) |
| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Equivalence, Dominance, and Similarity Relations between Fault Pairs and a Fault Pair Collapsing Process for Fault Diagnosis.  |
IEEE Trans. Computers  |
2010 |
DBLP DOI BibTeX RDF |
Diagnostic fault simulation, diagnostic test generation, fault diagnosis, fault collapsing, fault equivalence, fault dominance |
| 1 | Hiroshi Takahashi, Yoshinobu Higami, Toru Kikkawa, Takashi Aikyo, Yuzo Takamatsu, Hiroyuki Yotsuyanagi, Masaki Hashizume |
Test Generation and Diagnostic Test Generation for Open Faults with Considering Adjacent Lines.  |
DFT  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Irith Pomeranz, Sudhakar M. Reddy |
Equivalence and Dominance Relations Between Fault Pairs and Their Use in Fault Pair Collapsing for Fault Diagnosis.  |
VLSI Design  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri |
Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis.  |
DATE  |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Jue Wu, Gary S. Greenstein, Elizabeth M. Rudnick |
A Fault List Reduction Approach for Efficient Bridge Fault Diagnosis.  |
DATE  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Brian Chess, Tracy Larrabee |
Creating small fault dictionaries [logic circuit fault diagnosis].  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Shung-Chih Chen, Jer-Min Jou |
Serial diagnostic fault simulation for synchronous sequential circuits.  |
Integration  |
1997 |
DBLP DOI BibTeX RDF |
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| 1 | Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel |
Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists.  |
DAC  |
1995 |
DBLP DOI BibTeX RDF |
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| 1 | Jer-Min Jou, Shung-Chih Chen |
Distributed Diagnostic Fault Simulation for Synchronous Sequential Circuits by Dynamic Fault Partitioning.  |
ISCAS  |
1995 |
DBLP BibTeX RDF |
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| 1 | Jer-Min Jou, Shung-Chih Chen |
A fast and memory-efficient diagnostic fault simulation for sequential circuits.  |
ICCAD  |
1994 |
DBLP DOI BibTeX RDF |
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| 1 | Elizabeth M. Rudnick, W. Kent Fuchs, Janak H. Patel |
Diagnostic Fault Simulation of Sequential Circuits.  |
ITC  |
1992 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #18 of 18 (100 per page; Change: )
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