Search results for "Dimitrios Soudris"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris	A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric.	TRETS	2012	DBLP DOI BibTeX RDF
1	Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris	Efficient Memory Allocations on a Many-Core Accelerator.	ARCS Workshops	2012	DBLP BibTeX RDF
1	Lazaros Papadopoulos, Alexandros Bartzas, Dimitrios Soudris	Run-Time Dynamic Data Type Transformations.	ARCS Workshops	2012	DBLP BibTeX RDF
1	Iraklis Anagnostopoulos, Alexandros Bartzas, Georgios Kathareios, Dimitrios Soudris	A divide and conquer based distributed run-time mapping methodology for many-core platforms.	DATE	2012	DBLP BibTeX RDF
1	Nikolas Kroupis, Dimitrios Soudris	FILESPPA: Fast Instruction Level Embedded System Power and Performance Analyzer.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Rodopoulos, Dimitrios Soudris	On Supporting Rapid Thermal Analysis.	Computer Architecture Letters	2011	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	A Tabu-Based Partitioning and Layer Assignment Algorithm for 3-D FPGAs.	Embedded Systems Letters	2011	DBLP DOI BibTeX RDF
1	Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios Soudris, Axel Jantsch	Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations.	Embedded Systems Letters	2011	DBLP DOI BibTeX RDF
1	Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi	High Performance and Area Efficient Flexible DSP Datapath Synthesis.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris	Thermal optimization for micro-architectures through selective block replication.	ICSAMOS	2011	DBLP DOI BibTeX RDF
1	Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris	A Framework for Architecture-Level Exploration of Communication Intensive Applications onto 3-D FPGAs.	FPL	2011	DBLP DOI BibTeX RDF
1	Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris	A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs.	FPL	2011	DBLP DOI BibTeX RDF
1	Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris	A Framework for Architecture-Level Exploration of 3-D FPGA Platforms.	PATMOS	2011	DBLP DOI BibTeX RDF
1	Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor	Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios.	SiPS	2011	DBLP DOI BibTeX RDF
1	Michael Hübner, P. Figuli, Romuald Girardey, Dimitrios Soudris, K. Siozios, Jürgen Becker	A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
1	Kostas Siozios, Antonis Papanikolaou, Dimitrios Soudris	CAD tools for designing 3D integrated systems.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Dimitris Bekiaris, George Economakos, Efstathios Sotiriou-Xanthopoulos, Dimitrios Soudris	Low-Power Reconfigurable Component Utilization in a High-Level Synthesis Flow.	ReConFig	2011	DBLP DOI BibTeX RDF
1	Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos, Dimitrios Soudris	Design and experimentation with low-power morphable multipliers.	ICECS	2011	DBLP DOI BibTeX RDF
1	Dionysios Diamantopoulos, Panagiotis Galiatsatos, A. Karachalios, George Lentaris, D. Reisis, Dimitrios Soudris	Configurable baseband digital transceiver for Gbps wireless 60 GHz communications.	ICECS	2011	DBLP DOI BibTeX RDF
1	Filippos Toufexis, Antonis Papanikolaou, Dimitrios Soudris, George I. Stamoulis, Sotiris Bantas	Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm.	ICECS	2011	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dionysios Diamantopoulos, Ioannis Kostavelis, Evangelos Boukas, Lazaros Nalpantidis, Dimitrios Soudris, Antonios Gasteratos, Marcos Avilés, Iraklis Anagnostopoulos	SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications.	ReCoSoC	2011	DBLP DOI BibTeX RDF
1	Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout	Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.	ReCoSoC	2011	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis	A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation for FPGA Architectures.	Journal of Circuits, Systems, and Computers	2010	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Miguel Peón Quirós, Christophe Poucet, Christos Baloukas, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias	Software metadata: Systematic characterization of the memory behaviour of dynamic applications.	Journal of Systems and Software	2010	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	A Methodology for Alleviating the Performance Degradation of TMR Solutions.	Embedded Systems Letters	2010	DBLP DOI BibTeX RDF
1	Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Z. Pekmestzi	Custom multi-threaded Dynamic Memory Management for Multiprocessor System-on-Chip platforms.	ICSAMOS	2010	DBLP DOI BibTeX RDF
1	Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris	A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos	High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout	2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Iasonas Filippopoulos, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, George Economakos	Systematic Exploration of Energy-Efficient Application-Specific Network-on-Chip Architectures.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll, Daniel Cordes, Robert Pyka, Arindam Mallik, Stylianos Mamagkakis, François Capman, Séverin Collet, Nikolaos Mitas, Dimitrios Kritharidis	Mapping Embedded Applications on MPSoCs: The MNEMEE Approach.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos	Towards Supporting Fault-Tolerance in FPGAs.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos	Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin	Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Z. Pekmestzi	A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework.	PATMOS	2010	DBLP DOI BibTeX RDF
1	Nikolaos Zompakis, Vasileios Tsoutsouras, Alexandros Bartzas, Dimitrios Soudris, Georgios Pavlos	Dynamic Frequency Scaling for MPSoCs based on Chaotic Workload Analysis.	ARCS Workshops	2010	DBLP BibTeX RDF
1	Alienor Richard, Dragomir Milojevic, Frédéric Robert, Alexandros Bartzas, Antonis Papanikolaou, Kostas Siozios, Dimitrios Soudris	Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's.	ARCS Workshops	2010	DBLP BibTeX RDF
1	Christos Baloukas, Lazaros Papadopoulos, Robert Pyka, Dimitrios Soudris, Peter Marwedel	An automatic framework for dynamic data structures optimization in C.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
1	Yiannis Iosifidis, Arindam Mallik, Stylianos Mamagkakis, Eddy de Greef, Alexandros Bartzas, Dimitrios Soudris, Francky Catthoor	A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms.	DAC	2010	DBLP DOI BibTeX RDF	embedded systems, MPSoC, memory optimization
1	Arindam Mallik, Peter Marwedel, Dimitrios Soudris, Sander Stuijk	MNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs.	CASES	2010	DBLP DOI BibTeX RDF
1	George Economakos, Sotirios Xydis, Ioannis Koutras, Dimitrios Soudris	Construction of dual mode components for reconfiguration aware high-level synthesis.	DATE	2010	DBLP BibTeX RDF
1	Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos	Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos	A Framework for Enabling Fault Tolerance in Reconfigurable Architectures.	ARC	2010	DBLP DOI BibTeX RDF
1	Ioannis Koutras, Antonis Papanikolaou, George Economakos, Dimitrios Soudris	BIT-width exploration over 3D architectures using high-level synthesis.	ICECS	2010	DBLP DOI BibTeX RDF
1	Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris	Multiple Vdd on 3D NoC architectures.	ICECS	2010	DBLP DOI BibTeX RDF
1	Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris	NAROUTO: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAS.	ICECS	2010	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Lazaros Papadopoulos, Dimitrios Soudris	A system-level design methodology for application-specific networks-on-chip.	J. Embedded Computing	2009	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias	Direct memory access usage optimization in network applications for reduced memory latency and energy consumption.	J. Embedded Computing	2009	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	Designing a novel high-performance FPGA architecture for data intensive applications.	J. Real-Time Image Processing	2009	DBLP DOI BibTeX RDF
1	Christos Baloukas, José Luis Risco-Martín, David Atienza, Christophe Poucet, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris, José Ignacio Hidalgo, Francky Catthoor, Juan Lanchares	Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems.	Journal of Systems and Software	2009	DBLP DOI BibTeX RDF
1	Nikolas Kroupis, Dimitrios Soudris	High-level estimation methodology for designing the instruction cache memory of programmable embedded platforms.	IET Computers & Digital Techniques	2009	DBLP DOI BibTeX RDF
1	Marios Kesoulis, C. Koukourlis, J. N. Lygouras, Dimitrios Soudris, John N. Sahalos	Design and implementation of a DDS-based multi-carrier GMSK modulator.	Int. J. Communication Systems	2009	DBLP DOI BibTeX RDF
1	Nikolaos Zompakis, Martin Trautmann, Alexandros Bartzas, Stylianos Mamagkakis, Dimitrios Soudris, Liesbet Van der Perre, Francky Catthoor	Multi-granularity NoC Simulation Framework for Early Phase Exploration of SDR Hardware Platforms.	PATMOS	2009	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Christos Baloukas, Dimitrios Soudris, Konstantinos Potamianos, Fragkiskos Ieromnimon, Nikolaos S. Voros	Dynamic Data Type Optimization and Memory Assignment Methodologies.	PATMOS	2009	DBLP DOI BibTeX RDF
1	Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris	Application-Specific Temperature Reduction Systematic Methodology for 2D and 3D Networks-on-Chip.	PATMOS	2009	DBLP DOI BibTeX RDF
1	Nikolas Kroupis, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Dimitrios Soudris	Compilation Technique for Loop Overhead Minimization.	DSD	2009	DBLP DOI BibTeX RDF
1	Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris	A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs.	DATE	2009	DBLP BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis	Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays.	J. Low Power Electronics	2008	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs.	J. Low Power Electronics	2008	DBLP DOI BibTeX RDF
1	Lazaros Papadopoulos, Christos Baloukas, Dimitrios Soudris	Exploration methodology of dynamic data structures in multimedia and network applications for embedded platforms.	Journal of Systems Architecture - Embedded Systems Design	2008	DBLP DOI BibTeX RDF
1	Kostas Siozios, Alexandros Bartzas, Dimitrios Soudris	Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology.	Int. J. Reconfig. Comp.	2008	DBLP DOI BibTeX RDF
1	Minas Dasygenis, K. Mitroglou, Dimitrios Soudris, Adonios Thanailakis	A Full-Adder-Based Methodology for the Design of Scaling Operation in Residue Number System.	IEEE Trans. on Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	An Efficient Approach for Managing Power Consumption Hotspots Distribution on 3D FPGAs.	PATMOS	2008	DBLP DOI BibTeX RDF	P? CAD Algorithm, FPGA, Management, Power, 3D
1	Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias	Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis	Automated framework for partitioning DSP applications in hybrid reconfigurable platforms.	Microprocessors and Microsystems	2007	DBLP DOI BibTeX RDF
1	Stylianos Mamagkakis, Alexandros Bartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement.	Journal of Systems Architecture	2007	DBLP DOI BibTeX RDF
1	Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck	CoRR	2007	DBLP BibTeX RDF
1	Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis	A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms	CoRR	2007	DBLP BibTeX RDF
1	Laurence Tianruo Yang, José G. Delgado-Frias, Yiming Li, Mohammed Y. Niamat, Dimitrios Soudris, Srinivasa Vemuru	Preface.	Integration	2007	DBLP DOI BibTeX RDF
1	Konstantinos Tatas, George Koutroumpezis, Dimitrios Soudris, Adonios Thanailakis	Architecture design of a coarse-grain reconfigurable multiply-accumulate unit for data-intensive applications.	Integration	2007	DBLP DOI BibTeX RDF
1	Lazaros Papadopoulos, Christos Baloukas, Nikolaos Zompakis, Dimitrios Soudris	Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems.	ICSAMOS	2007	DBLP DOI BibTeX RDF
1	Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris	Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support.	FPL	2007	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Lazaros Papadopoulos, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris	Application - specific NoC platform design based on System Level Optimization.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Miguel Peón Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris	Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Lazaros Papadopoulos, Dimitrios Soudris	System-Level Application-Specific NoC Design for Network and Multimedia Applications.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Nikolas Kroupis, Dimitrios Soudris	Design Methodology and Software Tool for Estimation of Multi-level Instruction Cache Memory Miss Rate.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Lazaros Papadopoulos, Christos Baloukas, Dimitrios Soudris, Konstantinos Potamianos, Nikolaos S. Voros	Data Structure Exploration of Dynamic Applications.	PACT	2007	DBLP DOI BibTeX RDF
1	Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris	A software-supported methodology for designing high-performance 3D FPGA architectures.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	Nikolaos Zompakis, Lazaros Papadopoulos, Georgios Ch. Sirakoulis, Dimitrios Soudris	Implementing cellular automata modeled applications on network-on-chip platforms.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	David Atienza, Christos Baloukas, Lazaros Papadopoulos, Christophe Poucet, Stylianos Mamagkakis, José Ignacio Hidalgo, Francky Catthoor, Dimitrios Soudris, Juan Lanchares	Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation.	SCOPES	2007	DBLP DOI BibTeX RDF
1	Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor	Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns.	DATE	2007	DBLP DOI BibTeX RDF
1	Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis	Designing Heterogeneous FPGAs with Multiple SBs.	ARC	2007	DBLP DOI BibTeX RDF
1	Christos Baloukas, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris	Component Based Library Implementation of Abstract Data Types for Resource Management Customization of Embedded Systems.	ESTImedia	2007	DBLP DOI BibTeX RDF
1	Athanasios Kakarountas, Nikolaos D. Zervas, George Theodoridis, Haralambos Michail, Dimitrios Soudris	Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers.	J. Low Power Electronics	2006	DBLP DOI BibTeX RDF
1	Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance.	Computer Communications	2006	DBLP DOI BibTeX RDF
1	David Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor	Systematic dynamic memory management design methodology for reduced memory footprint.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	Multimedia embedded systems, custom dynamic memory management, reduced memory footprint, operating systems, memory management
1	Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Adonios Thanailakis	A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis	Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	Programmable platforms, estimation methodology, instruction complexity, memory transfers
1	David Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris	Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems.	Integration	2006	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris	Wire Segment Length and Switch Box Co-Optimization for FPGA Architectures.	FPL	2006	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis	Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources.	PATMOS	2006	DBLP DOI BibTeX RDF
1	Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris	Energy-efficient dynamic memory allocators at the middleware level of embedded systems.	EMSOFT	2006	DBLP DOI BibTeX RDF	heap data, low-energy consumption, embedded systems, middleware, dynamic memory allocation
1	Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis	Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
1	Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis	Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications.	IPDPS	2006	DBLP DOI BibTeX RDF
1	K. Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis	A novel methodology for designing high-performance and low-energy FPGA routing architecture.	FPGA	2006	DBLP DOI BibTeX RDF
1	Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias	Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems.	DATE	2006	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Stylianos Mamagkakis, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis	Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications.	DATE	2006	DBLP DOI BibTeX RDF
1	Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, David Atienza, Francky Catthoor, Dimitrios Soudris, M. Mendias	Systematic design flow for dynamic data management in visual texture decoder of MPEG-4.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis	A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications.	ISCAS	2006	DBLP DOI BibTeX RDF

Publications of Dimitrios Soudris D. J. Soudris ( http://dblp.L3S.de/Authors/Dimitrios_Soudris )