| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Leonid Domnitser, Aamer Jaleel, Jason Loew, Nael B. Abu-Ghazaleh, Dmitry Ponomarev |
Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks.  |
TACO  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jared Schmitz, Jason Loew, Jesse Elwell, Dmitry Ponomarev, Nael B. Abu-Ghazaleh |
TPM-SIM: a framework for performance evaluation of trusted platform modules. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazaleh, Tameesh Suri |
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors. |
Conf. Computing Frontiers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden |
Mathematical limits of parallel computation for embedded systems. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry Evtyushkin, Peter Panfilov, Dmitry Ponomarev |
CacheVisor: A Toolset for Visualizing Shared Caches in Multicore and Multithreaded Processors. |
PaCT |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Leonid Domnitser, Nael B. Abu-Ghazaleh, Dmitry Ponomarev |
A Predictive Model for Cache-Based Side Channels in Multicore and Multithreaded Microprocessors. |
MMM-ACNS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ketan Bahulkar, Nicole Hofmann, Deepak Jagtap, Nael B. Abu-Ghazaleh, Dmitry Ponomarev |
Performance Evaluation of PDES on Multi-core Clusters. |
DS-RT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Loew, Jesse Elwell, Dmitry Ponomarev, Patrick H. Madden |
A co-processor approach for accelerating data-structure intensive algorithms. |
ICCD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev |
MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. |
SIGARCH Computer Architecture News |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev |
Energy-efficient renaming with register versioning. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
microprocessor, register renaming |
| 1 | Hui Zeng, Kanad Ghose, Dmitry Ponomarev |
Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures. |
ICPP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry V. Ponomarev |
MPTLsim: a simulator for X86 multicore processors. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
simulator, microprocessor, coherent cache |
| 1 | Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose |
Selective Writeback: Reducing Register File Pressure and Energy Consumption. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vladimir Krylov, A. Logvinov, A. Ponomarrenko, Dmitry Ponomarev |
Metrized Small World Properties Based Data Structure. |
SEDE |
2008 |
DBLP BibTeX RDF |
|
| 1 | Jason Loew, Dmitry Ponomarev |
Two-Level Reorder Buffers: Accelerating Memory-Bound Applications on SMT Architectures. |
ICPP |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason Loew, Dmitry Ponomarev |
Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt? |
SBAC-PAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Jason Loew, Dmitry V. Ponomarev |
Reducing register pressure in SMT processors through L2-miss-driven early register release. |
TACO |
2008 |
DBLP DOI BibTeX RDF |
register file, Simultaneous multithreading |
| 1 | Deniz Balkan, Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose |
Predicting and Exploiting Transient Values for Reducing Register File Pressure and Energy Consumption. |
IEEE Trans. Computers |
2008 |
DBLP DOI BibTeX RDF |
General, Microprocessors, Pipeline processors, Performance attributes |
| 1 | Vladimir Krylov, Dmitry V. Ponomarev, A. Logvinov, A. Ponomarrenko |
Active Database Architecture for XML Documents. |
CAINE |
2008 |
DBLP BibTeX RDF |
|
| 1 | Vladimir Krylov, N. Mikhaylov, Dmitry V. Ponomarev |
New Architecture and Protocols for Global-Scale Machine Communities. |
CAINE |
2008 |
DBLP BibTeX RDF |
|
| 1 | Balaji Vijayn, Dmitry V. Ponomarev |
Accurate and Low-Overhead Dynamic Detection and Prediction of Program Phases Using Branch Signatures. |
SBAC-PAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert J. LaDuca, Joseph J. Sharkey, Dmitry V. Ponomarev |
Hiding Communication Delays in Clustered Microarchitectures. |
SBAC-PAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev |
Exploiting Operand Availability for Efficient Simultaneous Multithreading. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
simultaneous multithreading, Issue queue |
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev |
An L2-miss-driven early register deallocation for SMT processors. |
ICS |
2007 |
DBLP DOI BibTeX RDF |
register files, simultaneous multithreading |
| 1 | Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose |
Early Register Deallocation Mechanisms Using Checkpointed Register Files. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
register file optimization, Superscalar processors, precise interrupts |
| 1 | Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose |
Selective writeback: exploiting transient values for energy-efficiency and performance. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
energy-efficiency, register files |
| 1 | Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev |
Adaptive reorder buffers for SMT processors. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
simultaneous multithreading, reorder buffer |
| 1 | Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose |
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
energy-efficiency, register files |
| 1 | Joseph J. Sharkey, Dmitry Ponomarev |
Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch. |
ICPP |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal |
Address-Value Decoupling for Early Register Deallocation. |
ICPP |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin |
Instruction packing: Toward fast and energy-efficient instruction scheduling. |
TACO |
2006 |
DBLP DOI BibTeX RDF |
instruction packing, low power, Issue queue |
| 1 | Dmitry V. Ponomarev, Gurhan Kucuk, Kanad Ghose |
Dynamic Resizing of Superscalar Datapath Components for Energy Efficiency. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
energy-efficient datapath, Superscalar processor, power reduction, dynamic instruction scheduling |
| 1 | Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal |
Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors. |
HiPC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev |
Efficient instruction schedulers for SMT processors. |
HPCA |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev |
Instruction Recirculation: Eliminating Counting Logic in Wakeup-Free Schedulers. |
Euro-Par |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev |
Non-uniform Instruction Scheduling. |
Euro-Par |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin |
Instruction packing: reducing power and delay of the dynamic scheduling logic. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
instruction packing, low power, issue queue |
| 1 | Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin |
Power-Efficient Wakeup Tag Broadcast. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose |
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry Ponomarev, Vladimir Krylov |
Web Mapping of Real-World Things and its Applications - Product WEBID as a Driving Force for new Supply Chains. |
ICETE |
2004 |
DBLP BibTeX RDF |
|
| 1 | Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin |
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. |
PACS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose |
Energy Efficient Comparators for Superscalar Datapaths. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose |
Isolating Short-Lived Operands for Energy Reduction. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev |
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. |
MICRO |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose |
Increasing Processor Performance Through Early Register Release. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose |
Energy Efficient Register Renaming. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose |
Power efficient comparators for long arguments in superscalar processors. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
low-power comparators, superscalar datapath |
| 1 | Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose |
Reducing reorder buffer complexity through selective operand caching. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
low-complexity datapath, short-lived values, low-power design, reorder buffer |
| 1 | Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose |
Reducing Datapath Energy through the Isolation of Short-Lived Operands. |
IEEE PACT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose |
Distributed Reorder Buffer Schemes for Low Power. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter M. Kogge |
Energy-efficient issue queue design. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose |
Energy-Efficient Design of the Reorder Buffer. |
PATMOS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose |
Low-complexity reorder buffer architecture. |
ICS |
2002 |
DBLP DOI BibTeX RDF |
low-complexity datapath, low-power design, reorder buffer |
| 1 | Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose |
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev |
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. |
ICCD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Dmitry Ponomarev, Kanad Ghose, Eugeny Saksonov |
Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. |
Euro-Par |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge |
Energy: efficient instruction dispatch buffer design for superscalar processors. |
ISLPED |
2001 |
DBLP DOI BibTeX RDF |
bitline segmentation, low power comparator, low power instruction scheduling, low-power superscalar datapath |
| 1 | Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose |
Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. |
MICRO |
2001 |
DBLP DOI BibTeX RDF |
energy-efficient datapath, superscalar processor, power reduction, dynamic instruction scheduling |
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")