Search results for "Douglas L. Maskell"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Jin Cui, Douglas L. Maskell	A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling.	IEEE Trans. on CAD of Integrated Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni	A lean FPGA soft processor built using a DSP block.	FPGA	2012	DBLP DOI BibTeX RDF
1	Yupeng Chen, Bertil Schmidt, Douglas L. Maskell	Accelerating short read mapping on an FPGA (abstract only).	FPGA	2012	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	DecGPU: distributed error correction on massively parallel graphics processing units using CUDA and MPI.	BMC Bioinformatics	2011	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	Parallelized short read assembly of large genomes using de Bruijn graphs.	BMC Bioinformatics	2011	DBLP DOI BibTeX RDF
1	Lakshmi Kuttippurathu, Michael Hsing, Yongchao Liu, Bertil Schmidt, Douglas L. Maskell, Kyungjoon Lee, Aibin He, William T. Pu, Sek Won Kong	CompleteMOTIFs: DNA motif discovery platform for transcription factor binding experiments.	Bioinformatics	2011	DBLP DOI BibTeX RDF
1	Bertil Schmidt, Douglas L. Maskell	Third Workshop on using Emerging Parallel Architectures.	Procedia CS	2011	DBLP DOI BibTeX RDF
1	Chai Quek, Zaiyi Guo, Douglas L. Maskell	A Novel Fuzzy Associative Memory Architecture for Stock Market Prediction and Trading.	IJFSA	2011	DBLP BibTeX RDF
1	Jagdish Chandra Patra, Lian Lian Jiang, Douglas L. Maskell	Estimation of external quantum efficiency for multi-junction solar cells under influence of charged particles using artificial neural networks.	SMC	2011	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	An Ultrafast Scalable Many-Core Motif Discovery Algorithm for Multiple GPUs.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	MSAProbs: multiple sequence alignment based on pair hidden Markov models and partition function posterior probabilities.	Bioinformatics	2010	DBLP DOI BibTeX RDF
1	Bertil Schmidt, Douglas L. Maskell	Second Workshop on using Emerging Parallel Architectures.	Procedia CS	2010	DBLP DOI BibTeX RDF
1	Ghee Ming Goh, Chai Quek, Douglas L. Maskell	EpiList II: Closing the Loop in the Development of Generic Cognitive Skills.	IEEE Transactions on Systems, Man, and Cybernetics, Part A	2010	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Weiguo Liu, Douglas L. Maskell	CUDA-MEME: Accelerating motif discovery in biological sequences using CUDA-enabled graphics processing units.	Pattern Recognition Letters	2010	DBLP DOI BibTeX RDF
1	Achutavarrier Prasad Vinod, Edmund Ming-Kit Lai, Douglas L. Maskell, Pramod Kumar Meher	An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth.	Integration	2010	DBLP DOI BibTeX RDF
1	Jin Cui, Douglas L. Maskell	High level event driven thermal estimation for thermal aware task allocation and scheduling.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Sunita Chandrasekaran, Shilpa Shanbagh, Douglas L. Maskell	A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	fpgas, bioinformatics, sequence alignment, data dependency analysis, smith-waterman algorithm
1	Timothy F. Oliver, Bertil Schmidt, Yanto Jakop, Douglas L. Maskell	High Speed Biological Sequence Analysis With Hidden Markov Models on Reconfigurable Platforms.	IEEE Transactions on Information Technology in Biomedicine	2009	DBLP DOI BibTeX RDF
1	Yupeng Chen, Bertil Schmidt, Douglas L. Maskell	A Reconfigurable Bloom Filter Architecture for BLASTN.	ARCS	2009	DBLP DOI BibTeX RDF	genomic sequence analysis, bioinformatics, reconfigurable computing, Bloom filter
1	Bertil Schmidt, Douglas L. Maskell	Workshop on Using Emerging Parallel Architectures for Computational Science.	ICCS	2009	DBLP DOI BibTeX RDF	High Performance Computing, Reconfigurable Computing, Computational Science, GPGPU, Parallel Computer Architectures, Heterogeneous Multi-cores
1	Jin Cui, Douglas L. Maskell	Dynamic thermal-aware scheduling on chip multiprocessor for soft real-time system.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	dynamic tas, post thermal map, cmp, soft real-time
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	Parallel reconstruction of neighbor-joining trees for large multiple sequence alignments using CUDA.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Yongchao Liu, Bertil Schmidt, Douglas L. Maskell	MSA-CUDA: Multiple Sequence Alignment on Graphics Processing Units with CUDA.	ASAP	2009	DBLP DOI BibTeX RDF
1	Yi Wang, Douglas L. Maskell, Jussipekka Leiwo	A unified architecture for a public key cryptographic coprocessor.	Journal of Systems Architecture - Embedded Systems Design	2008	DBLP DOI BibTeX RDF
1	Douglas L. Maskell, A. Prasad Vinod	Efficient multiplierless channel filters for multi-standard SDR.	CIT	2008	DBLP DOI BibTeX RDF
1	Douglas L. Maskell, Achutavarrier Prasad Vinod, Graham S. Woods	Multiplierless multi-standard SDR channel filters.	MMSP	2008	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Douglas L. Maskell	Prerouted FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System.	EURASIP J. Emb. Sys.	2007	DBLP DOI BibTeX RDF
1	Xiaoyong Chen, Douglas L. Maskell	Supporting multiple-input, multiple-output custom functions in configurable processors.	Journal of Systems Architecture	2007	DBLP DOI BibTeX RDF
1	Xiaoyong Chen, Douglas L. Maskell, Yang Sun	Fast Identification of Custom Instructions for Extensible Processors.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Alvin Cai, Chai Quek, Douglas L. Maskell	Type-2 GA-TSK fuzzy neural network.	IEEE Congress on Evolutionary Computation	2007	DBLP DOI BibTeX RDF
1	Ian McLoughlin, Douglas L. Maskell, Thambipillai Srikanthan, Wooi-Boon Goh	An Embedded Systems graduate education for Singapore.	ICPADS	2007	DBLP DOI BibTeX RDF
1	Yan Lin Aung, Douglas L. Maskell, Timothy F. Oliver, Bertil Schmidt, William Bong	C-Based Design Methodology for FPGA Implementation of ClustalW MSA.	PRIB	2007	DBLP DOI BibTeX RDF	ClustalW, FPGA, multiple sequence alignment, sequence analysis
1	Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell, Darran Nathan, Ralf Clemens	High-speed Multiple Sequence Alignment on a reconfigurable platform.	IJBRA	2006	DBLP DOI BibTeX RDF
1	Jussipekka Leiwo, Lam-for Kwok, Douglas L. Maskell, Nenad Stankovic	A technique for expressing IT security objectives.	Information & Software Technology	2006	DBLP DOI BibTeX RDF
1	K. S. Tham, Douglas L. Maskell	Software-Oriented Approach to Hardware-Software Co-Simulation for FPGA-Based Risc Extensible Processor.	FPL	2006	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Douglas L. Maskell	Execution Objects for Dynamically Reconfigurable FPGA Systems.	FPL	2006	DBLP DOI BibTeX RDF
1	Xiaoyong Chen, Douglas L. Maskell	M2E: A Multiple-Input, Multiple-Output Function Extension for RISC-Based Extensible Processors.	ARCS	2006	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Bertil Schmidt, Yanto Jakop, Douglas L. Maskell	Accelerating the Viterbi Algorithm for Profile Hidden Markov Models Using Reconfigurable Hardware.	International Conference on Computational Science	2006	DBLP DOI BibTeX RDF
1	Douglas L. Maskell, Timothy F. Oliver	Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System.	Dynamically Reconfigurable Architectures	2006	DBLP BibTeX RDF
1	Yi Wang, Douglas L. Maskell, Jussipekka Leiwo, Thambipillai Srikanthan	Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Xiaoyong Chen, Douglas L. Maskell, Yang Sun	Automatic Identification of Custom Functions for Embedded Processors with MIMO Extensions.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Douglas L. Maskell, Jussipekka Leiwo, Jagdish Chandra Patra	The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Bertil Schmidt, Darran Nathan, Ralf Clemens, Douglas L. Maskell	Using reconfigurable hardware to accelerate multiple sequence alignment with ClustalW.	Bioinformatics	2005	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Douglas L. Maskell	An FPGA Model for Developing Dynamic Circuit Computing.	FPT	2005	DBLP BibTeX RDF
1	K. S. Tham, Douglas L. Maskell	Software-Oriented System-Level Simulation for Design Space Exploration of Reconfigurable Architectures.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF
1	Jacop Yanto, Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell	Biological Sequence Analysis with Hidden Markov Models on an FPGA.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell, Darran Nathan, Ralf Clemens	Multiple Sequence Alignment on an FPGA.	ICPADS	2005	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell	Hyper customized processors for bio-sequence database scanning on FPGAs.	FPGA	2005	DBLP DOI BibTeX RDF	dynamic re-configuration, FPGA, bio-informatics, Smith-Waterman
1	Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell, Achutavarrier Prasad Vinod	A reconfigurable architecture for scanning biosequence databases.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Douglas L. Maskell, Graham S. Woods, Andrew Kerans	A hardware efficient implementation of an adaptive subsample delay estimator.	ISCAS	2004	DBLP DOI BibTeX RDF
1	Timothy F. Oliver, Douglas L. Maskell	Towards Run-Time Re-Configurable Techniques for Real-Time Embedded Applications.	Engineering of Reconfigurable Systems and Algorithms	2003	DBLP BibTeX RDF
1	Douglas L. Maskell, Graham S. Woods	The discrete-time quadrature subsample estimation of delay.	IEEE T. Instrumentation and Measurement	2002	DBLP DOI BibTeX RDF

Publications of "Douglas L. Maskell" ( http://dblp.L3S.de/Authors/Douglas_L._Maskell )