Search results for "Elisardo Antelo"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Lois Orosa, Elisardo Antelo, Javier D. Bruguera	FlexSig: Implementing flexible hardware signatures.	TACO	2012	DBLP DOI BibTeX RDF
1	Fabrizio Lamberti, Nikolaos Andrikos, Elisardo Antelo, Paolo Montuschi	Reducing the Computation Time in (Short Bit-Width) Two's Complement Multipliers.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF
1	Elisardo Antelo, David Hough, Paolo Ienne (eds.)	20th IEEE Symposium on Computer Arithmetic, ARITH 2011, Tübingen, Germany, 25-27 July 2011	IEEE Symposium on Computer Arithmetic	2011	DBLP BibTeX RDF
1	Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi	Improved Design of High-Performance Parallel Decimal Multipliers.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	Decimal multiplication, decimal carry-save addition, decimal codings, parallel multiplication
1	Elisardo Antelo	A Comment on "Beyond Fat-tree: Unidirectional Load-Balanced Multistage Interconnection Network".	Computer Architecture Letters	2009	DBLP DOI BibTeX RDF
1	Álvaro Vázquez, Elisardo Antelo	A High-Performance Significand BCD Adder with IEEE 754-2008 Decimal Rounding.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
1	Álvaro Vázquez, Julio Villalba, Elisardo Antelo	Computation of Decimal Transcendental Functions Using the CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	2009	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Julio Villalba, Emilio L. Zapata	A Low-Latency Pipelined 2D and 3D CORDIC Processors.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Arithmetic and Logic Structures, Algorithms, Computer arithmetic, High-Speed Arithmetic
1	Álvaro Vázquez, Elisardo Antelo	New insights on Ling adders.	ASAP	2008	DBLP DOI BibTeX RDF
1	Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi	A New Family of High.Performance Parallel Decimal Multipliers.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
1	Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi	A radix-10 SRT divider based on alternative BCD codings.	ICCD	2007	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli	Digit-Recurrence Dividers with Reduced Logical Depth.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Digit-by-digit division, algorithms and architectures for computer arithmetic, division radix 4, division radix 16
1	Tomás Lang, Elisardo Antelo	High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	vector normalization, geometry transforms, graphics processor, CORDIC, 3D rotations
1	Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli	Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Julio Villalba	Low Latency Pipelined Circular CORDIC.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Combined division, reciprocal square root, exact rounding, staircase selection function, square root, digit-recurrence algorithm
1	Álvaro Vázquez, Elisardo Antelo	Implementation of the Exponential Function in a Floating-Point Unit.	VLSI Signal Processing	2003	DBLP DOI BibTeX RDF	exponential function, computer arithmetic, floating-point unit, transcendental functions
1	Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli	Fast Radix-4 Retimed Division with Selection by Comparisons.	ASAP	2002	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	Very-high radix algorithms, selection by rounding, angle and modulus calculation, rotation, CORDIC
1	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix CORDIC Rotation Based on Selection by Rounding.	VLSI Signal Processing	2000	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	CORDIC-Based Computation of ArcCos.	VLSI Signal Processing	2000	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	CORDIC Vectoring with Arbitrary Target Value.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	Extended CORDIC functions, inverse kinematics computations, computer arithmetic, rotations, CORDIC
1	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling.	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	high-radix methods, inverse square-root, division, square-root, Digit-recurrence algorithm
1	Elisardo Antelo, Montserrat Bóo, Javier D. Bruguera, Emilio L. Zapata	A novel design of a two operand normalization circuit.	IEEE Trans. VLSI Syst.	1998	DBLP DOI BibTeX RDF
1	Julio Villalba, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	Radix-4 Vectoring CORDIC Algorithm and Architectures.	VLSI Signal Processing	1998	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Julio Villalba, Javier D. Bruguera, Emilio L. Zapata	High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Emilio L. Zapata	Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	CORDIC-based computation of arccos and arcsin.	ASAP	1997	DBLP DOI BibTeX RDF
1	Tomás Lang, Elisardo Antelo	CORDIC Vectoring with Arbitrary Target Value.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	Computer arithmetic, VLSI architectures, rotations, CORDIC, elementary functions
1	Elisardo Antelo, Javier D. Bruguera, Emilio L. Zapata	Unified Mixed Radix 2-4 Redundant CORDIC Processor.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF
1	Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata	High Radix Cordic Rotation Based on Selection by Rounding.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF	Rotation mode, High radix algorithm, CORDIC algorithm
1	Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	Radix-4 Vectoring Cordic Algorithm And Architectures.	ASAP	1996	DBLP DOI BibTeX RDF	radix-4 vectoring CORDIC algorithm, radix-4 vectoring CORDIC architectures, vectoring mode, microrotations, zero skipping technique, recursive architectures, matrix triangularization, rotation angle, computational complexity, complexity, parallel architectures, singular value decomposition, SVD, signal processing, digital arithmetic, digital arithmetic, matrix algebra, pipelined architectures
1	Julio Villalba, J. A. Hidalgo, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera	CORDIC Architectures with Parallel Compensation of the Scale Factor.	ASAP	1995	DBLP DOI BibTeX RDF	Parallel Architecture, CORDIC algorithm, Scale Factor, Redundant Arithmetic
1	Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Digit On-line Large Radix CORDIC Rotator.	ASAP	1995	DBLP DOI BibTeX RDF	Digit on-line processing, Pipelined array architecture, VLSI architecture, Application-specific processor, CORDIC algorithm
1	Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata	Redundant CORDIC Rotator Based on Parallel Prediction.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	High speed processor, Parallel prediction, Parallel architecture, CORDIC algorithm, Redundant arithmetic
1	Javier D. Bruguera, Elisardo Antelo, Emilio L. Zapata	Design of a Pipelined Radix 4 CORDIC Processor.	Parallel Computing	1993	DBLP DOI BibTeX RDF

Publications of "Elisardo Antelo" ( http://dblp.L3S.de/Authors/Elisardo_Antelo )