Search results for "Erdal Oruklu"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Vijay Anand, Jafar Saniie, Erdal Oruklu	Security Policy Management Process within Six Sigma Framework.	J. Information Security	2012	DBLP DOI BibTeX RDF
1	Erdal Oruklu, Xin Xiao, Jafar Saniie	Reduced Memory and Low Power Architectures for CORDIC-based FFT Processors.	Signal Processing Systems	2012	DBLP DOI BibTeX RDF
1	Erdal Oruklu, Joshua Weber, Jafar Saniie	System-on-Chip Subband Decomposition Architectures for Ultrasonic Detection Applications.	Signal Processing Systems	2012	DBLP DOI BibTeX RDF
1	Vitaliy Kunin, Marcos Turqueti, Jafar Saniie, Erdal Oruklu	Direction of Arrival Estimation and Localization Using Acoustic Sensor Arrays.	J. Sensor Technology	2011	DBLP DOI BibTeX RDF
1	David Hentrich, Erdal Oruklu, Jafar Saniie	Polymorphic Computing: Definition, Trends, and a New Agent-Based Architecture.	Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Jeff Rebacz, Erdal Oruklu, Jafar Saniie	Fast Signed-Digit Multi-operand Decimal Adders.	Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Vijay Anand, Jafar Saniie, Erdal Oruklu	Trusted computing architectures for a mobile IT infrastructure.	SIGUCCS	2011	DBLP DOI BibTeX RDF
1	Vibhuti B. Dave, Erdal Oruklu, Jafar Saniie	Constant addition with flagged binary adder architectures.	Integration	2010	DBLP DOI BibTeX RDF
1	Xin Xiao, Erdal Oruklu, Jafar Saniie	Reduced memory architecture for CORDIC-based FFT.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Erdal Oruklu, Jafar Saniie	Dynamically Reconfigurable Architecture Design for Ultrasonic Imaging.	IEEE T. Instrumentation and Measurement	2009	DBLP DOI BibTeX RDF
1	Semih Aslan, Erdal Oruklu, Jafar Saniie	Realization of area efficient QR factorization using unified division, square root, and inverse square root hardware.	EIT	2009	DBLP DOI BibTeX RDF
1	David Hentrich, Erdal Oruklu, Jafar Saniie	Performance evaluation of SRAM cells in 22nm predictive CMOS technology.	EIT	2009	DBLP DOI BibTeX RDF
1	Christophe Desmouliers, Erdal Oruklu, Jafar Saniie	FPGA-based design of a high-performance and modular video processing platform.	EIT	2009	DBLP DOI BibTeX RDF
1	Xin Xiao, Erdal Oruklu, Jafar Saniie	Fast memory addressing scheme for radix-4 FFT implementation.	EIT	2009	DBLP DOI BibTeX RDF
1	Jeff Rebacz, Erdal Oruklu, Jafar Saniie	High performance signed-digit decimal adders.	EIT	2009	DBLP DOI BibTeX RDF
1	Xin Xiao, Erdal Oruklu, Jafar Saniie	An Efficient FFT Engine With Reduced Addressing Logic.	IEEE Trans. on Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Yufeng Lu, Erdal Oruklu, Jafar Saniie	Fpga-based hardware/software co-design for chirplet signal decomposition.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	chirplet, fpga, hardware/software codesign, ultrasound
1	Erdal Oruklu, Vibhuti B. Dave, Jafar Saniie	Performance analysis of flagged prefix adders with logical effort.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Christophe Desmouliers, Erdal Oruklu, Jafar Saniie	Universal Wavelet Kernel Implementation Using Reconfigurable Hardware.	ReConFig	2008	DBLP DOI BibTeX RDF
1	Vibhuti B. Dave, Erdal Oruklu, Jafar Saniie	Design and Synthesis of a Three Input Flagged Prefix Adder.	ISCAS	2007	DBLP DOI BibTeX RDF
1	John Moskal, Erdal Oruklu, Jafar Saniie	Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Erdal Oruklu, Jafar Saniie	Multiplierless architectures for frequency-diverse target detection algorithms.	Circuits, Signals, and Systems	2004	DBLP BibTeX RDF

Publications of "Erdal Oruklu" ( http://dblp.L3S.de/Authors/Erdal_Oruklu )