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Publications of "Eric S. Chung" ( http://dblp.L3S.de/Authors/Eric_S._Chung )

  Author page on DBLP  Author page in RDF  Community of Eric S. Chung in ASPL-2

Publication years (Num. hits)
2004-2012 (10)
Publication types (Num. hits)
article(3) inproceedings(7)
Venues (Conferences, Journals, ...)
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The graphs summarize 19 occurrences of 13 keywords

Results
Found 10 publication records. Showing 10 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. Search on Bibsonomy FPGA The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Eric S. Chung, James C. Hoe, Ken Mai CoRAM: an in-fabric memory architecture for FPGA-based computing. Search on Bibsonomy FPGA The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Eric S. Chung, James C. Hoe High-Level Design and Validation of the BlueSPARC Multithreaded Processor. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? Search on Bibsonomy MICRO The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. Search on Bibsonomy TRETS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF simulator, FPGA, prototype, multiprocessor, multicore, emulator
1Eric S. Chung, James C. Hoe Implementing a high-performance multithreaded microprocessor: A case study in high-level design and validation. Search on Bibsonomy MEMOCODE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. Search on Bibsonomy FPGA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF simulator, FPGA, prototype, multiprocessor, multicore, emulator
1Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk TRUSS: A Reliable, Scalable Server Architecture. Search on Bibsonomy IEEE Micro The full citation details ... 2005 DBLP  DOI  BibTeX  RDF and Fault-Tolerance, and Fault-Tolerance, Reliability, Reliability, Reliability, Testing, Testing, Testing and Fault-Tolerance, Performance Analysis and Design Aids
1Eric S. Chung, Jason I. Hong, James Lin, Madhu K. Prabaker, James A. Landay, Alan L. Liu Development and evaluation of emerging design patterns for ubiquitous computing. Search on Bibsonomy Conference on Designing Interactive Systems The full citation details ... 2004 DBLP  DOI  BibTeX  RDF design, ubiquitous computing, design patterns
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