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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 20 occurrences of 13 keywords
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Found 13 publication records. Showing 13 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu |
Automatic Pipelining From Transactional Datapath Specifications.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam |
Automatic multithreaded pipeline synthesis from transactional datapath specifications. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
automatic pipelining, datapath specification, design exploration of x86 processor pipelines, multithreading, hardware synthesis |
| 1 | Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu |
Automatic pipelining from transactional datapath specifications. |
DATE |
2010 |
DBLP BibTeX RDF |
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| 1 | Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi |
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. |
TRETS |
2009 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
| 1 | Eriko Nurvitadhi, Jumnit Hong, Shih-Lien Lu |
Active Cache Emulator. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. |
FPGA |
2008 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
| 1 | Eriko Nurvitadhi, Ben Lee, Chansu Yu, Myungchul Kim |
Adaptive semi-soft handoff for Cellular IP networks. |
IJWMC |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Jumnit Hong, Eriko Nurvitadhi, Shih-Lien Lu |
Design, implementation, and verification of active cache emulator (ACE). |
FPGA |
2006 |
DBLP DOI BibTeX RDF |
FPGA-based emulator, real-time emulation, cache modeling |
| 1 | Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk |
TRUSS: A Reliable, Scalable Server Architecture. |
IEEE Micro |
2005 |
DBLP DOI BibTeX RDF |
and Fault-Tolerance, and Fault-Tolerance, Reliability, Reliability, Reliability, Testing, Testing, Testing and Fault-Tolerance, Performance Analysis and Design Aids |
| 1 | Ben Lee, Eriko Nurvitadhi, Reshma Dixit, Chansu Yu, Myungchul Kim |
Dynamic voltage scaling techniques for power efficient video decoding. |
Journal of Systems Architecture |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Eriko Nurvitadhi, Nirut Chalainanont, Shih-Lien Lu |
Characterization of L3 cache behavior of SPECjAppServer2002 and TPC-C. |
ICS |
2005 |
DBLP DOI BibTeX RDF |
L3 characterization, application server and OLTP, emulator |
| 1 | Eriko Nurvitadhi, Ben Lee, Chansu Yu, Myungchul Kim |
A Comparative Study of Dynamic Voltage Scaling Techniques for Low-Power Video Decoding. |
Embedded Systems and Applications |
2003 |
DBLP BibTeX RDF |
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Displaying result #1 - #13 of 13 (100 per page; Change: )
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