Search results for "FIR filter"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Yuriy S. Shmaliy	An unbiased p-step predictive FIR filter for a class of noise-free discrete-time models with independently observed states.	Signal, Image and Video Processing	2009	DBLP DOI BibTeX RDF	Predictive finite impulse response (FIR) filter, Noise power gain, Synchronization, State estimation
3	Jongsun Park, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi-Meimand, Yongtao Wang, Kaushik Roy	High performance and low power FIR filter design based on sharing multiplication.	ISLPED	2002	DBLP DOI BibTeX RDF	FIR filter design, computation sharing, conditional capture flip-flop, high performance and low power carry select adder
3	José A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick	An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz.	ASYNC	2002	DBLP DOI BibTeX RDF	PRML read channel, magnetic recording, asynchronous pipeline, digital arithmetic, FIR filter, dynamic logic, high-throughput, low-latency, distributed arithmetic, mixed timing
3	Vassilis Paliouras, Thanos Stouraitis	Area-time performance of VLSI FIR filter architectures based on residue arithmetic.	EUROMICRO	1997	DBLP DOI BibTeX RDF	area-time performance optimization, VLSI FIR filter architectures, FIR processors, moduli bases, binary-to-residue conversion complexity, residue-to-binary conversion complexity, multiply-by-constant units, binary structures, performance models, Chinese remainder theorem, residue number system, FIR filters, residue arithmetic
2	Saeed Mosayyebpour, Abolghasem Sayyadiyan, Farhad Tehranipour, Ali Shahbazi	Single-Channel Blind Identification with FIR Filter Design in Frequency Domain.	ICSAP	2010	DBLP DOI BibTeX RDF	blind identification, single-channel, channel impulse response, FIR filter
2	Harjit Pal Singh, Sarabjeet Singh, R. K. Sarin, Jasvir Singh	Analysis of Interpolated FIR Filter for VoIP in Noisy Enviroment.	CICSyN	2010	DBLP DOI BibTeX RDF	Interpolated FIR filter, Background Noise, VoIP simulations, Packet loss
2	Rafal Dlugosz, Krzysztof Iniewski	Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Baseband filtering, Switched capacitor technique (SC), Finite impulse response (FIR) filter, Programmable filter, GSM, WCDMA
2	Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi	Sign Bit Reduction Encoding For Low Power Applications.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Low power multiplier, Signed multiplier, Sign extension, FIR filter, Power reduction, Energy reduction, Bus encoding
2	Q. Jiang	FIR Filter Banks for Hexagonal Data Processing.	IEEE Transactions on Image Processing	2008	DBLP DOI BibTeX RDF
2	Biswajit Mishra, Bashir M. Al-Hashimi	Subthreshold FIR Filter Architecture for Ultra Low Power Applications.	PATMOS	2008	DBLP DOI BibTeX RDF	Subthreshold design, Minimum Energy Point, Ultra Low Power Design, Leakage, FIR
2	Te-Jen Su, Chun-Hsiang Kuo, Wen-Pin Tsai, Cheng-Chih Hou	A Hybrid of Clonal Selection Algorithm and Frequency Sampling Method for Designing a 2-D FIR Filter.	DELTA	2008	DBLP DOI BibTeX RDF	Clonal Selection Algorithm (CSA), Finite-impulse response (FIR) filters, Frequency Sampling Method (FSM)
2	Chien-Cheng Tseng, Su-Ling Lee	Design of fractional delay FIR filter using discrete Fourier transform interpolation method.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Anton Blad, Oscar Gustafsson	Bit-level optimized FIR filter architectures for high-speed decimation applications.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Pyung-Soo Kim, Myung-Eui Lee	A New FIR Filter for State Estimation and Its Application.	J. Comput. Sci. Technol.	2007	DBLP DOI BibTeX RDF	FIR (finite impulse response) filter, forgetting factor, Kalman filter, least squares, state estimation
2	Gorn Tepvorachai, Christos A. Papachristou	A Configurable FIR Filter Scheme based on an Adaptive Multilayer Network Structure.	AHS	2007	DBLP DOI BibTeX RDF
2	Chang-Seok Choi, Hanho Lee	A Partial Self-Reconfigurable Adaptive FIR Filter System.	SiPS	2007	DBLP DOI BibTeX RDF
2	Pavel Zahradnik, Miroslav Vlcek, Boris Simák	Analytical Design of an Equiripple DC-Notch FIR Filter.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Tolga Çiloglu	New initialization methods for discrete coefficient FIR filter design with coefficient scaling and the use of scale factor in the design process.	IEEE Transactions on Signal Processing	2006	DBLP DOI BibTeX RDF
2	Toshihisa Tanaka	A Direct Design of Oversampled Perfect Reconstruction FIR Filter Banks.	IEEE Transactions on Signal Processing	2006	DBLP DOI BibTeX RDF
2	Gorn Tepvorachai, Christos A. Papachristou	Self-Configurable Neural Network Processor for FIR Filter Applications.	AHS	2006	DBLP DOI BibTeX RDF
2	Hanho Lee, Chang-Seok Choi	Implementation of a FIR Filter on a Partial Reconfigurable Platform.	KES	2006	DBLP DOI BibTeX RDF
2	A. Olyaei, R. Genov	Algorithmic Delta-Sigma-modulated FIR filter.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Shiann Shiun Jeng, Hsing-Chen Lin, Shu-Ming Chang	FPGA implementation of FIR filter using M-bit parallel distributed arithmetic.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Yeong-Jae Oh, Hanho Lee, Chong Ho Lee	A reconfigurable FIR filter design using dynamic partial reconfiguration.	ISCAS	2006	DBLP DOI BibTeX RDF
2	J. Izydorczyk	An algorithm for optimal terms allocation for fixed point coefficients of FIR filter.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Zhiping Lin, Yongzhi Liu	FIR filter design with group delay constraint using semidefinite programming.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Yeong-Jae Oh, Hanho Lee, Chong Ho Lee	Dynamic Partial Reconfigurable FIR Filter Design.	ARC	2006	DBLP DOI BibTeX RDF
2	Nitin R. Prasad, Partha P. Mondal, Rajan Kanhirodan	A New Iterative FIR Filter for Image and Video Restoration.	IEEE ICCI	2006	DBLP DOI BibTeX RDF
2	Umar Farooq, Muhammad Saleem, Habibullah Jamal	Parameterized FIR Filtering IP Cores for Reusable SoC Design.	ITNG	2006	DBLP DOI BibTeX RDF	Finite Impulse Response (FIR) filter, Unfolded Direct Form (UDF), Folded Direct Form (FDF), Parameterized, SoC design, IP Core, Synthesis tools
2	Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi	A New Low Latency Parallel FIR Filter Scheme.	VLSI Signal Processing	2005	DBLP DOI BibTeX RDF	FIR filters, array multipliers
2	Holger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich	Automatic FIR Filter Generation for FPGAs.	SAMOS	2005	DBLP DOI BibTeX RDF
2	Andreas Lindahl, Lars Bengtsson	A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation.	DSD	2005	DBLP DOI BibTeX RDF
2	Yuichi Kida, Takuro Kida	The FIR filter bank with given analysis filters that minimizes various worst-case measures of error at the same time.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Yasuhiro Takahashi, Michio Yokoyama	New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Wanping Huang, Lifang Zhou, Jixin Qian, Longhua Ma	FIR Frequency Sampling Filters Design Based on Adaptive Particle Swarm Optimization Algorithm.	ICNC	2005	DBLP DOI BibTeX RDF	adaptive capacity, frequency sampling filter, evolutionary computation, particle swarm optimization, FIR filter
2	Ahmet T. Erdogan, Tughrul Arslan	Low Power FIR Filter Implementations Based on Coefficient Ordering Algorithm.	ISVLSI	2004	DBLP DOI BibTeX RDF
2	Zhi Ye, Chip-Hong Chang	Local Search Method for FIR Filter Coefficients Synthesis.	DELTA	2004	DBLP DOI BibTeX RDF
2	Jae-Jin Lee, Gi-Yong Song	Bit-level super-systolic array for FIR filter with a FPGA-based bit-serial semi-systolic multiplier.	FPGA	2004	DBLP DOI BibTeX RDF
2	Chao Cheng, Keshab K. Parhi	Hardware efficient fast parallel FIR filter structures based on iterated short convolution.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Håkan Johansson, Oscar Gustafsson	Mth-band linear-phase FIR filter interpolators and decimators utilizing the Farrow structure.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Chien-Cheng Tseng	Design of variable fractional delay FIR filter using symmetry.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Pavel Zahradnik, Miroslav Vlcek	Fast Design of 2-D Narrow Bandstop FIR Filters for Image Enhancement.	KES	2004	DBLP DOI BibTeX RDF	bandstop filter, Zolotarev polynomial, equiripple approximation, FIR filter, two-dimensional
2	Kyung-Saeng Kim, Kwyro Lee	Low-power and area-efficient FIR filter implementation suitable for multiple taps.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
2	Jongsun Park, Khurram Muhammad, Kaushik Roy	High-performance FIR filter design based on sharing multiplication.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
2	Chien-Cheng Tseng	Design of 2-D variable fractional delay FIR filter using 2-D differentiators.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Kuan-Hung Chen, Tzi-Dar Chiueh	Design and implementation of a reconfigurable FIR filter.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Harri Lampinen, Pauli Perälä, Olli Vainio	Design of a self-timed asynchronous parallel FIR filter using CSCD.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Chien-Chung Chua, Bah-Hwee Gwee, Joseph Sylvester Chang	A low-voltage micropower asynchronous multiplier for a multiplierless FIR filter.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Xiaofeng Lin, Jin Liu	A CMOS analog continuous-time FIR filter for 1Gbps cable equalizer.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Chien-Cheng Tseng	Design of sinusoid-based variable fractional delay FIR filter using weighted least squares method.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Linnéa Rosenbaum, Per Löwenborg, Håkan Johansson	Cosine and sine modulated FIR filter banks utilizing the frequency-response masking approach.	ISCAS	2003	DBLP DOI BibTeX RDF
2	A. Chorevas, D. Reisis	Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators.	VLSI Signal Processing	2003	DBLP DOI BibTeX RDF	VLSI, FIR filter, systolic architectures, QAM
2	Ivan Milentijevic, Vladimir Ciric, Teufik Tokic, Oliver Vojinovic	Folded Bit-Plane FIR Filter Architecture with Changeable Folding Factor.	DSD	2002	DBLP DOI BibTeX RDF
2	J. Davila	Results on a class of biorthogonal 2-D LP FIR filter banks.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer	Testing Schemes for FIR Filter Structures.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	Complex multipliers, sign-extended adders, trees of adders, design for testability, FIR filters, state coverage, pseudoexhaustive testing, cell fault model
2	V. A. Bartlett, Eckhard Grass	A Low-Power Asynchronous VLSI FIR Filter.	ARVLSI	2001	DBLP DOI BibTeX RDF
2	Rika Ito, Kenji Suyama, Ryuichi Hirabayashi	Optimal design of FIR filter with discrete coefficients based on integer semi-infinite linear programs.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Kei-Yong Khoo, Zhan Yu, Alan N. Willson Jr.	Design of optimal hybrid form FIR filter.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Gang Xu, Jiren Yuan	An embedded low power FIR filter.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Byung G. Jo, J. Y. Kang, Myung Hoon Sunwoo	A low power and area efficient FIR filter chip for PRML read channels.	ISCAS	2001	DBLP DOI BibTeX RDF
2	M. Kaneko, Y. Maekawa	Extended dimensional threshold filtering-a bridge between FIR filter and median type filter.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Maw-Ching Lin, Chien-Lung Chen, Ding-Yu Shin, Chin-Hung Lin, Shyh-Jye Jou	Low-power multiplierless FIR filter synthesizer based on CSD code.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Hyeongseok Yu, Byung Wook Kim, Yeon Gon Cho, Jun-Dong Cho, Jea Woo Kim, Hyun Cheol Park, Ki Won Lee	Area-efficient and reusable VLSI architecture of decision feedback equalizer for QAM modern.	ASP-DAC	2001	DBLP DOI BibTeX RDF	Decision feedback equalizer, reusable VLSI implementation, FIR filter, QAM
2	Sung-Ho Baik, Kyung-Nam Han, E. Yoon	A 230 MHz 8 tap programmable FIR filter using redundant binary number system.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Soo-Chang Pei, Chien-Cheng Tseng	FIR filter design based on total least squares error criterion.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Soontorn Oraintara, Truong Q. Nguyen	A new method in FIR filter design.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Tak Keung Yeung, Sze-Fong Yau	A multi-input multi-output adaptive FIR filter with guaranteed convergence for feedforward ANC system.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Fathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider	A programmable low voltage switched-current FIR filter.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Anteneh Alemu Abbo	An Embedded Processor for Integrated Navigation Receiver.	VLSI Design	1998	DBLP DOI BibTeX RDF	Integrated Navigation, Embedded Systems, FIR Filter, Application-Specific Processor
2	Robert Pasko, Patrick Schaumont, Veerle Derudder, Daniela Durackova	Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination. (PDF / PS)	ISSS	1997	DBLP DOI BibTeX RDF
2	Naushik Sankarayya, Kaushik Roy, Debashis Bhattacharya	Algorithms for Low Power FIR Filter Realization Using Differential Coefficients.	VLSI Design	1997	DBLP DOI BibTeX RDF	low power FIR filter realization, differential coefficients, computational reduction, convolution, FIR filters
2	Innho Jee	Optimum Design of Vector-Quantized Subband Codecs. (PDF / PS)	ICIP	1997	DBLP DOI BibTeX RDF	vector-quantized subband codecs, mean squared reconstruction error, MSE measure, equivalent quantization model, optimum FIR filter coefficients, input signal correlation model, 4-tap filter paraunitary filter bank structure, dyadic subband filter banks, image coding, image compression, vector quantization, Monte Carlo simulation, optimum design, low bit rate coding, subband coding
2	Kei-Yong Khoo, Alan N. Willson Jr.	Single-transistor transparent-latch clocking.	ARVLSI	1995	DBLP DOI BibTeX RDF	transparent-latch clocking, single-phase clocking scheme, CMOS VLSI designs, single NMOS transistor, allowable width, clock driver, dynamic buffer, architecture-driven voltage scaling, pipelining latches, latch-intensive architectures, filter structures, transposed-form FIR filter, VLSI, flip-flops, clocks, integrated circuit design, digital filters, FIR filters, power dissipation, CMOS digital integrated circuits
1	Ahmed Shahein, Qiang Zhang, Niklas Lotze, Yiannos Manoli	A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization.	IEEE Trans. on Circuits and Systems	2012	DBLP DOI BibTeX RDF
1	Jakub Peksinski, Grzegorz Mikolajczak	Using a Neural Network to Generate a FIR Filter to Improves Digital Images Using a Discrete Convolution Operation.	ACIIDS	2012	DBLP DOI BibTeX RDF
1	S. K. Sahoo, K. Srinivasa Reddy	A High Speed FIR Filter Architecture Based on Novel Higher Radix Algorithm.	VLSI Design	2012	DBLP DOI BibTeX RDF
1	Raija Lehto, Tarja Taurén, Olli Vainio	Recursive FIR filter structures on FPGA.	Microprocessors and Microsystems - Embedded Hardware Design	2011	DBLP DOI BibTeX RDF
1	Woo Hyun Kim, Soohee Han, Jang Gyu Lee	An Optimal FIR Filter With Fading Memory.	IEEE Signal Process. Lett.	2011	DBLP DOI BibTeX RDF
1	Malay Das, Amitabha Sinha, Nishant Kumar Giri	High speed residue number system (RNS) based FIR filter using distributed arithmetic (DA).	SIGARCH Computer Architecture News	2011	DBLP DOI BibTeX RDF
1	Jianjun He, Jiafeng Xie	Hardware Efficient Approach for Memoryless-Based Multiplication and Its Application to FIR Filter.	JCP	2011	DBLP DOI BibTeX RDF
1	Seok-Jae Lee, Ji-Woong Choi, Seon Wook Kim, Jongsun Park	A Reconfigurable FIR Filter Architecture to Trade Off Filter Performance for Dynamic Power Consumption.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Ruimin Huang, Chip-Hong Chang, Mathias Faust, Niklas Lotze, Yiannos Manoli	Sign-Extension Avoidance and Word-Length Optimization by Positive-Offset Representation for FIR Filter Design.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Keisuke Ishizawa, Toma Miyata, Naoyuki Aikawa	Designing two-channel nonuniform-division FIR filter banks with variable notches.	ECCTD	2011	DBLP DOI BibTeX RDF
1	Manju Manuel, Elizabeth Elias	Design of multiplier-less FRM FIR filter using Artificial Bee Colony Algorithm.	ECCTD	2011	DBLP DOI BibTeX RDF
1	Taha Beyrouthy, Laurent Fesquet	An event-driven FIR filter: Design and implementation.	International Symposium on Rapid System Prototyping	2011	DBLP DOI BibTeX RDF
1	Pramod Kumar Meher, Sang Yoon Park	High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic.	VLSI-SoC	2011	DBLP DOI BibTeX RDF
1	Gayathri Chalivendra, Vinay Hanumaiah, Sarma B. K. Vrudhula	A new balanced 4-moduli set {2k, 2n - 1, 2n + 1, 2n+1-1} and its reverse converter design for efficient fir filter implementation.	ACM Great Lakes Symposium on VLSI	2011	DBLP DOI BibTeX RDF
1	Jonathan Müller, Bruno Stefanelli, Antoine Frappe, Lu Ye, Andreia Cathelin, Ali M. Niknejad, Andreas Kaiser	A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Djordje Babic	Design of narrow-band FIR filter with low group delay and piecewise polynomial impulse response.	TSP	2011	DBLP DOI BibTeX RDF
1	Catalin Damian, Eduard Lunca	A low area FIR filter for FPGA implementation.	TSP	2011	DBLP DOI BibTeX RDF
1	Yan Sun, Min Sik Kim	A High-Performance 8-Tap FIR Filter Using Logarithmic Number System.	ICC	2011	DBLP DOI BibTeX RDF
1	Alessandro J. S. Dutra, Lisandro Lovisolo, Eduardo A. B. da Silva, Paulo S. R. Diniz	Successive approximation FIR filter design.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Pyung-Soo Kim	An alternative FIR filter for state estimation in discrete-time systems.	Digital Signal Processing	2010	DBLP DOI BibTeX RDF
1	Seiichi Nakamori	Design of RLS Wiener FIR filter using covariance information in linear discrete-time stochastic systems.	Digital Signal Processing	2010	DBLP DOI BibTeX RDF
1	Shiann Shiun Jeng, Hsing-Chen Lin, Chun-Chyuan Chen, Shu-Ming Chang	Hardware Implementation and Verification of FIR Filter Utilizing M-Bit PDA.	Journal of Circuits, Systems, and Computers	2010	DBLP DOI BibTeX RDF
1	A. S. Kang, Vishal Sharma	Analysis of Beaulieu Pulse Shaping Family Based FIR Filter for WCDMA	CoRR	2010	DBLP BibTeX RDF
1	Montek Singh, José A. Tierno, Alexander Rylyakov, Sergey Rylov, Steven M. Nowick	An Adaptively Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 Gigahertz.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Achutavarrier Prasad Vinod, Edmund Ming-Kit Lai, Douglas L. Maskell, Pramod Kumar Meher	An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth.	Integration	2010	DBLP DOI BibTeX RDF
1	Muhammad Bilal, Shahid Masud	FIR filter implementation through Speculative Sub-Expression Sharing in image data.	ICASSP	2010	DBLP DOI BibTeX RDF
1	Angelo G. da Luz, Eduardo A. C. da Costa, Marilton S. de Aguiar	Ordering and partitioning of coefficients based on heuristic algorithms for low power FIR filter realization.	SBCCI	2010	DBLP DOI BibTeX RDF