Search results for "Fearghal Morgan"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Seamus Cawley, Fearghal Morgan, Brian McGinley, Sandeep Pande, Liam McDaid, Snaider Carrillo, Jim Harkin	Hardware spiking neural network prototyping and application.	Genetic Programming and Evolvable Machines	2011	DBLP DOI BibTeX RDF
1	Brian McGinley, John Maher, Colm O'Riordan, Fearghal Morgan	Maintaining Healthy Population Diversity Using Adaptive Crossover, Mutation, and Selection.	IEEE Trans. Evolutionary Computation	2011	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Peter Athanas	ERDB: An Embedded Routing Database for Reconfigurable Systems.	FPL	2011	DBLP DOI BibTeX RDF	design integrity, security, FPGA, autonomic computing, partial reconfiguration, configurable systems
1	Fearghal Morgan, Seamus Cawley, Frank Callaly, Shane Agnew, Patrick Rocke, Martin O'Halloran, Nina Drozd, Krzysztof Kepa, Brian McGinley	Remote FPGA Lab with Interactive Control and Visualisation Interface.	FPL	2011	DBLP DOI BibTeX RDF
1	Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Seamus Cawley, Fearghal Morgan	Adaptive Routing Strategies for Large Scale Spiking Neural Network Hardware Implementations.	ICANN	2011	DBLP DOI BibTeX RDF
1	Sandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Jim Harkin, Snaider Carrillo, Liam McDaid	Addressing the Hardware Resource Requirements of Network-on-chip based Neural Architectures.	IJCCI (NCTA)	2011	DBLP BibTeX RDF
1	Fearghal Morgan, Seamus Cawley	Enhancing learning of digital systems using a remote FPGA lab.	ReCoSoC	2011	DBLP DOI BibTeX RDF
1	Roger Woods, Jürgen Becker, Peter Athanas, Fearghal Morgan	Guest Editorial ARC 2009.	TRETS	2010	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker	Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems.	TRETS	2010	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz	SeReCon: a secure reconfiguration controller for self-reconfigurable systems.	IJCCBS	2010	DBLP DOI BibTeX RDF
1	Phaophak Sirisuk, Fearghal Morgan, Tarek A. El-Ghazawi, Hideharu Amano (eds.)	Reconfigurable Computing: Architectures, Tools and Applications, 6th International Symposium, ARC 2010, Bangkok, Thailand, March 17-19, 2010. Proceedings	ARC	2010	DBLP DOI BibTeX RDF
1	Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep Pande, Fearghal Morgan	An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations.	ICES	2010	DBLP DOI BibTeX RDF
1	Jim Harkin, Fearghal Morgan, Liam McDaid, Steve Hall, Brian McGinley, Seamus Cawley	A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks.	Int. J. Reconfig. Comp.	2009	DBLP BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz	IP protection in Partially Reconfigurable FPGAs.	FPL	2009	DBLP DOI BibTeX RDF
1	John Maher, Fearghal Morgan, O. M. Aodha	Evolving plastic responses in artificial cell models.	IEEE Congress on Evolutionary Computation	2009	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker	FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing.	ARC	2009	DBLP DOI BibTeX RDF	design assurance, bitstream debugging, security, FPGA, Reconfigurable Computing, design verification, EDA tools
1	Jürgen Becker, Roger Woods, Peter M. Athanas, Fearghal Morgan (eds.)	Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings	ARC	2009	DBLP DOI BibTeX RDF
1	Brian McGinley, Patrick Rocke, Fearghal Morgan, John Maher	Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers.	GECCO	2008	DBLP DOI BibTeX RDF	FPAA hardware evolution, analogue neural networks., spiking neural networks
1	Brian McGinley, Fearghal Morgan, Colm O'Riordan	Maintaining diversity through adaptive selection, crossover and mutation.	GECCO	2008	DBLP DOI BibTeX RDF	Adaptive Genetic Algorithm (AGA), adaptive selection, weighted population diversity, parameter adaptation
1	Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dudek, Thomas Dowrick, Liam McDaid	Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks.	FPL	2008	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz	SeReCon: A Secure Dynamic Partial Reconfiguration Controller.	ISVLSI	2008	DBLP DOI BibTeX RDF
1	Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Tomasz Surmacz	SeReCon: A Trusted Environment for SoPC Design.	DepCoS-RELCOMEX	2008	DBLP DOI BibTeX RDF
1	Patrick Rocke, Brian McGinley, John Maher, Fearghal Morgan, Jim Harkin	Investigating the Suitability of FPAAs for Evolved Hardware Spiking Neural Networks.	ICES	2008	DBLP DOI BibTeX RDF	FPAA Hardware Evolution, Analogue Neural Networks, Spiking Neural Networks
1	Patrick Rocke, Brian McGinley, Fearghal Morgan, John Maher	Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller.	ARC	2007	DBLP DOI BibTeX RDF	Genetic Algorithm, Evolutionary Computation, Reconfigurable Hardware, Spiking Neural Networks, FPAA
1	Krzysztof Kosciuszkiewicz, Krzysztof Kepa, Fearghal Morgan	Transparent Management of Reconfigurable Hardware in Embedded Operating Systems.	ISVLSI	2006	DBLP DOI BibTeX RDF
1	John Maher, Brian McGinley, Patrick Rocke, Fearghal Morgan	Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices.	FCCM	2006	DBLP DOI BibTeX RDF
1	Peter McCurry, Fearghal Morgan, Liam Kilmartin	Xilinx FPGA implementation of an image classifier for object detection applications.	ICIP	2001	DBLP DOI BibTeX RDF

Publications of "Fearghal Morgan" ( http://dblp.L3S.de/Authors/Fearghal_Morgan )