Search results for "Feng Wang 0004"

Found 16 publication records. Showing 16 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link
1	Feng Wang 0004, Yuan Xie	Soft Error Rate Analysis for Combinational Logic Using an Accurate Electrical Masking Model.	IEEE Trans. Dependable Sec. Comput.	2011	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan	Variation-Aware Task and Communication Mapping for MPSoC Architecture.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Madhu Mutyam, Feng Wang 0004, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin	Process-Variation-Aware Adaptive Cache Architecture and Management.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie, Andrés Takach	Variation-aware resource sharing and binding in behavioral synthesis.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Yuh-Fang Tsai, Feng Wang 0004, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin	Design Space Exploration for 3-D Cache.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie	Embedded Multi-Processor System-on-chip (MPSoC) design considering process variations.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Xiaoxia Wu, Yuan Xie	Variability-driven module selection with joint design time optimization and post-silicon tuning.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Guangyu Sun, Yuan Xie	A Variation Aware High Level Synthesis Framework.	DATE	2008	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin	On-chip bus thermal analysis and optimisation.	IET Computers & Digital Techniques	2007	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie, R. Rajaraman, Balaji Vaidyanathan	Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang 0004, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin	Architecting Microprocessor Components in 3D Design Space.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie, Hai Ju	A novel criticality computation method in statistical timing analysis.	DATE	2007	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan	Variation-aware task allocation and scheduling for MPSoC.	ICCAD	2007	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie, Kerry Bernstein, Yan Luo	Dependability Analysis of Nano-scale FinFET circuits.	ISVLSI	2006	DBLP DOI BibTeX RDF
1	Ozcan Ozturk, Feng Wang 0004, Mahmut T. Kandemir, Yuan Xie	Optimal topology exploration for application-specific 3D architectures.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Feng Wang 0004, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin	On-chip bus thermal analysis and optimization.	DATE	2006	DBLP DOI BibTeX RDF

Publications of "Feng Wang 0004" ( http://dblp.L3S.de/Authors/Feng_Wang_0004 )