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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3021 occurrences of 1179 keywords
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Results
Found 2248 publication records. Showing 2248 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 4 | Y. Morihiro, T. Toneda |
Formal verification of data-path circuits based on symbolic simulation.  |
Asian Test Symposium  |
2000 |
DBLP DOI BibTeX RDF |
data-path circuits, symbolic values, transition relation extraction, state graph, input vector sequences, FIFO circuits, LIFO circuits, formal verification, formal verification, graph theory, specification, logic simulation, logic simulation, symbol manipulation, symbolic simulation, Unix workstation |
| 4 | Florian Krohm, Andreas Kuehlmann, Arjen Mets |
The use of random simulation in formal verification. (PDF / PS)  |
ICCD  |
1996 |
DBLP DOI BibTeX RDF |
random simulation, BDD-based verification, counter example pattern, design partitioning, Boolean reasoning, formal verification, formal verification, hardware designs, functional equivalence |
| 3 | Francisco Assis M. do Nascimento, Marcio F. da S. Oliveira, Flávio Rech Wagner |
Using MDE for the formal verification of embedded systems modeled by UML sequence diagrams.  |
SBCCI  |
2009 |
DBLP DOI BibTeX RDF |
embedded systems, formal verification, model driven engineering |
| 3 | Armen Kostanyan, Vardan Matevosyan, Samvel K. Shoukourian, Anna Varosyan |
An approach for formal verification of business processes.  |
SpringSim  |
2009 |
DBLP DOI BibTeX RDF |
cycle transformation, formal verification, business process |
| 3 | Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta |
Formal Verification of Security Policy Implementations in Enterprise Networks.  |
ICISS  |
2009 |
DBLP DOI BibTeX RDF |
Access control list (ACL), Formal Verification, Network security, Security Policy |
| 3 | Jean Souyris, Virginie Wiels, David Delmas, Hervé Delseny |
Formal Verification of Avionics Software Products.  |
FM  |
2009 |
DBLP DOI BibTeX RDF |
avionics software, verification, formal verification, static analysis, Abstract Interpretation, safety, development process |
| 3 | Youngsik Kim, Nazanin Mansouri |
Automated formal verification of scheduling with speculative code motions.  |
ACM Great Lakes Symposium on VLSI  |
2008 |
DBLP DOI BibTeX RDF |
formal verification, high level synthesis, automated theorem-proving, speculation |
| 3 | Richard C. Ho, Michael Theobald, Martin M. Deneroff, Ron O. Dror, Joseph Gagliardo, David E. Shaw |
Early formal verification of conditional coverage points to identify intrinsically hard-to-verify logic.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
conditional coverage, inconclusive results, formal verification, code coverage, verifiability, coverage hole |
| 3 | Raj S. Mitra |
Strategies for mainstream usage of formal verification.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
formal verification, emerging technologies |
| 3 | Robert Beers |
Pre-RTL formal verification: an intel experience.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
TLC, explicit state enumeration, microarchitecture verification, formal verification, protocol verification, TLA+ |
| 3 | Xiang Yin, John C. Knight, Elisabeth A. Nguyen, Westley Weimer |
Formal Verification by Reverse Synthesis.  |
SAFECOMP  |
2008 |
DBLP DOI BibTeX RDF |
formal methods, Formal verification, software dependability |
| 3 | Paul Curzon, Rimvydas Ruksenas, Ann Blandford |
An approach to formal verification of human-computer interaction.  |
Formal Asp. Comput.  |
2007 |
DBLP DOI BibTeX RDF |
Formal cognitive architecture, Formal verification, Theorem proving, Interactive systems, Human error |
| 3 | Alper Sen, Vijay K. Garg |
Formal Verification of Simulation Traces Using Computation Slicing.  |
IEEE Trans. Computers  |
2007 |
DBLP DOI BibTeX RDF |
Simulation, formal verification, temporal logic, partial order, runtime verification, lattice theory |
| 3 | Adrian E. Seigler, Gary A. Van Huben, Hari Mony |
Formal Verification of Partial Good Self-Test Fencing Structures.  |
FMCAD  |
2007 |
DBLP DOI BibTeX RDF |
fencing, formal verification, self test |
| 3 | Hernán P. Dacharry, Norbert Giambiasi |
A formal verification approach for DEVS.  |
SCSC  |
2007 |
DBLP DOI BibTeX RDF |
formal verification, timed automata, DEVS |
| 3 | Hana Chockler, Orna Kupferman, Moshe Y. Vardi |
Coverage metrics for formal verification.  |
STTT  |
2006 |
DBLP DOI BibTeX RDF |
Algorithms, Model checking, Formal verification, Coverage metrics |
| 3 | Saurav Gorai, Saptarshi Biswas, Lovleen Bhatia, Praveen Tiwari, Raj S. Mitra |
Directed-simulation assisted formal verification of serial protocol and bridge.  |
DAC  |
2006 |
DBLP DOI BibTeX RDF |
serial protocol, model checking, formal verification |
| 3 | Xiang Yin |
The echo approach to formal verification.  |
ICSE  |
2006 |
DBLP DOI BibTeX RDF |
formal specification, formal verification |
| 3 | Jerker Hammarberg, Simin Nadjm-Tehrani |
Formal verification of fault tolerance in safety-critical reconfigurable modules.  |
STTT  |
2005 |
DBLP DOI BibTeX RDF |
Fault tolerance, FPGA, Formal verification, Safety analysis, Esterel |
| 3 | Christian Jacobi 0002, Christoph Berg |
Formal Verification of the VAMP Floating Point Unit.  |
Formal Methods in System Design  |
2005 |
DBLP DOI BibTeX RDF |
IEEE standard 754, formal verification, theorem proving, PVS, floating point unit |
| 3 | M. M. Adams, Philip B. Clayton |
ClawZ: Cost-Effective Formal Verification for Control Systems.  |
ICFEM  |
2005 |
DBLP DOI BibTeX RDF |
industrial formal verification, ProofPower, Eurofighter Typhoon, Ada, refinement, Z, control systems, safety-critical software, Simulink, real-time software, formal proof |
| 3 | Lee Pike, Steven D. Johnson |
The formal verification of a reintegration protocol.  |
EMSOFT  |
2005 |
DBLP DOI BibTeX RDF |
infinite-state bounded model-checking, reintegration protocol, real-time, formal verification, infinite-state systems |
| 3 | Dániel Varró |
Automated formal verification of visual modeling languages by model checking.  |
Software and System Modeling  |
2004 |
DBLP DOI BibTeX RDF |
Model checking, Formal verification, Model transformation, Metamodeling, Graph transformation |
| 3 | Roope Kaivola, Katherine R. Kohatsu |
Proof engineering in the large: formal verification of Pentium?4 floating-point divider.  |
STTT  |
2003 |
DBLP DOI BibTeX RDF |
Formal verification, Microprocessor, Arithmetic |
| 3 | John Harrison |
Formal Verification of Square Root Algorithms.  |
Formal Methods in System Design  |
2003 |
DBLP DOI BibTeX RDF |
formal verification, floating-point arithmetic, automated theorem proving |
| 3 | Ravi Hosabettu, Ganesh Gopalakrishnan, Mandayam K. Srivas |
Formal Verification of a Complex Pipelined Processor.  |
Formal Methods in System Design  |
2003 |
DBLP DOI BibTeX RDF |
completion functions, formal verification, PVS, processor verification |
| 3 | Doug Goldson |
Formal Verification of mu-Charts.  |
APSEC  |
2002 |
DBLP DOI BibTeX RDF |
µ-charts, formal verification, refinement, CSP |
| 3 | Jozef Hooman, Jaco van de Pol |
Formal verification of replication on a distributed data space architecture.  |
SAC  |
2002 |
DBLP DOI BibTeX RDF |
data space architecture, model-checking, formal verification, coordination, theorem proving |
| 3 | Petru Eles, Zebo Peng, Daniel Karlsson |
Formal Verification in a Component-Based Reuse Methodology.  |
ISSS  |
2002 |
DBLP DOI BibTeX RDF |
model checking, formal verification, reuse, IP, timed petri-nets |
| 3 | Kanji Hirabayashi |
An Algebraic Approach to Formal Verification of Microprocessors.  |
J. Electronic Testing  |
2001 |
DBLP DOI BibTeX RDF |
formal verification, microprocessor |
| 3 | Yonit Kesten, Amir Pnueli |
Control and Data Abstraction: The Cornerstones of Practical Formal Verification.  |
STTT  |
2000 |
DBLP DOI BibTeX RDF |
Control abstraction, Safety and liveness property, Weak and strong fairness, Model checking, Formal verification, Data abstraction, Linear temporal logic, Network invariant |
| 3 | Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube |
Formal Verification for Microprocessors with Extendable Instruction Set.  |
ASAP  |
2000 |
DBLP DOI BibTeX RDF |
reconfigurable processor architecture, abstraction techniques, formal verification, pipeline processor |
| 3 | Pao-Ann Hsiung, Farn Wang, Ruey-Cheng Chen |
On the verification of Wireless Transaction Protocol using SGM and RED.  |
RTCSA  |
2000 |
DBLP DOI BibTeX RDF |
Wireless Transaction Protocol verification, SGM, process concurrency, clock variables, discrete variables, intelligent permutation, explosion factors, scalable verification, State-Graph Manipulators, world standard, large clock constants, large discrete constants, Region Encoding Diagram, state-space size explosions, WTP verification, real time systems, protocols, data structures, data structures, formal verification, formal verification, mobile communication, Wireless Application Protocol, state spaces, RED, state-space methods, reduction techniques |
| 3 | Axel Dold, Vincent Vialard |
Formal Verification of a Compiler Back-End Generic Checker Program.  |
Ershov Memorial Conference  |
1999 |
DBLP DOI BibTeX RDF |
checker-based program verification, generic specification, formal verification |
| 3 | Kanji Hirabayashi |
A Method of Formal Verification of Cryptographic Circuits.  |
J. Electronic Testing  |
1998 |
DBLP DOI BibTeX RDF |
formal verification, encryption, decryption |
| 3 | Franz Regensburger, Aenne Barnard |
Formal Verification of SDL Systems at the Siemens Mobile Phone Department.  |
TACAS  |
1998 |
DBLP DOI BibTeX RDF |
telecommunication protocols, model checking, formal verification, SDL |
| 3 | Sreeranga P. Rajan, Masahiro Fujita |
Integration of High-Level Modeling, Formal Verification, and High-Level Synthesis in ATM Switch Design.  |
VLSI Design  |
1998 |
DBLP DOI BibTeX RDF |
Modeling, Formal Verification, ATM, Validation, High-Level Synthesis, VHDL |
| 3 | Axel Dold, Friedrich W. von Henke, Holger Pfeifer, Harald Rueß |
Formal Verification of Transformations for Peephole Optimization.  |
FME  |
1997 |
DBLP DOI BibTeX RDF |
reusability of specifications, formal verification, transformations, higher-order logic |
| 3 | Boutheina Chetali, Barbara Heyd |
Formal Verification of Concurrent Programs in LP and in COQ: A Comparative Analysis.  |
TPHOLs  |
1997 |
DBLP DOI BibTeX RDF |
theorem prover methodology, Larch Prover, Computer Checked Proof, Formal Verification, Unity, Coq |
| 3 | Kazuo Kawakubo, Koji Tanaka, Hiromi Hiraishi |
Formal Verification Of Self-Testing Properties Of Combinational Circuits.  |
Asian Test Symposium  |
1996 |
DBLP DOI BibTeX RDF |
self-testing properties, logic function manipulation, decision function, output code words, self-checking logic, mutiple-input multiple-output circuit, fault tolerance, formal verification, combinational circuits, combinational circuits, binary decision diagrams, stuck-at faults, satisfiability problem, characteristic functions, Berger code |
| 3 | S. Yamane |
The verification technique of real-time systems using probabilities.  |
RTCSA  |
1996 |
DBLP DOI BibTeX RDF |
performance properties, dense time model, dense time statecharts, automatic verification method, dense time model checking, real-time systems, reliability, formal specification, formal verification, formal verification, temporal logic, probabilities, verification technique |
| 3 | Jianying Zhou, Dieter Gollmann |
A Fair Non-repudiation Protocol.  |
IEEE Symposium on Security and Privacy  |
1996 |
DBLP DOI BibTeX RDF |
fair nonrepudiation protocol, message sender, message receiver, cryptography, protocols, formal verification, formal verification, encryption, trusted third party |
| 3 | H. Samsom, Frank H. M. Franssen, Francky Catthoor, Hugo De Man |
System level verification of video and image processing specifications.  |
ISSS  |
1995 |
DBLP DOI BibTeX RDF |
formal verification method, front-end telecom, image processing specifications, loop ordering, system level verification, computational complexity, image processing, complexity, formal specification, formal verification, video processing, numerical computing |
| 3 | Anand Chavan, Shiu-Kai Chin, Shahid Ikram, Jang Dae Kim, Juin-Yeu Zu |
Extending VLSI design with higher-order logic. (PDF / PS)  |
ICCD  |
1995 |
DBLP DOI BibTeX RDF |
Cambridge Higher-Order Logic theorem-prover, microprogram sequencer, Am2910, VLSI, formal verification, formal verification, logic testing, theorem proving, logic design, logic CAD, VLSI design, higher-order logic, theorem-prover, design environment, instruction-set architecture, VLSI CAD |
| 3 | Gitanjali Swamy, Robert K. Brayton, Vigyan Singhal |
Incremental methods for FSM traversal. (PDF / PS)  |
ICCD  |
1995 |
DBLP DOI BibTeX RDF |
FSM traversal, formal verification, formal verification, finite state machines, finite state machine, logic design, directed graphs, logic CAD, incremental algorithms, digital systems, reachable states, incremental methods |
| 3 | Ramesh Achuthan, Vangalur S. Alagar, Thiruvengadam Radhakrishnan |
An object-oriented modeling of real-time robotic assembly system.  |
ICECCS  |
1995 |
DBLP DOI BibTeX RDF |
maintenance engineering, industrial manipulators, real-time robotic assembly system, object-oriented-formal modeling, independent components, modular components, real-time systems, formal verification, formal verification, validation, system design, object-oriented methods, system model, manipulators, assembling, reusable components, system requirements, system maintenance, control system CAD, control engineering |
| 3 | K. Brink, L. J. G. Bun, Jan van Katwijk, W. J. Toetenel |
Hybrid specification of control systems.  |
ICECCS  |
1995 |
DBLP DOI BibTeX RDF |
control system development, hybrid specification, formal software specification language, multidisciplinary development, control models, ASTRAL specifications, MatLab software packages, discrete subsystems, continuous subsystems, robot control system, continuous system models, simulation, simulation, formal specification, robots, formal verification, formal verification, specification languages, specification language, control theory, control theory, system behavior, control system CAD, discrete time systems, continuous time systems |
| 3 | Paul Curzon, I. M. Leslie |
A case study on design for provability.  |
ICECCS  |
1995 |
DBLP DOI BibTeX RDF |
design for provability, verification task, ATM network switch, formal specification, formal specification, formal verification, formal verification, switching fabric |
| 3 | Wolfgang A. Halang, Bernd J. Krämer |
Safety Assurance in Process Control.  |
IEEE Software  |
1994 |
DBLP DOI BibTeX RDF |
safety assurance, PLC software safety, safety-critical control, algebraic language, Obj3 system, functional programming environment, formal specification, formal specifications, formal verification, formal verification, functional programming, software reliability, safety, interpreter, requirements specification, process control, data representation, programmable logic controllers, programmable controllers, design specification, specification testing, Obj, function blocks, process computer control |
| 3 | John M. Rushby, Friedrich W. von Henke |
Formal Verification of Algorithms for Critical Systems.  |
IEEE Trans. Software Eng.  |
1993 |
DBLP DOI BibTeX RDF |
machine-checked verification, Byzantine fault-tolerant algorithm, digital flight control system, fault-tolerant synchronization, EHDM system, formal specification, formal specification, formal verification, fault tolerant computing, software reliability, safety, synchronisation, critical systems |
| 2 | Petros Papapanagiotou, Jacques D. Fleuriot |
Formal Verification of Web Services Composition Using Linear Logic and the pi-calculus.  |
ECOWS  |
2011 |
DBLP DOI BibTeX RDF |
proofs-as-processes, Web Services, formal verification, theorem proving, services composition |
| 2 | Vatche Ishakian, Andrei Lapets, Azer Bestavros, Assaf J. Kfoury |
Formal Verification of SLA Transformations.  |
SERVICES  |
2011 |
DBLP DOI BibTeX RDF |
Formal Verification, Cloud Computing, Service Level Agreements |
| 2 | Fulvio Corno, Muhammad Sanaullah |
Formal Verification of Device State Chart Models.  |
Intelligent Environments  |
2011 |
DBLP DOI BibTeX RDF |
Model Checking, Formal Verification, Smart Home, Intelligent Environment, State Charts |
| 2 | Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha |
Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
power intent verification, formal verification, assertion |
| 2 | Min Yuan, Zhiqiu Huang, Xiang Li, Yan Yan |
Towards a Formal Verification Approach for Business Process Coordination.  |
ICWS  |
2010 |
DBLP DOI BibTeX RDF |
multi-business, WS-TX, model checking, formal verification, coordination |
| 2 | Ella Rabinovich, Opher Etzion, Sitvanit Ruah, Sarit Archushin |
Analyzing the behavior of event processing applications.  |
DEBS  |
2010 |
DBLP DOI BibTeX RDF |
model checking, formal verification, static analysis, dynamic analysis, event processing, event processing network |
| 2 | Xavier Leroy |
Formal verification of a realistic compiler.  |
Commun. ACM  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Mark A. Hillebrand, Sergey Tverdyshev |
Formal Verification of Gate-Level Computer Systems.  |
CSR  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | André Platzer, Jan-David Quesel |
European Train Control System: A Case Study in Formal Verification.  |
ICFEM  |
2009 |
DBLP DOI BibTeX RDF |
formal verification of hybrid systems, train control, parameter constraint identification, theorem proving, disturbances |
| 2 | Gerwin Klein, Kevin Elphinstone, Gernot Heiser, June Andronick, David Cock, Philip Derrin, Dhammika Elkaduwe, Kai Engelhardt, Rafal Kolanski, Michael Norrish, Thomas Sewell, Harvey Tuch, Simon Winwood |
seL4: formal verification of an OS kernel.  |
SOSP  |
2009 |
DBLP DOI BibTeX RDF |
l4, sel4, microkernel, isabelle/hol |
| 2 | Hong Liu, David P. Gluch |
Formal verification of AADL behavior models: a feasibility investigation.  |
ACM Southeast Regional Conference  |
2009 |
DBLP DOI BibTeX RDF |
architecture analysis & design language, model checking, tool integration, computational tree logic |
| 2 | Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Yang |
Formal Verification for High-Assurance Behavioral Synthesis.  |
ATVA  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Bernard Berthomieu, Jean-Paul Bodeveix, Christelle Chaudet, Silvano Dal-Zilio, Mamoun Filali, François Vernadat |
Formal Verification of AADL Specifications in the Topcased Environment.  |
Ada-Europe  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Thang H. Bui, Albert Nymeyer |
Formal Verification Based on Guided Random Walks.  |
IFM  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Christoph Baumann, Bernhard Beckert, Holger Blasum, Thorsten Bormer |
Formal Verification of a Microkernel Used in Dependable Software Systems.  |
SAFECOMP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Bing Li, Chris Ka-Kei Kwok |
Automatic formal verification of clock domain crossing signals.  |
ASP-DAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Marek Paska |
Generative programming with support for formal verification.  |
SIES  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | André Platzer, Edmund M. Clarke |
Formal Verification of Curved Flight Collision Avoidance Maneuvers: A Case Study.  |
FM  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Roope Kaivola, Rajnish Ghughal, Naren Narasimhan, Amber Telfer, Jesse Whittemore, Sudhindra Pandav, Anna Slobodová, Christopher Taylor, Vladimir Frolov, Erik Reeber, Armaghan Naik |
Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation.  |
CAV  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Rafael H. Bordini, Michael Fisher, Maarten Sierhuis |
Formal verification of human-robot teamwork.  |
HRI  |
2009 |
DBLP DOI BibTeX RDF |
verification, teamwork, agent-based modelling |
| 2 | Kenichi Yajima, Shoichi Morimoto, Daisuke Horie, Noor Sheila Azreen, Yuichi Goto, Jingde Cheng |
FORVEST: A Support Tool for Formal Verification of Security Specifications with ISO/IEC 15408.  |
ARES  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Ganesh Gopalakrishnan, Robert M. Kirby |
Practical Formal Verification of MPI and Thread Programs.  |
PVM/MPI  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Ganesh Gopalakrishnan, Robert M. Kirby, Rajeev Thakur |
Formal verification of practical MPI programs.  |
PPOPP  |
2009 |
DBLP DOI BibTeX RDF |
dynamic partial order reduction, model checking, message passing interface, distributed programming, mpi |
| 2 | Pankaj Chauhan, Deepak Goyal, Gagan Hasteer, Anmol Mathur, Nikhil Sharma |
Non-cycle-accurate sequential equivalence checking.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
unit product machine, model checking, formal verification, high level synthesis, sequential equivalence checking |
| 2 | Daniel Große, Robert Wille, Ulrich Kühne, Rolf Drechsler |
Contradictory antecedent debugging in bounded model checking.  |
ACM Great Lakes Symposium on VLSI  |
2009 |
DBLP DOI BibTeX RDF |
formal verification, debugging, bounded model checking, psl |
| 2 | Mohamed Wassim Trojet, Claudia S. Frydman, Maâmar El-Amine Hamri |
Practical application of "lightweight" Z in DEVS framework.  |
SpringSim  |
2009 |
DBLP DOI BibTeX RDF |
formal verification, DEVS, lightweight formal methods, Z specification |
| 2 | Jameleddine Hassine, Juergen Rilling, Rachida Dssouli |
Use Case Maps as a property specification language.  |
Software and System Modeling  |
2009 |
DBLP DOI BibTeX RDF |
Temporal and architectural scope, Formal verification, Temporal logic, Use Case Maps, Property specification |
| 2 | Somesh Jha, Ninghui Li, Mahesh V. Tripunitara, Qihua Wang, William H. Winsborough |
Towards Formal Verification of Role-Based Access Control Policies.  |
IEEE Trans. Dependable Sec. Comput.  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Laurence Rideau, Bernard P. Serpette, Xavier Leroy |
Tilting at Windmills with Coq: Formal Verification of a Compilation Algorithm for Parallel Moves.  |
J. Autom. Reasoning  |
2008 |
DBLP DOI BibTeX RDF |
Parallel move, Parallel assignment, The Coq proof assistant, Compilation, Compiler correctness |
| 2 | Xavier Leroy, Sandrine Blazy |
Formal Verification of a C-like Memory Model and Its Uses for Verifying Program Transformations.  |
J. Autom. Reasoning  |
2008 |
DBLP DOI BibTeX RDF |
The Coq proof assistant, Compilation, C, Program verification, Memory model, Compiler correctness |
| 2 | Sebastian Kinder, Rolf Drechsler |
Modeling and proving functional completeness in formal verification of counting heads.  |
STTT  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Shoichi Morimoto |
A Survey of Formal Verification for Business Process Modeling.  |
ICCS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Anna Slobodová |
Formal Verification of Hardware Support for Advanced Encryption Standard.  |
FMCAD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Jan Peleska |
A Unified Approach to Abstract Interpretation, Formal Verification and Testing of C/C++ Modules.  |
ICTAC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Wan Fokkink, Paul Klint, Bert Lisser, Yaroslav S. Usenko |
Towards Formal Verification of ToolBusScripts.  |
AMAST  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Erzsébet Németh, Tamás Bartha |
Formal Verification of Safety Functions by Reinterpretation of Functional Block Based Specifications.  |
FMICS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | David L. Dill |
Formal Verification and Biology.  |
ATVA  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Abhishek Datta, Vigyan Singhal |
Formal Verification of a Public-Domain DDR2 Controller Design.  |
VLSI Design  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Yanyan Gao, Xi Li |
Formal Verification of Bypassed Processor Pipelines.  |
ICYCS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Katharina Weinberger, Slava Bulach, Robert Bosch |
Application of Workflow Petri Nets to Modeling of Formal Verification Processes in Design Flow of Digital Integrated Circuits.  |
DATE  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Thomas Abdoul, Joël Champeau, Philippe Dhaussy, Pierre Yves Pillain, Jean-Charles Roger |
AADL Execution Semantics Transformation for Formal Verification.  |
ICECCS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Eugene Goldberg |
On Bridging Simulation and Formal Verification.  |
VMCAI  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Hocine El-Habib Daho, Djilali Benhamamouch |
Formal Verification of ASM Models Using TLA+.  |
ABZ  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | K. E. Kennedy |
A concurrent automatic programming system.  |
ACM Southeast Regional Conference  |
2008 |
DBLP DOI BibTeX RDF |
formal verification, automatic programming, colored petri net, concurrent computing |
| 2 | Zhi Yang, Guangsheng Ma, Shu Zhang |
A Novel Approach to High-Level Property Checking Using Wu's Method.  |
DELTA  |
2008 |
DBLP DOI BibTeX RDF |
Wu's method, formal verification, high-level design, property checking |
| 2 | Emmanuel Zarpas, Cindy Eisner, Sivan Tal |
Policy Validation for System Automation: A Case Study.  |
POLICY  |
2008 |
DBLP DOI BibTeX RDF |
Tivoli, TSA, formal verification, validation, policy, PSL |
| 2 | Harry Foster |
Assertion-Based Verification: Industry Myths to Realities (Invited Tutorial).  |
CAV  |
2008 |
DBLP DOI BibTeX RDF |
Simulation, Formal Verification, Debugging, Assertion, Functional Verification, Property Specification, Assertion-Based Verification |
| 2 | Gaurav Singh, Sandeep K. Shukla |
Verifying Compiler Based Refinement of BluespecTM.  |
SPIN  |
2008 |
DBLP DOI BibTeX RDF |
Bluespec System Verilog (BSV), Formal Verification, Hardware Designs, SPIN Model Checker |
| 2 | Jewgenij Botaschanjan, Manfred Broy, Alexander Gruler, Alexander Harhurin, Steffen Knapp, Leonid Kof, Wolfgang J. Paul, Maria Spichkova |
On the correctness of upper layers of automotive systems.  |
Formal Asp. Comput.  |
2008 |
DBLP DOI BibTeX RDF |
Time-triggered systems, Formal verification, Model-based development, Automotive software |
| 2 | Yann Thierry-Mieg, Lom-Messan Hillah |
UML behavioral consistency checking using instantiable Petri nets.  |
ISSE  |
2008 |
DBLP DOI BibTeX RDF |
Behavioral consistency, Model checking, UML, Petri nets, Formal verification |
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