Search results for "Gabriela Nicolescu"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Jelena Trajkovic, Samar Abdi, Gabriela Nicolescu, Daniel D. Gajski	Automated Generation of Custom Processor Core from C Code.	J. Electrical and Computer Engineering	2012	DBLP DOI BibTeX RDF
1	Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Maimouna Amadou, Gabriela Nicolescu	Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method.	JETC	2011	DBLP DOI BibTeX RDF
1	Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu	Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC).	VLSI-SoC	2011	DBLP DOI BibTeX RDF
1	Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid, Ian O'Connor	Multi-granularity thermal evaluation of 3D MPSoC architectures.	DATE	2011	DBLP BibTeX RDF
1	Giovanni Beltrame, Gabriela Nicolescu	A multi-objective decision-theoretic exploration algorithm for platform-based design.	DATE	2011	DBLP DOI BibTeX RDF
1	Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin	Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology.	DATE	2011	DBLP BibTeX RDF
1	Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid	A linear-time approach for the transient thermal simulation of liquid-cooled 3d ics.	CODES+ISSS	2011	DBLP DOI BibTeX RDF
1	Sébastien Le Beux, Guy Bois, Gabriela Nicolescu, Youcef Bouchebaba, Michel Langevin, Pierre G. Paulin	Combining mapping and partitioning exploration for NoC-based embedded systems.	Journal of Systems Architecture - Embedded Systems Design	2010	DBLP DOI BibTeX RDF
1	Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin	Multi-Optical Network-on-Chip for Large Scale MPSoC.	Embedded Systems Letters	2010	DBLP DOI BibTeX RDF
1	Youcef Bouchebaba, Pierre G. Paulin, A. E. Ozcan, Bruno Lavigueur, Michel Langevin, Olivier Benny, Gabriela Nicolescu	MpAssign: A framework for solving the many-core platform mapping problem.	International Symposium on Rapid System Prototyping	2010	DBLP DOI BibTeX RDF
1	Bruno Girodias, Luiza Gheorghe, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Michel Langevin, Pierre G. Paulin	Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip.	International Symposium on Rapid System Prototyping	2010	DBLP DOI BibTeX RDF
1	Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin	A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Ahmed Azzabi, El Mostapha Aboulhamid, Gabriela Nicolescu	Timing verification of cyclic systems based on temporal constraint analysis.	ICECS	2010	DBLP DOI BibTeX RDF
1	Luiza Gheorghe Iugan, Gabriela Nicolescu, Ian O'Connor	Modeling and Formal Verification of a Passive Optical Network on Chip Behavior.	ECEASST	2009	DBLP BibTeX RDF
1	Gabriela Nicolescu, Didier Buchs	Rapid systems prototyping at RSP'06.	Microelectronics Journal	2009	DBLP DOI BibTeX RDF
1	Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur	Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications.	Signal Processing Systems	2009	DBLP DOI BibTeX RDF	Multiprocessors System on Chip (MPSoC), Optimizations, Multimedia, Parallelism, Memory, Multi-threading
1	Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu	Emerging Technologies and Nanoscale Computing Fabrics.	VLSI-SoC	2009	DBLP DOI BibTeX RDF
1	Victorino Sanz, Shafagh Jafer, Gabriel A. Wainer, Gabriela Nicolescu, Alfonso Urquia, Sebastián Dormido	Hybrid modeling of opto-electrical interfaces using DEVS and modelica.	SpringSim	2009	DBLP DOI BibTeX RDF	opto-electrical systems, DEVS, CD++, modelica
1	Alain Fourmigue, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid	Co-simulation based platform for wireless protocols design explorations.	DATE	2009	DBLP BibTeX RDF
1	Ahmed Amine Jerraya, Gabriela Nicolescu	Embedded tutorial - Understanding multicore technologies.	DATE	2009	DBLP BibTeX RDF
1	Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb	Semantics for Model-Based Validation of Continuous/Discrete Systems.	DATE	2008	DBLP DOI BibTeX RDF
1	Simon Schliecker, Mircea Negrean, Gabriela Nicolescu, Pierre G. Paulin, Rolf Ernst	Reliable performance analysis of a multicore multithreaded system-on-chip.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	performance analysis, case study, multiprocessor, shared memory
1	Faouzi Bouchhima, Gabriela Nicolescu, El Mostapha Aboulhamid, Mohamed Abid	Generic discrete-continuous simulation model for accurate validation in heterogeneous systems design.	Microelectronics Journal	2007	DBLP DOI BibTeX RDF
1	Youcef Bouchebaba, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid, Bruno Lavigueur, Pierre G. Paulin	MPSoC memory optimization using program transformation.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	embedded systems, data cache, Data locality, compiler transformations
1	Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid	Buffer and Register Allocation for Memory Space Optimization.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	program transformation, memory hierarchy, data locality, memory optimization
1	Youcef Bouchebaba, Bruno Lavigueur, Bruno Girodias, Gabriela Nicolescu, Pierre G. Paulin	MPSoC memory optimization for digital camera applications.	DSD	2007	DBLP DOI BibTeX RDF
1	Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb	A formalization of global simulation models for continuous/discrete systems.	SCSC	2007	DBLP DOI BibTeX RDF	continuous/discrete simulation, heterogeneous systems, co-simulation, formal representation
1	Youcef Bouchebaba, Essaid Bensoudane, Bruno Lavigueur, Pierre G. Paulin, Gabriela Nicolescu	Two-level tiling for MPSoC architecture.	ASAP	2007	DBLP DOI BibTeX RDF
1	Matthieu Briere, Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, Fabien Mieyeville, Frédéric Gaffiot, Ian O'Connor	System level assessment of an optical NoC in an MPSoC platform.	DATE	2007	DBLP DOI BibTeX RDF
1	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu	A new efficient EDA tool design methodology.	ACM Trans. Embedded Comput. Syst.	2006	DBLP DOI BibTeX RDF	Net Framework, C?, ESys.Net, attribute programming, embedded systems, SoC, VHDL, SystemC, modeling and simulation, CoDesign
1	Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Damien Lyonnard, Olivier Benny, Bruno Lavigueur, David Lo, Giovanni Beltrame, V. Gagne, Gabriela Nicolescu	Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur	Application-Level Memory Optimization for MPSoC.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
1	Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb	Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
1	Bruno Girodias, El Mostapha Aboulhamid, Gabriela Nicolescu	A Platform for Refinement of OS Services for Embedded Systems.	DELTA	2006	DBLP DOI BibTeX RDF
1	Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Fabien Coelho	Buffer and register allocation for memory space optimization.	ASAP	2006	DBLP DOI BibTeX RDF
1	Nasreddine Hireche, J. M. Pierre Langlois, Gabriela Nicolescu	Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research.	CCECE	2006	DBLP DOI BibTeX RDF
1	N. Ignat, B. Nicolescu, Yvon Savaria, Gabriela Nicolescu	Soft-error classification and impact analysis on real-time operating systems.	DATE	2006	DBLP DOI BibTeX RDF
1	Faouzi Bouchhima, Gabriela Nicolescu, El Mostapha Aboulhamid, Mohamed Abid	Discrete-Continuous Simulation Model for Accurate Validation in Component-Based Heterogeneous SoC Design.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
1	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu	Leveraging Model Representations for System Level Design Tools.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
1	Luiza Gheorghe, Gabriela Nicolescu	MP SoCs Including Optical Interconnect. Technological Progresses and Challenges for CAD Tools Design.	IWSOC	2005	DBLP DOI BibTeX RDF
1	Robert Grou-Szabo, Hany Ghattas, Yvon Savaria, Gabriela Nicolescu	Component-Based Methodology for Hardware Design of a Dataflow Processing Network.	IWSOC	2005	DBLP DOI BibTeX RDF
1	Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Ahmed Amine Jerraya	Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits.	Journal of Systems and Software	2004	DBLP DOI BibTeX RDF
1	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois	.NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation.	DATE	2004	DBLP DOI BibTeX RDF
1	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois	ESys.Net: a new solution for embedded systems modeling and simulation.	LCTES	2004	DBLP DOI BibTeX RDF	CIL, ESys.Net, attribute programming, component-based programming, simulation, Java, modeling, embedded systems, C++, framework, system on chip, VHDL, SystemC, hardware/software codesign, C#, Net, Verilog, HDLs, SystemVerilog
1	Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Gabriela Nicolescu	Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	system-on-chip, embedded software, multi-processor systems
1	Gabriela Nicolescu, Kjetil Svarstad, Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Philippe Coste, Ahmed Amine Jerraya	Desiderata pour la spécification et la conception des systèmes électroniques.	Technique et Science Informatiques	2002	DBLP BibTeX RDF
1	Wander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava	Multiprocessor SoC Platforms: A Component-Based Design Approach.	IEEE Design & Test of Computers	2002	DBLP DOI BibTeX RDF
1	Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava	Component-based design approach for multicore SoCs.	DAC	2002	DBLP DOI BibTeX RDF	HW/SW interfaces abstraction, multicore System-on-Chip, component-based design
1	Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu	Validation in a Component-Based Design Flow for Multicore SoCs.	ISSS	2002	DBLP DOI BibTeX RDF	validation, SoC, abstraction levels, component-based design, cosimulation
1	Gabriela Nicolescu, S. Martinez, Lobna Kriaa, Wassim Youssef, Sungjoo Yoo, Benoît Charlot, Ahmed Amine Jerraya	Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design.	VLSI Design	2002	DBLP DOI BibTeX RDF	heterogeneous systems design, MOEMS, cosimulation
1	Sungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya	Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design.	DATE	2002	DBLP DOI BibTeX RDF
1	Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya	Colif: A Design Representation for Application-Specific Multiprocessor SOCs.	IEEE Design & Test of Computers	2001	DBLP DOI BibTeX RDF
1	Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya	Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
1	Patrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya	Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures.	ASP-DAC	2001	DBLP DOI BibTeX RDF
1	Kjetil Svarstad, Nezih Ben-Fredj, Gabriela Nicolescu, Ahmed Amine Jerraya	A higher level system communication model for object-oriented specification and design of embedded systems.	ASP-DAC	2001	DBLP DOI BibTeX RDF	CORBA
1	Kjetil Svarstad, Gabriela Nicolescu, Ahmed Amine Jerraya	A model for describing communication between aggregate objects in the specification and design of embedded systems.	DATE	2001	DBLP DOI BibTeX RDF
1	Gabriela Nicolescu, Sungjoo Yoo, Ahmed Amine Jerraya	Mixed-level cosimulation for fine gradual refinement of communication in SoC design.	DATE	2001	DBLP DOI BibTeX RDF
1	Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya	A generic wrapper architecture for multi-processor SoC cosimulation and design.	CODES	2001	DBLP DOI BibTeX RDF
1	Fabiano Hessel, Pascal Coste, Philippe Le Marrec, Nacer-Eddine Zergainoh, Gabriela Nicolescu, Jean-Marc Daveau, Ahmed Amine Jerraya	Interlanguage Communication Synthesis for Heterogeneous Specifications.	Design Autom. for Emb. Sys.	2000	DBLP DOI BibTeX RDF
1	Salvador Mir, Benoît Charlot, Gabriela Nicolescu, Philippe Coste, Fabien Parrain, Nacer-Eddine Zergainoh, Bernard Courtois, Ahmed Amine Jerraya, Márta Rencz	Towards design and validation of mixed-technology SOCs.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF	design, verification, MEMS, SOCs, architecture exploration, HDLs, cosimulation
1	Fabiano Hessel, Philippe Coste, Gabriela Nicolescu, P. LeMarrec, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya	Multi-Level Communication Synthesis of Heterogeneous Multilanguage Specification. (PDF / PS)	ICCD	2000	DBLP DOI BibTeX RDF	Multilanguage, Codesign, Communication Synthesis

Publications of "Gabriela Nicolescu" ( http://dblp.L3S.de/Authors/Gabriela_Nicolescu )