| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi |
Improving Ariadne's Bundle by Following Multiple Threads in Abstraction Refinement.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi |
Compositional SCC Analysis for Language Emptiness. |
Formal Methods in System Design |
2006 |
DBLP DOI BibTeX RDF |
language emptiness, model checking, BDD, LTL, abstraction refinement |
| 1 | Gary D. Hachtel, Fabio Somenzi |
Logic synthesis and verification algorithms. |
|
2006 |
DOI RDF |
|
| 1 | Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi |
Refining the SAT decision ordering for bounded model checking. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
decision heuristic, SAT, bounded model checking |
| 1 | Chao Wang, Gary D. Hachtel, Fabio Somenzi |
Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao Wang, Gary D. Hachtel, Fabio Somenzi |
The Compositional Far Side of Image Computation. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
Model checking, Binary Decision Diagrams, Symbolic, image computation |
| 1 | Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi |
Improving Ariadneýs Bundle by Following Multiple Threads in Abstraction Refinement. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao Wang, Gary D. Hachtel |
Sharp Disjunctive Decomposition for Language Emptiness Checking. |
FMCAD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi |
Divide and Compose: SCC Refinement for Language Emptiness. |
CONCUR |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | In-Ho Moon, Gary D. Hachtel, Fabio Somenzi |
Border-Block Triangular Form and Conjunction Schedule in Image Computation. |
FMCAD |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Jae-Young Jang, In-Ho Moon, Gary D. Hachtel |
Iterative Abstraction-Based CTL Model Checking. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Abelardo Pardo, Gary D. Hachtel |
Incremental CTL Model Checking Using BDD Subsetting. |
DAC |
1998 |
DBLP DOI BibTeX RDF |
transceiver, spread spectrum communication, RF CMOS, digital radio, ISM frequency band |
| 1 | In-Ho Moon, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi, Jun Yuan, Carl Pixley |
Approximate reachability don't cares for CTL model checking. |
ICCAD |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi |
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Fabio Somenzi |
A Symbolic Algorithms for Maximum Flow in 0-1 Networks. |
Formal Methods in System Design |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi |
Algebraic Decision Diagrams and Their Applications. |
Formal Methods in System Design |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Abelardo Pardo, Gary D. Hachtel |
Automatic Abstraction Techniques for Propositional µ-calculus Model Checking. |
CAV |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi |
Automatic state space decomposition for approximate FSM traversal based on circuit analysis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi |
Algorithms for approximate FSM traversal based on state space decomposition. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi |
Markovian analysis of large finite state machines. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Fabio Somenzi |
Logic synthesis and verification algorithms. |
|
1996 |
RDF |
|
| 1 | R. Iris Bahar, M. Burns, Gary D. Hachtel, Enrico Macii, H. Shin, Fabio Somenzi |
Symbolic computation of logic implications for technology-dependent low-power synthesis. |
ISLPED |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Kavita Ravi, Abelardo Pardo, Gary D. Hachtel, Fabio Somenzi |
Modular Verification of Multipliers. |
FMCAD |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa |
VIS. |
FMCAD |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa |
VIS: A System for Verification and Synthesis. |
CAV |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Woohyuk Lee, Abelardo Pardo, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi |
Tearing based automatic abstraction for CTL model checking. |
ICCAD |
1996 |
DBLP DOI BibTeX RDF |
ACTL model checking, CTL model checking, conservative ECTL, lattice set, lower bound approximations, pseudo-optimal shortest path, resolution methods, tearing based automatic abstraction, upper bound approximations, formal verification, reactive system, bipartition |
| 1 | Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Peter Feldmann, Gary D. Hachtel, Fabio Somenzi |
CMOS dynamic power estimation based on collapsible current source transistor modeling. |
ISLPD |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino |
Computing the Maximum Power Cycles of a Sequential Circuit. |
DAC |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi, Reily M. Jacoby |
Exact and heuristic algorithms for the minimization of incompletely specified state machines. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel |
Exact calculation of synchronizing sequences based on binary decision diagrams. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms. |
Formal Methods in System Design |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi |
A State Space Decomposition Algorithm for Approximate FSM Traversal. |
EDAC-ETC-EUROASIC |
1994 |
DBLP BibTeX RDF |
|
| 1 | R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi |
Timing Analysis of Combinational Circuits using ADD's. |
EDAC-ETC-EUROASIC |
1994 |
DBLP BibTeX RDF |
|
| 1 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi |
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine. |
EDAC-ETC-EUROASIC |
1994 |
DBLP BibTeX RDF |
|
| 1 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi |
Probabilistic Analysis of Large Finite State Machines. |
DAC |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Iris Bahar, Gary D. Hachtel, Enrico Macii, Fabio Somenzi |
A symbolic method to reduce power consumption of circuits containing false paths. |
ICCAD |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Mariano Hermida de la Rica, Abelardo Pardo, Massimo Poncino, Fabio Somenzi |
Re-encoding sequential circuits to reduce power dissipation. |
ICCAD |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi |
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis. |
ICCD |
1994 |
DBLP BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi |
Algorithms for Approximate FSM Traversal. |
DAC |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi |
Algebraic decision diagrams and their applications. |
ICCAD |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Fabio Somenzi |
A symbolic algorithm for maximum flow in 0-1 networks. |
ICCAD |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Reily M. Jacoby, Kurt Keutzer, Christopher R. Morrison |
On properties of algebraic transformations and the synthesis of multifault-irredundant circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel |
Exact Calculation of Synchronization Sequences Based on Binary Decision Diagrams. |
DAC |
1992 |
DBLP BibTeX RDF |
|
| 1 | Xuejun Du, Gary D. Hachtel, Bill Lin, A. Richard Newton |
MUSE: a multilevel symbolic encoding algorithm for state assignment. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1991 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
Fast Sequential ATPG Based on Implicit State Enumeration. |
ITC |
1991 |
DBLP DOI BibTeX RDF |
|
| 1 | June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi |
Don't Care Sequences and the Optimization of Interacting Finite State Machines. |
ICCAD |
1991 |
DBLP BibTeX RDF |
|
| 1 | Seon-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
Variable Ordering and Selection for FSM Traversal. |
ICCAD |
1991 |
DBLP BibTeX RDF |
|
| 1 | Seh-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi |
Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms. |
ICCAD |
1991 |
DBLP BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
Redundancy Identification and Removal Based on Implicit State Enumeration. |
ICCD |
1991 |
DBLP BibTeX RDF |
|
| 1 | Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi |
ATPG Aspects of FSM Verification. |
ICCAD |
1990 |
DBLP BibTeX RDF |
|
| 1 | Gary D. Hachtel, Christopher R. Morrison |
Linear complexity algorithms for hierarchical routing. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1989 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, Reily M. Jacoby |
Verification algorithms for VLSI synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1988 |
DBLP DOI BibTeX RDF |
|
| 1 | Karen A. Bartlett, Robert K. Brayton, Gary D. Hachtel, Reily M. Jacoby, Christopher R. Morrison, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang |
Multi-level logic minimization using implicit don't cares. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1988 |
DBLP DOI BibTeX RDF |
|
| 1 | Karen A. Bartlett, William W. Cohen, Aart J. de Geus, Gary D. Hachtel |
Synthesis and Optimization of Multilevel Logic under Timing Constraints. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1986 |
DBLP DOI BibTeX RDF |
|
| 1 | David Gregory, Karen A. Bartlett, Aart J. de Geus, Gary D. Hachtel |
SOCRATES: a system for automatically synthesizing and optimizing combinational logic. |
DAC |
1986 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael R. Lightner, Gary D. Hachtel, Richard H. Byrd, Michel Heydemann |
A Theory and Algorithmic Frame for Switch Level Simulation. |
IMACS European Simulation Meeting |
1984 |
DBLP BibTeX RDF |
|
| 1 | Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
An Algorithm for Optimal PLA Folding. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1982 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael R. Lightner, Gary D. Hachtel |
Implication algorithms for MOS switch level functional macromodeling implication and testing. |
DAC |
1982 |
DBLP DOI BibTeX RDF |
|
| 1 | Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
Techniques for programmable logic array folding. |
DAC |
1982 |
DBLP DOI BibTeX RDF |
|
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