| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Juan Luis Jerez, Eric C. Kerrigan, George A. Constantinides |
A sparse and condensed QP formulation for predictive control of LTI systems.  |
Automatica  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides |
Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms.  |
Signal Processing Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Samuel Bayliss, George A. Constantinides |
Optimizing SDRAM bandwidth for custom FPGA loop accelerators.  |
FPGA  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
A scalable approach for automated precision analysis.  |
FPGA  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Abid Rafique, Nachiket Kapre, George A. Constantinides |
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem.  |
ARC  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan You Tan, David Boland, George A. Constantinides |
FPGA Paranoia: Testing Numerical Properties of FPGA Floating Point IP-Cores.  |
ARC  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Amir Shahzad, Bryn Ll. Jones, Eric C. Kerrigan, George A. Constantinides |
An efficient algorithm for the solution of a coupled Sylvester equation appearing in descriptor systems.  |
Automatica  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
Bounding Variable Values and Round-Off Effects Using Handelman Representations.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organization.  |
Comput. J.  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefano Longo, Eric C. Kerrigan, Keck Voon Ling, George A. Constantinides |
A parallel formulation for predictive control with nonuniform hold constraints.  |
Annual Reviews in Control  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
Optimizing memory bandwidth use and performance for matrix-vector multiplication in iterative methods.  |
TRETS  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Adam B. Kinsman, Nicola Nicolici |
Numerical Data Representations for FPGA-Based Scientific Computing.  |
IEEE Design & Test of Computers  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Nicola Nicolici |
Guest Editors' Introduction: Surveying the Landscape of FPGA Accelerator Research.  |
IEEE Design & Test of Computers  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefano Longo, Eric C. Kerrigan, Keck Voon Ling, George A. Constantinides |
Parallel move blocking Model Predictive Control.  |
CDC-ECE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ammar Hasan, Eric C. Kerrigan, George A. Constantinides |
Solving a positive definite system of linear equations via the matrix exponential.  |
CDC-ECE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Luis Jerez, Eric C. Kerrigan, George A. Constantinides |
A condensed and sparse QP formulation for predictive control.  |
CDC-ECE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung |
Health monitoring of live circuits in FPGAs based on time delay measurement (abstract only).  |
FPGA  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Luis Jerez, George A. Constantinides, Eric C. Kerrigan |
An FPGA implementation of a sparse quadratic programming solver for constrained predictive control.  |
FPGA  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Theo Drane, George A. Constantinides |
Optimisation of mutually exclusive arithmetic sum-of-products.  |
DATE  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Samuel Bayliss, George A. Constantinides |
Application Specific Memory Access, Reuse and Reordering for SDRAM.  |
ARC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Christophe Le Lann, David Boland, George A. Constantinides |
The Krawczyk Algorithm: Rigorous Bounds for Linear Equation Solution on an FPGA.  |
ARC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Manouk V. Manoukian, George A. Constantinides |
Accurate Floating Point Arithmetic through Hardware Error-Free Transformations.  |
ARC  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
FPGA Architecture Optimization Using Geometric Programming.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Asma Kahoul, Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
Efficient Heterogeneous Architecture Floorplan Optimization using Analytical Methods.  |
TRETS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Roldao Lopes, George A. Constantinides |
A High Throughput FPGA-Based Floating Point Conjugate Gradient Implementation for Dense Matrices.  |
TRETS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays.  |
TRETS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides |
An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator.  |
TRETS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides |
Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA.  |
FPL  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides |
Customizable Composition and Parameterization of Hardware Design Transformations.  |
DSD  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Luis Jerez, George A. Constantinides, Eric C. Kerrigan |
FPGA implementation of an interior point solver for linear model predictive control.  |
FPT  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Amir Shahzad, Eric C. Kerrigan, George A. Constantinides |
A fast well-conditioned interior point method for predictive control.  |
CDC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ammar Hasan, Eric C. Kerrigan, George A. Constantinides |
An ISS and l-stability approach to forward error analysis of iterative numerical algorithms.  |
CDC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
Automated Precision Analysis: A Polynomial Algebraic Approach.  |
FCCM  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides |
A Scripting Engine for Combining Design Transformations.  |
FCCM  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Roldao Lopes, George A. Constantinides |
A Fused Hybrid Floating-Point and Fixed-Point Dot-Product for FPGAs.  |
ARC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods.  |
ARC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides |
Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA.  |
ARC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung |
Word-length selection for power minimization via nonlinear optimization.  |
ACM Trans. Design Autom. Electr. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
word length, synthesis, signal processing, Power consumption, power consumption, bitwidth |
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems.  |
IET Computers & Digital Techniques  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Vanderlei Bonato, Eduardo Marques, George A. Constantinides |
A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
FPGA, Mobile robotics, SLAM, EKF |
| 1 | Christos-Savvas Bouganis, Sung-Boem Park, George A. Constantinides, Peter Y. K. Cheung |
Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs.  |
TRETS  |
2009 |
DBLP DOI BibTeX RDF |
2D filter design, FPGA, Singular Value Decomposition, reconfigurable logic |
| 1 | Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides |
Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement.  |
TRETS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
Area estimation and optimisation of FPGA routing fabrics.  |
FPL  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, Tim Todman, José Gabriel de Figueiredo Coutinho, Wayne Luk, George A. Constantinides |
Optimising designs by combining model-based and pattern-based transformations.  |
FPL  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Roldao Lopes, Amir Shahzad, George A. Constantinides, Eric C. Kerrigan |
More Flops or More Precision? Accuracy Parameterizable Linear Equation Solvers for Model Predictive Control.  |
FCCM  |
2009 |
DBLP DOI BibTeX RDF |
Solution Linear Systems, FPGA, Iterative Methods, Conjugate Gradient, MPC |
| 1 | Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides |
Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator.  |
ARC  |
2009 |
DBLP DOI BibTeX RDF |
Word-length optimization, FPGA, Multivariate Gaussian Distribution |
| 1 | Asma Kahoul, George A. Constantinides, Alastair M. Smith, Peter Y. K. Cheung |
Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep.  |
ARC  |
2009 |
DBLP DOI BibTeX RDF |
FPGA, Reconfigurable architectures, Floorplanning, integer linear programming (ILP) |
| 1 | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung |
Custom parallel caching schemes for hardware-accelerated image compression.  |
J. Real-Time Image Processing  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
Integrated Floorplanning, Module-Selection, and Architecture Generationfor Reconfigurable Devices.  |
IEEE Trans. VLSI Syst.  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Wai-Kei Mak, Theerayod Wiangtong |
Guest Editorial: Field Programmable Technology.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vanderlei Bonato, Eduardo Marques, George A. Constantinides |
A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection.  |
IEEE Trans. Circuits Syst. Video Techn.  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Boland, George A. Constantinides |
An FPGA-based implementation of the MINRES algorithm.  |
FPL  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework.  |
FPL  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation.  |
BCS Int. Acad. Conf.  |
2008 |
DBLP BibTeX RDF |
|
| 1 | Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung, Alastair M. Smith |
Glitch-aware output switching activity from word-level statistics.  |
ISCAS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vanderlei Bonato, Eduardo Marques, George A. Constantinides |
A Parallel Hardware Architecture for Image Feature Detection.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides |
Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
FPGA, Resource Constraint, Random Numbers, Multivariate Gaussian Distribution |
| 1 | Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides |
FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Roldao Lopes, George A. Constantinides |
A High Throughput FPGA-based Floating Point Conjugate Gradient Implementation.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides |
Special issue on Field-Programmable Technology.  |
J. Real-Time Image Processing  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung |
ROM to DSP block transfer for resource constrained synthesis.  |
IET Computers & Digital Techniques  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
Run-Time Integration of Reconfigurable Video Processing Systems.  |
IEEE Trans. VLSI Syst.  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Vanderlei Bonato, Eduardo Marques, George A. Constantinides |
A floating-point Extended Kalman Filter implementation for autonomous mobile robots.  |
FPL  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung |
On the feasibility of early routing capacitance estimation for FPGAs.  |
FPL  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung |
Automatic On-chip Memory Minimization for Data Reuse.  |
FCCM  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung |
A Hybrid Memory Sub-system for Video Coding Applications.  |
FCCM  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides |
Word-length optimization for differentiable nonlinear systems.  |
ACM Trans. Design Autom. Electr. Syst.  |
2006 |
DBLP DOI BibTeX RDF |
word-length, synthesis, Signal processing, bitwidth |
| 1 | Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides |
Accuracy-Guaranteed Bit-Width Optimization.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
On-Chip Communication in Run-Time Assembled Reconfigurable Systems.  |
ICSAMOS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Su-Shin Ang, George A. Constantinides |
Dynamic Memory Sub-System for Reconfigurable Platforms.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos Masselos, George A. Constantinides, Qiang Liu |
Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonathan A. Clarke, George A. Constantinides |
High-Level Power Optimization for Digital Signal Processing in Reconfigurable Logic.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Kieron Turkington, Konstantinos Masselos, George A. Constantinides, Philip Heng Wai Leong |
FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design.  |
FPL  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
A Novel Hueristic and Provable Bounds for Reconfigurable Architecture Design.  |
FCCM  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
Yield enhancements of design-specific FPGAs.  |
FPGA  |
2006 |
DBLP DOI BibTeX RDF |
design-specific FPGA, interconnect faults, interconnect utilization, yield enhancement, yield prediction, structured ASIC, FPGA interconnect |
| 1 | Jonathan A. Clarke, Altaf Abdul Gaffar, George A. Constantinides, Peter Y. K. Cheung |
Fast word-level power models for synthesis of FPGA-based arithmetic.  |
ISCAS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Su-Shin Ang, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms.  |
ARC  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
Optimum and heuristic synthesis of multiple word-length architectures.  |
IEEE Trans. VLSI Syst.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Iosifina Pournara, Christos-Savvas Bouganis, George A. Constantinides |
FPGA-Accelerated Reconstruction of Gene Regulatory Networks.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung |
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung |
Power and Area Optimization for Multiple Restricted Multiplication.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides |
Heterogeneity Exploration for Multiple 2D Filter Designs.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides |
Error Modelling of Dual FiXed-point Arithmetic and its Application in Field Programmable Logic.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Jonathan A. Clarke, Altaf Abdul Gaffar, George A. Constantinides |
Parameterized Logic Power Consumption Models for FPGA based Systems.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
An Analytical Approach to Generation and Exploration of Reconfigurable Architectures.  |
FPL  |
2005 |
DBLP BibTeX RDF |
|
| 1 | Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung |
A Novel 2D Filter Design Methodology for Heterogeneous Devices.  |
FCCM  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko |
Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs.  |
FPGA  |
2005 |
DBLP DOI BibTeX RDF |
FPGA redundancy, interconnect faults, fault tolerance, yield enhancement, interconnect model, yield prediction, catastrophic faults, FPGA interconnect |
| 1 | Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung |
Exploration of heterogeneous reconfigurable architectures (abstract only).  |
FPGA  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung |
A heuristic approach for multiple restricted multiplication.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung |
A novel 2D filter design methodology.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa |
Guest Editors' Introduction: Field Programmable Logic and Applications.  |
IEEE Trans. Computers  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
Synthesis and optimization of DSP algorithms.  |
|
2004 |
RDF |
|
| 1 | Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides |
Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation.  |
FPL  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung |
Multiple Restricted Multiplication.  |
FPL  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk |
A Structured Methodology for System-on-an-FPGA Design.  |
FPL  |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | George A. Constantinides, Abunaser Miah, Nalin Sidahao |
Word-Length Optimization of Folded Polynomial Evaluation.  |
FCCM  |
2004 |
DBLP DOI BibTeX RDF |
|